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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-linux-android | FileCheck %s3 4declare <2 x i16> @llvm.fshl.v2i16(<2 x i16>, <2 x i16>, <2 x i16>)5 6define <2 x i16> @rotlv2_16(<2 x i16> %vec2_16, <2 x i16> %shift) {7; CHECK-LABEL: rotlv2_16:8; CHECK: // %bb.0:9; CHECK-NEXT: movi v2.2s, #1510; CHECK-NEXT: neg v3.2s, v1.2s11; CHECK-NEXT: movi d4, #0x00ffff0000ffff12; CHECK-NEXT: and v3.8b, v3.8b, v2.8b13; CHECK-NEXT: and v4.8b, v0.8b, v4.8b14; CHECK-NEXT: and v1.8b, v1.8b, v2.8b15; CHECK-NEXT: neg v3.2s, v3.2s16; CHECK-NEXT: ushl v0.2s, v0.2s, v1.2s17; CHECK-NEXT: ushl v2.2s, v4.2s, v3.2s18; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b19; CHECK-NEXT: ret20 %1 = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %vec2_16, <2 x i16> %vec2_16, <2 x i16> %shift)21 ret <2 x i16> %122}23