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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL3; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL4 5define i64 @extract_v2i64(<2 x i64> %x, i32 %y) {6; CHECK-ISEL-LABEL: extract_v2i64:7; CHECK-ISEL: // %bb.0:8; CHECK-ISEL-NEXT: mov x0, v0.d[1]9; CHECK-ISEL-NEXT: ret10;11; CHECK-GLOBAL-LABEL: extract_v2i64:12; CHECK-GLOBAL: // %bb.0:13; CHECK-GLOBAL-NEXT: mov d0, v0.d[1]14; CHECK-GLOBAL-NEXT: fmov x0, d015; CHECK-GLOBAL-NEXT: ret16 %ext = extractelement <2 x i64> %x, i32 117 ret i64 %ext18}19 20define i64 @extract_v1i64(<1 x i64> %x, i32 %y) {21; CHECK-ISEL-LABEL: extract_v1i64:22; CHECK-ISEL: // %bb.0:23; CHECK-ISEL-NEXT: ret24;25; CHECK-GLOBAL-LABEL: extract_v1i64:26; CHECK-GLOBAL: // %bb.0:27; CHECK-GLOBAL-NEXT: fmov x0, d028; CHECK-GLOBAL-NEXT: ret29 %ext = extractelement <1 x i64> %x, i32 130 ret i64 %ext31}32 33define i32 @extract_v4i32(<4 x i32> %x, i32 %y) {34; CHECK-ISEL-LABEL: extract_v4i32:35; CHECK-ISEL: // %bb.0:36; CHECK-ISEL-NEXT: mov w0, v0.s[1]37; CHECK-ISEL-NEXT: ret38;39; CHECK-GLOBAL-LABEL: extract_v4i32:40; CHECK-GLOBAL: // %bb.0:41; CHECK-GLOBAL-NEXT: mov s0, v0.s[1]42; CHECK-GLOBAL-NEXT: fmov w0, s043; CHECK-GLOBAL-NEXT: ret44 %ext = extractelement <4 x i32> %x, i32 145 ret i32 %ext46}47 48define i32 @extract_v2i32(<2 x i32> %x, i32 %y) {49; CHECK-ISEL-LABEL: extract_v2i32:50; CHECK-ISEL: // %bb.0:51; CHECK-ISEL-NEXT: // kill: def $d0 killed $d0 def $q052; CHECK-ISEL-NEXT: mov w0, v0.s[1]53; CHECK-ISEL-NEXT: ret54;55; CHECK-GLOBAL-LABEL: extract_v2i32:56; CHECK-GLOBAL: // %bb.0:57; CHECK-GLOBAL-NEXT: // kill: def $d0 killed $d0 def $q058; CHECK-GLOBAL-NEXT: mov s0, v0.s[1]59; CHECK-GLOBAL-NEXT: fmov w0, s060; CHECK-GLOBAL-NEXT: ret61 %ext = extractelement <2 x i32> %x, i32 162 ret i32 %ext63}64 65define i16 @extract_v8i16(<8 x i16> %x, i32 %y) {66; CHECK-LABEL: extract_v8i16:67; CHECK: // %bb.0:68; CHECK-NEXT: umov w0, v0.h[1]69; CHECK-NEXT: ret70 %ext = extractelement <8 x i16> %x, i32 171 ret i16 %ext72}73 74define i16 @extract_v4i16(<4 x i16> %x, i32 %y) {75; CHECK-LABEL: extract_v4i16:76; CHECK: // %bb.0:77; CHECK-NEXT: // kill: def $d0 killed $d0 def $q078; CHECK-NEXT: umov w0, v0.h[1]79; CHECK-NEXT: ret80 %ext = extractelement <4 x i16> %x, i32 181 ret i16 %ext82}83 84define i8 @extract_v16i8(<16 x i8> %x, i32 %y) {85; CHECK-LABEL: extract_v16i8:86; CHECK: // %bb.0:87; CHECK-NEXT: umov w0, v0.b[1]88; CHECK-NEXT: ret89 %ext = extractelement <16 x i8> %x, i32 190 ret i8 %ext91}92 93define i8 @extract_v8i8(<8 x i8> %x, i32 %y) {94; CHECK-LABEL: extract_v8i8:95; CHECK: // %bb.0:96; CHECK-NEXT: // kill: def $d0 killed $d0 def $q097; CHECK-NEXT: umov w0, v0.b[1]98; CHECK-NEXT: ret99 %ext = extractelement <8 x i8> %x, i32 1100 ret i8 %ext101}102 103 104define i64 @sv2i32i64(<2 x i32> %x) {105; CHECK-LABEL: sv2i32i64:106; CHECK: // %bb.0:107; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0108; CHECK-NEXT: smov x0, v0.s[1]109; CHECK-NEXT: ret110 %e = extractelement <2 x i32> %x, i64 1111 %s = sext i32 %e to i64112 ret i64 %s113}114 115define i64 @sv4i32i64(<4 x i32> %x) {116; CHECK-LABEL: sv4i32i64:117; CHECK: // %bb.0:118; CHECK-NEXT: smov x0, v0.s[2]119; CHECK-NEXT: ret120 %e = extractelement <4 x i32> %x, i64 2121 %s = sext i32 %e to i64122 ret i64 %s123}124 125define i64 @sv4i16i64(<4 x i16> %x) {126; CHECK-LABEL: sv4i16i64:127; CHECK: // %bb.0:128; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0129; CHECK-NEXT: smov x0, v0.h[2]130; CHECK-NEXT: ret131 %e = extractelement <4 x i16> %x, i64 2132 %s = sext i16 %e to i64133 ret i64 %s134}135 136define i64 @sv8i16i64(<8 x i16> %x) {137; CHECK-LABEL: sv8i16i64:138; CHECK: // %bb.0:139; CHECK-NEXT: smov x0, v0.h[2]140; CHECK-NEXT: ret141 %e = extractelement <8 x i16> %x, i64 2142 %s = sext i16 %e to i64143 ret i64 %s144}145 146define i64 @sv8i8i64(<8 x i8> %x) {147; CHECK-LABEL: sv8i8i64:148; CHECK: // %bb.0:149; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0150; CHECK-NEXT: smov x0, v0.b[2]151; CHECK-NEXT: ret152 %e = extractelement <8 x i8> %x, i64 2153 %s = sext i8 %e to i64154 ret i64 %s155}156 157define i64 @sv16i8i64(<16 x i8> %x) {158; CHECK-LABEL: sv16i8i64:159; CHECK: // %bb.0:160; CHECK-NEXT: smov x0, v0.b[2]161; CHECK-NEXT: ret162 %e = extractelement <16 x i8> %x, i64 2163 %s = sext i8 %e to i64164 ret i64 %s165}166 167define i32 @sv8i16i32(<8 x i16> %x) {168; CHECK-LABEL: sv8i16i32:169; CHECK: // %bb.0:170; CHECK-NEXT: smov w0, v0.h[2]171; CHECK-NEXT: ret172 %e = extractelement <8 x i16> %x, i64 2173 %s = sext i16 %e to i32174 ret i32 %s175}176 177define i32 @sv4i16i32(<4 x i16> %x) {178; CHECK-LABEL: sv4i16i32:179; CHECK: // %bb.0:180; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0181; CHECK-NEXT: smov w0, v0.h[2]182; CHECK-NEXT: ret183 %e = extractelement <4 x i16> %x, i64 2184 %s = sext i16 %e to i32185 ret i32 %s186}187 188define i32 @sv16i8i32(<16 x i8> %x) {189; CHECK-LABEL: sv16i8i32:190; CHECK: // %bb.0:191; CHECK-NEXT: smov w0, v0.b[2]192; CHECK-NEXT: ret193 %e = extractelement <16 x i8> %x, i64 2194 %s = sext i8 %e to i32195 ret i32 %s196}197 198define i32 @sv8i8i32(<8 x i8> %x) {199; CHECK-LABEL: sv8i8i32:200; CHECK: // %bb.0:201; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0202; CHECK-NEXT: smov w0, v0.b[2]203; CHECK-NEXT: ret204 %e = extractelement <8 x i8> %x, i64 2205 %s = sext i8 %e to i32206 ret i32 %s207}208 209define i16 @sv16i8i16(<16 x i8> %x) {210; CHECK-LABEL: sv16i8i16:211; CHECK: // %bb.0:212; CHECK-NEXT: smov w0, v0.b[2]213; CHECK-NEXT: ret214 %e = extractelement <16 x i8> %x, i64 2215 %s = sext i8 %e to i16216 ret i16 %s217}218 219define i16 @sv8i8i16(<8 x i8> %x) {220; CHECK-LABEL: sv8i8i16:221; CHECK: // %bb.0:222; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0223; CHECK-NEXT: smov w0, v0.b[2]224; CHECK-NEXT: ret225 %e = extractelement <8 x i8> %x, i64 2226 %s = sext i8 %e to i16227 ret i16 %s228}229 230 231 232define i64 @zv2i32i64(<2 x i32> %x) {233; CHECK-LABEL: zv2i32i64:234; CHECK: // %bb.0:235; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0236; CHECK-NEXT: mov w0, v0.s[1]237; CHECK-NEXT: ret238 %e = extractelement <2 x i32> %x, i64 1239 %s = zext i32 %e to i64240 ret i64 %s241}242 243define i64 @zv4i32i64(<4 x i32> %x) {244; CHECK-LABEL: zv4i32i64:245; CHECK: // %bb.0:246; CHECK-NEXT: mov w0, v0.s[2]247; CHECK-NEXT: ret248 %e = extractelement <4 x i32> %x, i64 2249 %s = zext i32 %e to i64250 ret i64 %s251}252 253define i64 @zv4i16i64(<4 x i16> %x) {254; CHECK-LABEL: zv4i16i64:255; CHECK: // %bb.0:256; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0257; CHECK-NEXT: umov w0, v0.h[2]258; CHECK-NEXT: ret259 %e = extractelement <4 x i16> %x, i64 2260 %s = zext i16 %e to i64261 ret i64 %s262}263 264define i64 @zv8i16i64(<8 x i16> %x) {265; CHECK-LABEL: zv8i16i64:266; CHECK: // %bb.0:267; CHECK-NEXT: umov w0, v0.h[2]268; CHECK-NEXT: ret269 %e = extractelement <8 x i16> %x, i64 2270 %s = zext i16 %e to i64271 ret i64 %s272}273 274define i64 @zv8i8i64(<8 x i8> %x) {275; CHECK-LABEL: zv8i8i64:276; CHECK: // %bb.0:277; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0278; CHECK-NEXT: umov w0, v0.b[2]279; CHECK-NEXT: ret280 %e = extractelement <8 x i8> %x, i64 2281 %s = zext i8 %e to i64282 ret i64 %s283}284 285define i64 @zv16i8i64(<16 x i8> %x) {286; CHECK-LABEL: zv16i8i64:287; CHECK: // %bb.0:288; CHECK-NEXT: umov w0, v0.b[2]289; CHECK-NEXT: ret290 %e = extractelement <16 x i8> %x, i64 2291 %s = zext i8 %e to i64292 ret i64 %s293}294 295define i32 @zv8i16i32(<8 x i16> %x) {296; CHECK-LABEL: zv8i16i32:297; CHECK: // %bb.0:298; CHECK-NEXT: umov w0, v0.h[2]299; CHECK-NEXT: ret300 %e = extractelement <8 x i16> %x, i64 2301 %s = zext i16 %e to i32302 ret i32 %s303}304 305define i32 @zv4i16i32(<4 x i16> %x) {306; CHECK-LABEL: zv4i16i32:307; CHECK: // %bb.0:308; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0309; CHECK-NEXT: umov w0, v0.h[2]310; CHECK-NEXT: ret311 %e = extractelement <4 x i16> %x, i64 2312 %s = zext i16 %e to i32313 ret i32 %s314}315 316define i32 @zv16i8i32(<16 x i8> %x) {317; CHECK-LABEL: zv16i8i32:318; CHECK: // %bb.0:319; CHECK-NEXT: umov w0, v0.b[2]320; CHECK-NEXT: ret321 %e = extractelement <16 x i8> %x, i64 2322 %s = zext i8 %e to i32323 ret i32 %s324}325 326define i32 @zv8i8i32(<8 x i8> %x) {327; CHECK-LABEL: zv8i8i32:328; CHECK: // %bb.0:329; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0330; CHECK-NEXT: umov w0, v0.b[2]331; CHECK-NEXT: ret332 %e = extractelement <8 x i8> %x, i64 2333 %s = zext i8 %e to i32334 ret i32 %s335}336 337define i16 @zv16i8i16(<16 x i8> %x) {338; CHECK-LABEL: zv16i8i16:339; CHECK: // %bb.0:340; CHECK-NEXT: umov w0, v0.b[2]341; CHECK-NEXT: ret342 %e = extractelement <16 x i8> %x, i64 2343 %s = zext i8 %e to i16344 ret i16 %s345}346 347define i16 @zv8i8i16(<8 x i8> %x) {348; CHECK-LABEL: zv8i8i16:349; CHECK: // %bb.0:350; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0351; CHECK-NEXT: umov w0, v0.b[2]352; CHECK-NEXT: ret353 %e = extractelement <8 x i8> %x, i64 2354 %s = zext i8 %e to i16355 ret i16 %s356}357 358 359define i32 @both_i16i32(<8 x i16> %x) {360; CHECK-LABEL: both_i16i32:361; CHECK: // %bb.0:362; CHECK-NEXT: umov w8, v0.h[2]363; CHECK-NEXT: smov w9, v0.h[2]364; CHECK-NEXT: eor w0, w8, w9365; CHECK-NEXT: ret366 %e = extractelement <8 x i16> %x, i64 2367 %s = zext i16 %e to i32368 %t = sext i16 %e to i32369 %u = xor i32 %s, %t370 ret i32 %u371}372 373define i32 @redundant_i16i32(<8 x i16> %x) {374; CHECK-LABEL: redundant_i16i32:375; CHECK: // %bb.0:376; CHECK-NEXT: smov w8, v0.h[2]377; CHECK-NEXT: eor w0, w8, w8, lsl #16378; CHECK-NEXT: ret379 %e = extractelement <8 x i16> %x, i64 2380 %s = sext i16 %e to i32381 %t = shl i32 %s, 16382 %u = xor i32 %s, %t383 ret i32 %u384}385 386define i32 @both_i8i32(<8 x i8> %x) {387; CHECK-LABEL: both_i8i32:388; CHECK: // %bb.0:389; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0390; CHECK-NEXT: umov w8, v0.b[2]391; CHECK-NEXT: smov w9, v0.b[2]392; CHECK-NEXT: eor w0, w8, w9393; CHECK-NEXT: ret394 %e = extractelement <8 x i8> %x, i64 2395 %s = zext i8 %e to i32396 %t = sext i8 %e to i32397 %u = xor i32 %s, %t398 ret i32 %u399}400 401define i32 @redundant_i8i32(<8 x i8> %x) {402; CHECK-LABEL: redundant_i8i32:403; CHECK: // %bb.0:404; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0405; CHECK-NEXT: smov w8, v0.b[2]406; CHECK-NEXT: eor w0, w8, w8, lsl #24407; CHECK-NEXT: ret408 %e = extractelement <8 x i8> %x, i64 2409 %s = sext i8 %e to i32410 %t = shl i32 %s, 24411 %u = xor i32 %s, %t412 ret i32 %u413}414 415define i64 @both_i32i64(<4 x i32> %x) {416; CHECK-LABEL: both_i32i64:417; CHECK: // %bb.0:418; CHECK-NEXT: mov w8, v0.s[2]419; CHECK-NEXT: smov x9, v0.s[2]420; CHECK-NEXT: eor x0, x8, x9421; CHECK-NEXT: ret422 %e = extractelement <4 x i32> %x, i64 2423 %s = zext i32 %e to i64424 %t = sext i32 %e to i64425 %u = xor i64 %s, %t426 ret i64 %u427}428 429define i64 @redundant_i32i64(<4 x i32> %x) {430; CHECK-LABEL: redundant_i32i64:431; CHECK: // %bb.0:432; CHECK-NEXT: smov x8, v0.s[2]433; CHECK-NEXT: eor x0, x8, x8, lsl #32434; CHECK-NEXT: ret435 %e = extractelement <4 x i32> %x, i64 2436 %s = sext i32 %e to i64437 %t = shl i64 %s, 32438 %u = xor i64 %s, %t439 ret i64 %u440}441 442define i64 @both_i16i64(<8 x i16> %x) {443; CHECK-LABEL: both_i16i64:444; CHECK: // %bb.0:445; CHECK-NEXT: umov w8, v0.h[2]446; CHECK-NEXT: smov x9, v0.h[2]447; CHECK-NEXT: eor x0, x8, x9448; CHECK-NEXT: ret449 %e = extractelement <8 x i16> %x, i64 2450 %s = zext i16 %e to i64451 %t = sext i16 %e to i64452 %u = xor i64 %s, %t453 ret i64 %u454}455 456define i64 @redundant_i16i64(<8 x i16> %x) {457; CHECK-LABEL: redundant_i16i64:458; CHECK: // %bb.0:459; CHECK-NEXT: smov x8, v0.h[2]460; CHECK-NEXT: eor x0, x8, x8, lsl #48461; CHECK-NEXT: ret462 %e = extractelement <8 x i16> %x, i64 2463 %s = sext i16 %e to i64464 %t = shl i64 %s, 48465 %u = xor i64 %s, %t466 ret i64 %u467}468 469define i64 @both_i8i64(<8 x i8> %x) {470; CHECK-LABEL: both_i8i64:471; CHECK: // %bb.0:472; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0473; CHECK-NEXT: umov w8, v0.b[2]474; CHECK-NEXT: smov x9, v0.b[2]475; CHECK-NEXT: eor x0, x8, x9476; CHECK-NEXT: ret477 %e = extractelement <8 x i8> %x, i64 2478 %s = zext i8 %e to i64479 %t = sext i8 %e to i64480 %u = xor i64 %s, %t481 ret i64 %u482}483 484define i64 @redundant_i8i64(<8 x i8> %x) {485; CHECK-LABEL: redundant_i8i64:486; CHECK: // %bb.0:487; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0488; CHECK-NEXT: smov x8, v0.b[2]489; CHECK-NEXT: eor x0, x8, x8, lsl #56490; CHECK-NEXT: ret491 %e = extractelement <8 x i8> %x, i64 2492 %s = sext i8 %e to i64493 %t = shl i64 %s, 56494 %u = xor i64 %s, %t495 ret i64 %u496}497