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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+fullfp16 | FileCheck %s3 4define half @test_vrecpeh_f16(half %a) #0 {5; CHECK-LABEL: test_vrecpeh_f16:6; CHECK: // %bb.0:7; CHECK-NEXT: frecpe h0, h08; CHECK-NEXT: ret9 %r = call half @llvm.aarch64.neon.frecpe.f16(half %a)10 ret half %r11}12 13define half @test_vrecpxh_f16(half %a) #0 {14; CHECK-LABEL: test_vrecpxh_f16:15; CHECK: // %bb.0:16; CHECK-NEXT: frecpx h0, h017; CHECK-NEXT: ret18 %r = call half @llvm.aarch64.neon.frecpx.f16(half %a)19 ret half %r20}21 22define half @test_vrsqrteh_f16(half %a) #0 {23; CHECK-LABEL: test_vrsqrteh_f16:24; CHECK: // %bb.0:25; CHECK-NEXT: frsqrte h0, h026; CHECK-NEXT: ret27 %r = call half @llvm.aarch64.neon.frsqrte.f16(half %a)28 ret half %r29}30 31declare half @llvm.aarch64.neon.frecpe.f16(half %a) #032declare half @llvm.aarch64.neon.frecpx.f16(half %a) #033declare half @llvm.aarch64.neon.frsqrte.f16(half %a) #034