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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=aarch64-unknown-linux-gnu -global-isel=0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-unknown-linux-gnu -global-isel=1 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define fp128 @fabs_f128(fp128 %a) {6; CHECK-SD-LABEL: fabs_f128:7; CHECK-SD: // %bb.0: // %entry8; CHECK-SD-NEXT: str q0, [sp, #-16]!9; CHECK-SD-NEXT: .cfi_def_cfa_offset 1610; CHECK-SD-NEXT: ldrb w8, [sp, #15]11; CHECK-SD-NEXT: and w8, w8, #0x7f12; CHECK-SD-NEXT: strb w8, [sp, #15]13; CHECK-SD-NEXT: ldr q0, [sp], #1614; CHECK-SD-NEXT: ret15;16; CHECK-GI-LABEL: fabs_f128:17; CHECK-GI: // %bb.0: // %entry18; CHECK-GI-NEXT: mov x8, v0.d[1]19; CHECK-GI-NEXT: mov v0.d[0], v0.d[0]20; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff21; CHECK-GI-NEXT: mov v0.d[1], x822; CHECK-GI-NEXT: ret23entry:24 %c = call fp128 @llvm.fabs.f128(fp128 %a)25 ret fp128 %c26}27 28define <1 x fp128> @fabs_v1f128(<1 x fp128> %a) {29; CHECK-SD-LABEL: fabs_v1f128:30; CHECK-SD: // %bb.0: // %entry31; CHECK-SD-NEXT: str q0, [sp, #-16]!32; CHECK-SD-NEXT: .cfi_def_cfa_offset 1633; CHECK-SD-NEXT: ldrb w8, [sp, #15]34; CHECK-SD-NEXT: and w8, w8, #0x7f35; CHECK-SD-NEXT: strb w8, [sp, #15]36; CHECK-SD-NEXT: ldr q0, [sp], #1637; CHECK-SD-NEXT: ret38;39; CHECK-GI-LABEL: fabs_v1f128:40; CHECK-GI: // %bb.0: // %entry41; CHECK-GI-NEXT: mov x8, v0.d[1]42; CHECK-GI-NEXT: mov v0.d[0], v0.d[0]43; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff44; CHECK-GI-NEXT: mov v0.d[1], x845; CHECK-GI-NEXT: ret46entry:47 %c = call <1 x fp128> @llvm.fabs.v1f128(<1 x fp128> %a)48 ret <1 x fp128> %c49}50 51define <2 x fp128> @fabs_v2f128(<2 x fp128> %a) {52; CHECK-SD-LABEL: fabs_v2f128:53; CHECK-SD: // %bb.0: // %entry54; CHECK-SD-NEXT: stp q0, q1, [sp, #-32]!55; CHECK-SD-NEXT: .cfi_def_cfa_offset 3256; CHECK-SD-NEXT: ldrb w8, [sp, #15]57; CHECK-SD-NEXT: and w8, w8, #0x7f58; CHECK-SD-NEXT: strb w8, [sp, #15]59; CHECK-SD-NEXT: ldrb w8, [sp, #31]60; CHECK-SD-NEXT: and w8, w8, #0x7f61; CHECK-SD-NEXT: strb w8, [sp, #31]62; CHECK-SD-NEXT: ldp q0, q1, [sp], #3263; CHECK-SD-NEXT: ret64;65; CHECK-GI-LABEL: fabs_v2f128:66; CHECK-GI: // %bb.0: // %entry67; CHECK-GI-NEXT: mov x8, v0.d[1]68; CHECK-GI-NEXT: mov x9, v1.d[1]69; CHECK-GI-NEXT: mov v0.d[0], v0.d[0]70; CHECK-GI-NEXT: mov v1.d[0], v1.d[0]71; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff72; CHECK-GI-NEXT: and x9, x9, #0x7fffffffffffffff73; CHECK-GI-NEXT: mov v0.d[1], x874; CHECK-GI-NEXT: mov v1.d[1], x975; CHECK-GI-NEXT: ret76entry:77 %c = call <2 x fp128> @llvm.fabs.v2f128(<2 x fp128> %a)78 ret <2 x fp128> %c79}80 81define <3 x fp128> @fabs_v3f128(<3 x fp128> %a) {82; CHECK-SD-LABEL: fabs_v3f128:83; CHECK-SD: // %bb.0: // %entry84; CHECK-SD-NEXT: stp q0, q1, [sp, #-48]!85; CHECK-SD-NEXT: .cfi_def_cfa_offset 4886; CHECK-SD-NEXT: ldrb w8, [sp, #15]87; CHECK-SD-NEXT: str q2, [sp, #32]88; CHECK-SD-NEXT: and w8, w8, #0x7f89; CHECK-SD-NEXT: strb w8, [sp, #15]90; CHECK-SD-NEXT: ldrb w8, [sp, #31]91; CHECK-SD-NEXT: and w8, w8, #0x7f92; CHECK-SD-NEXT: strb w8, [sp, #31]93; CHECK-SD-NEXT: ldrb w8, [sp, #47]94; CHECK-SD-NEXT: ldp q0, q1, [sp]95; CHECK-SD-NEXT: and w8, w8, #0x7f96; CHECK-SD-NEXT: strb w8, [sp, #47]97; CHECK-SD-NEXT: ldr q2, [sp, #32]98; CHECK-SD-NEXT: add sp, sp, #4899; CHECK-SD-NEXT: ret100;101; CHECK-GI-LABEL: fabs_v3f128:102; CHECK-GI: // %bb.0: // %entry103; CHECK-GI-NEXT: mov x8, v0.d[1]104; CHECK-GI-NEXT: mov x9, v1.d[1]105; CHECK-GI-NEXT: mov x10, v2.d[1]106; CHECK-GI-NEXT: mov v0.d[0], v0.d[0]107; CHECK-GI-NEXT: mov v1.d[0], v1.d[0]108; CHECK-GI-NEXT: mov v2.d[0], v2.d[0]109; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff110; CHECK-GI-NEXT: and x9, x9, #0x7fffffffffffffff111; CHECK-GI-NEXT: and x10, x10, #0x7fffffffffffffff112; CHECK-GI-NEXT: mov v0.d[1], x8113; CHECK-GI-NEXT: mov v1.d[1], x9114; CHECK-GI-NEXT: mov v2.d[1], x10115; CHECK-GI-NEXT: ret116entry:117 %c = call <3 x fp128> @llvm.fabs.v3f128(<3 x fp128> %a)118 ret <3 x fp128> %c119}120 121define <4 x fp128> @fabs_v4f128(<4 x fp128> %a) {122; CHECK-SD-LABEL: fabs_v4f128:123; CHECK-SD: // %bb.0: // %entry124; CHECK-SD-NEXT: stp q0, q1, [sp, #-64]!125; CHECK-SD-NEXT: .cfi_def_cfa_offset 64126; CHECK-SD-NEXT: ldrb w8, [sp, #15]127; CHECK-SD-NEXT: stp q2, q3, [sp, #32]128; CHECK-SD-NEXT: and w8, w8, #0x7f129; CHECK-SD-NEXT: strb w8, [sp, #15]130; CHECK-SD-NEXT: ldrb w8, [sp, #31]131; CHECK-SD-NEXT: and w8, w8, #0x7f132; CHECK-SD-NEXT: strb w8, [sp, #31]133; CHECK-SD-NEXT: ldrb w8, [sp, #47]134; CHECK-SD-NEXT: ldp q0, q1, [sp]135; CHECK-SD-NEXT: and w8, w8, #0x7f136; CHECK-SD-NEXT: strb w8, [sp, #47]137; CHECK-SD-NEXT: ldrb w8, [sp, #63]138; CHECK-SD-NEXT: and w8, w8, #0x7f139; CHECK-SD-NEXT: strb w8, [sp, #63]140; CHECK-SD-NEXT: ldp q2, q3, [sp, #32]141; CHECK-SD-NEXT: add sp, sp, #64142; CHECK-SD-NEXT: ret143;144; CHECK-GI-LABEL: fabs_v4f128:145; CHECK-GI: // %bb.0: // %entry146; CHECK-GI-NEXT: mov x8, v0.d[1]147; CHECK-GI-NEXT: mov v7.d[0], v0.d[0]148; CHECK-GI-NEXT: mov x9, v1.d[1]149; CHECK-GI-NEXT: mov x10, v2.d[1]150; CHECK-GI-NEXT: mov x11, v3.d[1]151; CHECK-GI-NEXT: mov v1.d[0], v1.d[0]152; CHECK-GI-NEXT: mov v2.d[0], v2.d[0]153; CHECK-GI-NEXT: mov v3.d[0], v3.d[0]154; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff155; CHECK-GI-NEXT: mov v7.d[1], x8156; CHECK-GI-NEXT: and x8, x9, #0x7fffffffffffffff157; CHECK-GI-NEXT: and x9, x10, #0x7fffffffffffffff158; CHECK-GI-NEXT: and x10, x11, #0x7fffffffffffffff159; CHECK-GI-NEXT: mov v1.d[1], x8160; CHECK-GI-NEXT: mov v2.d[1], x9161; CHECK-GI-NEXT: mov v3.d[1], x10162; CHECK-GI-NEXT: mov v0.16b, v7.16b163; CHECK-GI-NEXT: ret164entry:165 %c = call <4 x fp128> @llvm.fabs.v4f128(<4 x fp128> %a)166 ret <4 x fp128> %c167}168 169;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:170; CHECK: {{.*}}171