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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP163; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP164; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP165; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP166 7define double @fadd_f64(double %a, double %b) {8; CHECK-LABEL: fadd_f64:9; CHECK:       // %bb.0: // %entry10; CHECK-NEXT:    fadd d0, d0, d111; CHECK-NEXT:    ret12entry:13  %c = fadd double %a, %b14  ret double %c15}16 17define float @fadd_f32(float %a, float %b) {18; CHECK-LABEL: fadd_f32:19; CHECK:       // %bb.0: // %entry20; CHECK-NEXT:    fadd s0, s0, s121; CHECK-NEXT:    ret22entry:23  %c = fadd float %a, %b24  ret float %c25}26 27define half @fadd_f16(half %a, half %b) {28; CHECK-SD-NOFP16-LABEL: fadd_f16:29; CHECK-SD-NOFP16:       // %bb.0: // %entry30; CHECK-SD-NOFP16-NEXT:    fcvt s1, h131; CHECK-SD-NOFP16-NEXT:    fcvt s0, h032; CHECK-SD-NOFP16-NEXT:    fadd s0, s0, s133; CHECK-SD-NOFP16-NEXT:    fcvt h0, s034; CHECK-SD-NOFP16-NEXT:    ret35;36; CHECK-SD-FP16-LABEL: fadd_f16:37; CHECK-SD-FP16:       // %bb.0: // %entry38; CHECK-SD-FP16-NEXT:    fadd h0, h0, h139; CHECK-SD-FP16-NEXT:    ret40;41; CHECK-GI-NOFP16-LABEL: fadd_f16:42; CHECK-GI-NOFP16:       // %bb.0: // %entry43; CHECK-GI-NOFP16-NEXT:    fcvt s0, h044; CHECK-GI-NOFP16-NEXT:    fcvt s1, h145; CHECK-GI-NOFP16-NEXT:    fadd s0, s0, s146; CHECK-GI-NOFP16-NEXT:    fcvt h0, s047; CHECK-GI-NOFP16-NEXT:    ret48;49; CHECK-GI-FP16-LABEL: fadd_f16:50; CHECK-GI-FP16:       // %bb.0: // %entry51; CHECK-GI-FP16-NEXT:    fadd h0, h0, h152; CHECK-GI-FP16-NEXT:    ret53entry:54  %c = fadd half %a, %b55  ret half %c56}57 58define <2 x double> @fadd_v2f64(<2 x double> %a, <2 x double> %b) {59; CHECK-LABEL: fadd_v2f64:60; CHECK:       // %bb.0: // %entry61; CHECK-NEXT:    fadd v0.2d, v0.2d, v1.2d62; CHECK-NEXT:    ret63entry:64  %c = fadd <2 x double> %a, %b65  ret <2 x double> %c66}67 68define <3 x double> @fadd_v3f64(<3 x double> %a, <3 x double> %b) {69; CHECK-SD-LABEL: fadd_v3f64:70; CHECK-SD:       // %bb.0: // %entry71; CHECK-SD-NEXT:    // kill: def $d3 killed $d3 def $q372; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q073; CHECK-SD-NEXT:    // kill: def $d4 killed $d4 def $q474; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 def $q175; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 def $q276; CHECK-SD-NEXT:    // kill: def $d5 killed $d5 def $q577; CHECK-SD-NEXT:    mov v3.d[1], v4.d[0]78; CHECK-SD-NEXT:    mov v0.d[1], v1.d[0]79; CHECK-SD-NEXT:    fadd v2.2d, v2.2d, v5.2d80; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q281; CHECK-SD-NEXT:    fadd v0.2d, v0.2d, v3.2d82; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #883; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q084; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q185; CHECK-SD-NEXT:    ret86;87; CHECK-GI-LABEL: fadd_v3f64:88; CHECK-GI:       // %bb.0: // %entry89; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q090; CHECK-GI-NEXT:    // kill: def $d3 killed $d3 def $q391; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q192; CHECK-GI-NEXT:    // kill: def $d4 killed $d4 def $q493; CHECK-GI-NEXT:    fadd d2, d2, d594; CHECK-GI-NEXT:    mov v0.d[1], v1.d[0]95; CHECK-GI-NEXT:    mov v3.d[1], v4.d[0]96; CHECK-GI-NEXT:    fadd v0.2d, v0.2d, v3.2d97; CHECK-GI-NEXT:    mov d1, v0.d[1]98; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q099; CHECK-GI-NEXT:    ret100entry:101  %c = fadd <3 x double> %a, %b102  ret <3 x double> %c103}104 105define <4 x double> @fadd_v4f64(<4 x double> %a, <4 x double> %b) {106; CHECK-SD-LABEL: fadd_v4f64:107; CHECK-SD:       // %bb.0: // %entry108; CHECK-SD-NEXT:    fadd v1.2d, v1.2d, v3.2d109; CHECK-SD-NEXT:    fadd v0.2d, v0.2d, v2.2d110; CHECK-SD-NEXT:    ret111;112; CHECK-GI-LABEL: fadd_v4f64:113; CHECK-GI:       // %bb.0: // %entry114; CHECK-GI-NEXT:    fadd v0.2d, v0.2d, v2.2d115; CHECK-GI-NEXT:    fadd v1.2d, v1.2d, v3.2d116; CHECK-GI-NEXT:    ret117entry:118  %c = fadd <4 x double> %a, %b119  ret <4 x double> %c120}121 122define <2 x float> @fadd_v2f32(<2 x float> %a, <2 x float> %b) {123; CHECK-LABEL: fadd_v2f32:124; CHECK:       // %bb.0: // %entry125; CHECK-NEXT:    fadd v0.2s, v0.2s, v1.2s126; CHECK-NEXT:    ret127entry:128  %c = fadd <2 x float> %a, %b129  ret <2 x float> %c130}131 132define <3 x float> @fadd_v3f32(<3 x float> %a, <3 x float> %b) {133; CHECK-LABEL: fadd_v3f32:134; CHECK:       // %bb.0: // %entry135; CHECK-NEXT:    fadd v0.4s, v0.4s, v1.4s136; CHECK-NEXT:    ret137entry:138  %c = fadd <3 x float> %a, %b139  ret <3 x float> %c140}141 142define <4 x float> @fadd_v4f32(<4 x float> %a, <4 x float> %b) {143; CHECK-LABEL: fadd_v4f32:144; CHECK:       // %bb.0: // %entry145; CHECK-NEXT:    fadd v0.4s, v0.4s, v1.4s146; CHECK-NEXT:    ret147entry:148  %c = fadd <4 x float> %a, %b149  ret <4 x float> %c150}151 152define <8 x float> @fadd_v8f32(<8 x float> %a, <8 x float> %b) {153; CHECK-SD-LABEL: fadd_v8f32:154; CHECK-SD:       // %bb.0: // %entry155; CHECK-SD-NEXT:    fadd v1.4s, v1.4s, v3.4s156; CHECK-SD-NEXT:    fadd v0.4s, v0.4s, v2.4s157; CHECK-SD-NEXT:    ret158;159; CHECK-GI-LABEL: fadd_v8f32:160; CHECK-GI:       // %bb.0: // %entry161; CHECK-GI-NEXT:    fadd v0.4s, v0.4s, v2.4s162; CHECK-GI-NEXT:    fadd v1.4s, v1.4s, v3.4s163; CHECK-GI-NEXT:    ret164entry:165  %c = fadd <8 x float> %a, %b166  ret <8 x float> %c167}168 169define <7 x half> @fadd_v7f16(<7 x half> %a, <7 x half> %b) {170; CHECK-SD-NOFP16-LABEL: fadd_v7f16:171; CHECK-SD-NOFP16:       // %bb.0: // %entry172; CHECK-SD-NOFP16-NEXT:    fcvtl v2.4s, v1.4h173; CHECK-SD-NOFP16-NEXT:    fcvtl v3.4s, v0.4h174; CHECK-SD-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h175; CHECK-SD-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h176; CHECK-SD-NOFP16-NEXT:    fadd v2.4s, v3.4s, v2.4s177; CHECK-SD-NOFP16-NEXT:    fadd v1.4s, v0.4s, v1.4s178; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v2.4s179; CHECK-SD-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s180; CHECK-SD-NOFP16-NEXT:    ret181;182; CHECK-SD-FP16-LABEL: fadd_v7f16:183; CHECK-SD-FP16:       // %bb.0: // %entry184; CHECK-SD-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h185; CHECK-SD-FP16-NEXT:    ret186;187; CHECK-GI-NOFP16-LABEL: fadd_v7f16:188; CHECK-GI-NOFP16:       // %bb.0: // %entry189; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v0.4h190; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v1.4h191; CHECK-GI-NOFP16-NEXT:    mov v4.h[0], v0.h[4]192; CHECK-GI-NOFP16-NEXT:    fadd v2.4s, v2.4s, v3.4s193; CHECK-GI-NOFP16-NEXT:    mov v3.h[0], v1.h[4]194; CHECK-GI-NOFP16-NEXT:    mov v4.h[1], v0.h[5]195; CHECK-GI-NOFP16-NEXT:    mov v3.h[1], v1.h[5]196; CHECK-GI-NOFP16-NEXT:    fcvtn v2.4h, v2.4s197; CHECK-GI-NOFP16-NEXT:    mov v4.h[2], v0.h[6]198; CHECK-GI-NOFP16-NEXT:    mov v3.h[2], v1.h[6]199; CHECK-GI-NOFP16-NEXT:    mov v0.h[0], v2.h[0]200; CHECK-GI-NOFP16-NEXT:    fcvtl v1.4s, v4.4h201; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v3.4h202; CHECK-GI-NOFP16-NEXT:    mov v0.h[1], v2.h[1]203; CHECK-GI-NOFP16-NEXT:    fadd v1.4s, v1.4s, v3.4s204; CHECK-GI-NOFP16-NEXT:    mov v0.h[2], v2.h[2]205; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v1.4s206; CHECK-GI-NOFP16-NEXT:    mov v0.h[3], v2.h[3]207; CHECK-GI-NOFP16-NEXT:    mov v0.h[4], v1.h[0]208; CHECK-GI-NOFP16-NEXT:    mov v0.h[5], v1.h[1]209; CHECK-GI-NOFP16-NEXT:    mov v0.h[6], v1.h[2]210; CHECK-GI-NOFP16-NEXT:    ret211;212; CHECK-GI-FP16-LABEL: fadd_v7f16:213; CHECK-GI-FP16:       // %bb.0: // %entry214; CHECK-GI-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h215; CHECK-GI-FP16-NEXT:    ret216entry:217  %c = fadd <7 x half> %a, %b218  ret <7 x half> %c219}220 221define <4 x half> @fadd_v4f16(<4 x half> %a, <4 x half> %b) {222; CHECK-SD-NOFP16-LABEL: fadd_v4f16:223; CHECK-SD-NOFP16:       // %bb.0: // %entry224; CHECK-SD-NOFP16-NEXT:    fcvtl v1.4s, v1.4h225; CHECK-SD-NOFP16-NEXT:    fcvtl v0.4s, v0.4h226; CHECK-SD-NOFP16-NEXT:    fadd v0.4s, v0.4s, v1.4s227; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v0.4s228; CHECK-SD-NOFP16-NEXT:    ret229;230; CHECK-SD-FP16-LABEL: fadd_v4f16:231; CHECK-SD-FP16:       // %bb.0: // %entry232; CHECK-SD-FP16-NEXT:    fadd v0.4h, v0.4h, v1.4h233; CHECK-SD-FP16-NEXT:    ret234;235; CHECK-GI-NOFP16-LABEL: fadd_v4f16:236; CHECK-GI-NOFP16:       // %bb.0: // %entry237; CHECK-GI-NOFP16-NEXT:    fcvtl v0.4s, v0.4h238; CHECK-GI-NOFP16-NEXT:    fcvtl v1.4s, v1.4h239; CHECK-GI-NOFP16-NEXT:    fadd v0.4s, v0.4s, v1.4s240; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v0.4s241; CHECK-GI-NOFP16-NEXT:    ret242;243; CHECK-GI-FP16-LABEL: fadd_v4f16:244; CHECK-GI-FP16:       // %bb.0: // %entry245; CHECK-GI-FP16-NEXT:    fadd v0.4h, v0.4h, v1.4h246; CHECK-GI-FP16-NEXT:    ret247entry:248  %c = fadd <4 x half> %a, %b249  ret <4 x half> %c250}251 252define <8 x half> @fadd_v8f16(<8 x half> %a, <8 x half> %b) {253; CHECK-SD-NOFP16-LABEL: fadd_v8f16:254; CHECK-SD-NOFP16:       // %bb.0: // %entry255; CHECK-SD-NOFP16-NEXT:    fcvtl v2.4s, v1.4h256; CHECK-SD-NOFP16-NEXT:    fcvtl v3.4s, v0.4h257; CHECK-SD-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h258; CHECK-SD-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h259; CHECK-SD-NOFP16-NEXT:    fadd v2.4s, v3.4s, v2.4s260; CHECK-SD-NOFP16-NEXT:    fadd v1.4s, v0.4s, v1.4s261; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v2.4s262; CHECK-SD-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s263; CHECK-SD-NOFP16-NEXT:    ret264;265; CHECK-SD-FP16-LABEL: fadd_v8f16:266; CHECK-SD-FP16:       // %bb.0: // %entry267; CHECK-SD-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h268; CHECK-SD-FP16-NEXT:    ret269;270; CHECK-GI-NOFP16-LABEL: fadd_v8f16:271; CHECK-GI-NOFP16:       // %bb.0: // %entry272; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v0.4h273; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v1.4h274; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h275; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h276; CHECK-GI-NOFP16-NEXT:    fadd v2.4s, v2.4s, v3.4s277; CHECK-GI-NOFP16-NEXT:    fadd v1.4s, v0.4s, v1.4s278; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v2.4s279; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s280; CHECK-GI-NOFP16-NEXT:    ret281;282; CHECK-GI-FP16-LABEL: fadd_v8f16:283; CHECK-GI-FP16:       // %bb.0: // %entry284; CHECK-GI-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h285; CHECK-GI-FP16-NEXT:    ret286entry:287  %c = fadd <8 x half> %a, %b288  ret <8 x half> %c289}290 291define <16 x half> @fadd_v16f16(<16 x half> %a, <16 x half> %b) {292; CHECK-SD-NOFP16-LABEL: fadd_v16f16:293; CHECK-SD-NOFP16:       // %bb.0: // %entry294; CHECK-SD-NOFP16-NEXT:    fcvtl v4.4s, v2.4h295; CHECK-SD-NOFP16-NEXT:    fcvtl v5.4s, v0.4h296; CHECK-SD-NOFP16-NEXT:    fcvtl v6.4s, v3.4h297; CHECK-SD-NOFP16-NEXT:    fcvtl v7.4s, v1.4h298; CHECK-SD-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h299; CHECK-SD-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h300; CHECK-SD-NOFP16-NEXT:    fcvtl2 v3.4s, v3.8h301; CHECK-SD-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h302; CHECK-SD-NOFP16-NEXT:    fadd v4.4s, v5.4s, v4.4s303; CHECK-SD-NOFP16-NEXT:    fadd v5.4s, v7.4s, v6.4s304; CHECK-SD-NOFP16-NEXT:    fadd v2.4s, v0.4s, v2.4s305; CHECK-SD-NOFP16-NEXT:    fadd v3.4s, v1.4s, v3.4s306; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v4.4s307; CHECK-SD-NOFP16-NEXT:    fcvtn v1.4h, v5.4s308; CHECK-SD-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s309; CHECK-SD-NOFP16-NEXT:    fcvtn2 v1.8h, v3.4s310; CHECK-SD-NOFP16-NEXT:    ret311;312; CHECK-SD-FP16-LABEL: fadd_v16f16:313; CHECK-SD-FP16:       // %bb.0: // %entry314; CHECK-SD-FP16-NEXT:    fadd v1.8h, v1.8h, v3.8h315; CHECK-SD-FP16-NEXT:    fadd v0.8h, v0.8h, v2.8h316; CHECK-SD-FP16-NEXT:    ret317;318; CHECK-GI-NOFP16-LABEL: fadd_v16f16:319; CHECK-GI-NOFP16:       // %bb.0: // %entry320; CHECK-GI-NOFP16-NEXT:    fcvtl v4.4s, v0.4h321; CHECK-GI-NOFP16-NEXT:    fcvtl v5.4s, v1.4h322; CHECK-GI-NOFP16-NEXT:    fcvtl v6.4s, v2.4h323; CHECK-GI-NOFP16-NEXT:    fcvtl v7.4s, v3.4h324; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h325; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h326; CHECK-GI-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h327; CHECK-GI-NOFP16-NEXT:    fcvtl2 v3.4s, v3.8h328; CHECK-GI-NOFP16-NEXT:    fadd v4.4s, v4.4s, v6.4s329; CHECK-GI-NOFP16-NEXT:    fadd v5.4s, v5.4s, v7.4s330; CHECK-GI-NOFP16-NEXT:    fadd v2.4s, v0.4s, v2.4s331; CHECK-GI-NOFP16-NEXT:    fadd v3.4s, v1.4s, v3.4s332; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v4.4s333; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v5.4s334; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s335; CHECK-GI-NOFP16-NEXT:    fcvtn2 v1.8h, v3.4s336; CHECK-GI-NOFP16-NEXT:    ret337;338; CHECK-GI-FP16-LABEL: fadd_v16f16:339; CHECK-GI-FP16:       // %bb.0: // %entry340; CHECK-GI-FP16-NEXT:    fadd v0.8h, v0.8h, v2.8h341; CHECK-GI-FP16-NEXT:    fadd v1.8h, v1.8h, v3.8h342; CHECK-GI-FP16-NEXT:    ret343entry:344  %c = fadd <16 x half> %a, %b345  ret <16 x half> %c346}347 348define double @fsub_f64(double %a, double %b) {349; CHECK-LABEL: fsub_f64:350; CHECK:       // %bb.0: // %entry351; CHECK-NEXT:    fsub d0, d0, d1352; CHECK-NEXT:    ret353entry:354  %c = fsub double %a, %b355  ret double %c356}357 358define float @fsub_f32(float %a, float %b) {359; CHECK-LABEL: fsub_f32:360; CHECK:       // %bb.0: // %entry361; CHECK-NEXT:    fsub s0, s0, s1362; CHECK-NEXT:    ret363entry:364  %c = fsub float %a, %b365  ret float %c366}367 368define half @fsub_f16(half %a, half %b) {369; CHECK-SD-NOFP16-LABEL: fsub_f16:370; CHECK-SD-NOFP16:       // %bb.0: // %entry371; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1372; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0373; CHECK-SD-NOFP16-NEXT:    fsub s0, s0, s1374; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0375; CHECK-SD-NOFP16-NEXT:    ret376;377; CHECK-SD-FP16-LABEL: fsub_f16:378; CHECK-SD-FP16:       // %bb.0: // %entry379; CHECK-SD-FP16-NEXT:    fsub h0, h0, h1380; CHECK-SD-FP16-NEXT:    ret381;382; CHECK-GI-NOFP16-LABEL: fsub_f16:383; CHECK-GI-NOFP16:       // %bb.0: // %entry384; CHECK-GI-NOFP16-NEXT:    fcvt s0, h0385; CHECK-GI-NOFP16-NEXT:    fcvt s1, h1386; CHECK-GI-NOFP16-NEXT:    fsub s0, s0, s1387; CHECK-GI-NOFP16-NEXT:    fcvt h0, s0388; CHECK-GI-NOFP16-NEXT:    ret389;390; CHECK-GI-FP16-LABEL: fsub_f16:391; CHECK-GI-FP16:       // %bb.0: // %entry392; CHECK-GI-FP16-NEXT:    fsub h0, h0, h1393; CHECK-GI-FP16-NEXT:    ret394entry:395  %c = fsub half %a, %b396  ret half %c397}398 399define <2 x double> @fsub_v2f64(<2 x double> %a, <2 x double> %b) {400; CHECK-LABEL: fsub_v2f64:401; CHECK:       // %bb.0: // %entry402; CHECK-NEXT:    fsub v0.2d, v0.2d, v1.2d403; CHECK-NEXT:    ret404entry:405  %c = fsub <2 x double> %a, %b406  ret <2 x double> %c407}408 409define <3 x double> @fsub_v3f64(<3 x double> %a, <3 x double> %b) {410; CHECK-SD-LABEL: fsub_v3f64:411; CHECK-SD:       // %bb.0: // %entry412; CHECK-SD-NEXT:    // kill: def $d3 killed $d3 def $q3413; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0414; CHECK-SD-NEXT:    // kill: def $d4 killed $d4 def $q4415; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 def $q1416; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 def $q2417; CHECK-SD-NEXT:    // kill: def $d5 killed $d5 def $q5418; CHECK-SD-NEXT:    mov v3.d[1], v4.d[0]419; CHECK-SD-NEXT:    mov v0.d[1], v1.d[0]420; CHECK-SD-NEXT:    fsub v2.2d, v2.2d, v5.2d421; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2422; CHECK-SD-NEXT:    fsub v0.2d, v0.2d, v3.2d423; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8424; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0425; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1426; CHECK-SD-NEXT:    ret427;428; CHECK-GI-LABEL: fsub_v3f64:429; CHECK-GI:       // %bb.0: // %entry430; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0431; CHECK-GI-NEXT:    // kill: def $d3 killed $d3 def $q3432; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1433; CHECK-GI-NEXT:    // kill: def $d4 killed $d4 def $q4434; CHECK-GI-NEXT:    fsub d2, d2, d5435; CHECK-GI-NEXT:    mov v0.d[1], v1.d[0]436; CHECK-GI-NEXT:    mov v3.d[1], v4.d[0]437; CHECK-GI-NEXT:    fsub v0.2d, v0.2d, v3.2d438; CHECK-GI-NEXT:    mov d1, v0.d[1]439; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0440; CHECK-GI-NEXT:    ret441entry:442  %c = fsub <3 x double> %a, %b443  ret <3 x double> %c444}445 446define <4 x double> @fsub_v4f64(<4 x double> %a, <4 x double> %b) {447; CHECK-SD-LABEL: fsub_v4f64:448; CHECK-SD:       // %bb.0: // %entry449; CHECK-SD-NEXT:    fsub v1.2d, v1.2d, v3.2d450; CHECK-SD-NEXT:    fsub v0.2d, v0.2d, v2.2d451; CHECK-SD-NEXT:    ret452;453; CHECK-GI-LABEL: fsub_v4f64:454; CHECK-GI:       // %bb.0: // %entry455; CHECK-GI-NEXT:    fsub v0.2d, v0.2d, v2.2d456; CHECK-GI-NEXT:    fsub v1.2d, v1.2d, v3.2d457; CHECK-GI-NEXT:    ret458entry:459  %c = fsub <4 x double> %a, %b460  ret <4 x double> %c461}462 463define <2 x float> @fsub_v2f32(<2 x float> %a, <2 x float> %b) {464; CHECK-LABEL: fsub_v2f32:465; CHECK:       // %bb.0: // %entry466; CHECK-NEXT:    fsub v0.2s, v0.2s, v1.2s467; CHECK-NEXT:    ret468entry:469  %c = fsub <2 x float> %a, %b470  ret <2 x float> %c471}472 473define <3 x float> @fsub_v3f32(<3 x float> %a, <3 x float> %b) {474; CHECK-LABEL: fsub_v3f32:475; CHECK:       // %bb.0: // %entry476; CHECK-NEXT:    fsub v0.4s, v0.4s, v1.4s477; CHECK-NEXT:    ret478entry:479  %c = fsub <3 x float> %a, %b480  ret <3 x float> %c481}482 483define <4 x float> @fsub_v4f32(<4 x float> %a, <4 x float> %b) {484; CHECK-LABEL: fsub_v4f32:485; CHECK:       // %bb.0: // %entry486; CHECK-NEXT:    fsub v0.4s, v0.4s, v1.4s487; CHECK-NEXT:    ret488entry:489  %c = fsub <4 x float> %a, %b490  ret <4 x float> %c491}492 493define <8 x float> @fsub_v8f32(<8 x float> %a, <8 x float> %b) {494; CHECK-SD-LABEL: fsub_v8f32:495; CHECK-SD:       // %bb.0: // %entry496; CHECK-SD-NEXT:    fsub v1.4s, v1.4s, v3.4s497; CHECK-SD-NEXT:    fsub v0.4s, v0.4s, v2.4s498; CHECK-SD-NEXT:    ret499;500; CHECK-GI-LABEL: fsub_v8f32:501; CHECK-GI:       // %bb.0: // %entry502; CHECK-GI-NEXT:    fsub v0.4s, v0.4s, v2.4s503; CHECK-GI-NEXT:    fsub v1.4s, v1.4s, v3.4s504; CHECK-GI-NEXT:    ret505entry:506  %c = fsub <8 x float> %a, %b507  ret <8 x float> %c508}509 510define <7 x half> @fsub_v7f16(<7 x half> %a, <7 x half> %b) {511; CHECK-SD-NOFP16-LABEL: fsub_v7f16:512; CHECK-SD-NOFP16:       // %bb.0: // %entry513; CHECK-SD-NOFP16-NEXT:    fcvtl v2.4s, v1.4h514; CHECK-SD-NOFP16-NEXT:    fcvtl v3.4s, v0.4h515; CHECK-SD-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h516; CHECK-SD-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h517; CHECK-SD-NOFP16-NEXT:    fsub v2.4s, v3.4s, v2.4s518; CHECK-SD-NOFP16-NEXT:    fsub v1.4s, v0.4s, v1.4s519; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v2.4s520; CHECK-SD-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s521; CHECK-SD-NOFP16-NEXT:    ret522;523; CHECK-SD-FP16-LABEL: fsub_v7f16:524; CHECK-SD-FP16:       // %bb.0: // %entry525; CHECK-SD-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h526; CHECK-SD-FP16-NEXT:    ret527;528; CHECK-GI-NOFP16-LABEL: fsub_v7f16:529; CHECK-GI-NOFP16:       // %bb.0: // %entry530; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v0.4h531; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v1.4h532; CHECK-GI-NOFP16-NEXT:    mov v4.h[0], v0.h[4]533; CHECK-GI-NOFP16-NEXT:    fsub v2.4s, v2.4s, v3.4s534; CHECK-GI-NOFP16-NEXT:    mov v3.h[0], v1.h[4]535; CHECK-GI-NOFP16-NEXT:    mov v4.h[1], v0.h[5]536; CHECK-GI-NOFP16-NEXT:    mov v3.h[1], v1.h[5]537; CHECK-GI-NOFP16-NEXT:    fcvtn v2.4h, v2.4s538; CHECK-GI-NOFP16-NEXT:    mov v4.h[2], v0.h[6]539; CHECK-GI-NOFP16-NEXT:    mov v3.h[2], v1.h[6]540; CHECK-GI-NOFP16-NEXT:    mov v0.h[0], v2.h[0]541; CHECK-GI-NOFP16-NEXT:    fcvtl v1.4s, v4.4h542; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v3.4h543; CHECK-GI-NOFP16-NEXT:    mov v0.h[1], v2.h[1]544; CHECK-GI-NOFP16-NEXT:    fsub v1.4s, v1.4s, v3.4s545; CHECK-GI-NOFP16-NEXT:    mov v0.h[2], v2.h[2]546; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v1.4s547; CHECK-GI-NOFP16-NEXT:    mov v0.h[3], v2.h[3]548; CHECK-GI-NOFP16-NEXT:    mov v0.h[4], v1.h[0]549; CHECK-GI-NOFP16-NEXT:    mov v0.h[5], v1.h[1]550; CHECK-GI-NOFP16-NEXT:    mov v0.h[6], v1.h[2]551; CHECK-GI-NOFP16-NEXT:    ret552;553; CHECK-GI-FP16-LABEL: fsub_v7f16:554; CHECK-GI-FP16:       // %bb.0: // %entry555; CHECK-GI-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h556; CHECK-GI-FP16-NEXT:    ret557entry:558  %c = fsub <7 x half> %a, %b559  ret <7 x half> %c560}561 562define <4 x half> @fsub_v4f16(<4 x half> %a, <4 x half> %b) {563; CHECK-SD-NOFP16-LABEL: fsub_v4f16:564; CHECK-SD-NOFP16:       // %bb.0: // %entry565; CHECK-SD-NOFP16-NEXT:    fcvtl v1.4s, v1.4h566; CHECK-SD-NOFP16-NEXT:    fcvtl v0.4s, v0.4h567; CHECK-SD-NOFP16-NEXT:    fsub v0.4s, v0.4s, v1.4s568; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v0.4s569; CHECK-SD-NOFP16-NEXT:    ret570;571; CHECK-SD-FP16-LABEL: fsub_v4f16:572; CHECK-SD-FP16:       // %bb.0: // %entry573; CHECK-SD-FP16-NEXT:    fsub v0.4h, v0.4h, v1.4h574; CHECK-SD-FP16-NEXT:    ret575;576; CHECK-GI-NOFP16-LABEL: fsub_v4f16:577; CHECK-GI-NOFP16:       // %bb.0: // %entry578; CHECK-GI-NOFP16-NEXT:    fcvtl v0.4s, v0.4h579; CHECK-GI-NOFP16-NEXT:    fcvtl v1.4s, v1.4h580; CHECK-GI-NOFP16-NEXT:    fsub v0.4s, v0.4s, v1.4s581; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v0.4s582; CHECK-GI-NOFP16-NEXT:    ret583;584; CHECK-GI-FP16-LABEL: fsub_v4f16:585; CHECK-GI-FP16:       // %bb.0: // %entry586; CHECK-GI-FP16-NEXT:    fsub v0.4h, v0.4h, v1.4h587; CHECK-GI-FP16-NEXT:    ret588entry:589  %c = fsub <4 x half> %a, %b590  ret <4 x half> %c591}592 593define <8 x half> @fsub_v8f16(<8 x half> %a, <8 x half> %b) {594; CHECK-SD-NOFP16-LABEL: fsub_v8f16:595; CHECK-SD-NOFP16:       // %bb.0: // %entry596; CHECK-SD-NOFP16-NEXT:    fcvtl v2.4s, v1.4h597; CHECK-SD-NOFP16-NEXT:    fcvtl v3.4s, v0.4h598; CHECK-SD-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h599; CHECK-SD-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h600; CHECK-SD-NOFP16-NEXT:    fsub v2.4s, v3.4s, v2.4s601; CHECK-SD-NOFP16-NEXT:    fsub v1.4s, v0.4s, v1.4s602; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v2.4s603; CHECK-SD-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s604; CHECK-SD-NOFP16-NEXT:    ret605;606; CHECK-SD-FP16-LABEL: fsub_v8f16:607; CHECK-SD-FP16:       // %bb.0: // %entry608; CHECK-SD-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h609; CHECK-SD-FP16-NEXT:    ret610;611; CHECK-GI-NOFP16-LABEL: fsub_v8f16:612; CHECK-GI-NOFP16:       // %bb.0: // %entry613; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v0.4h614; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v1.4h615; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h616; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h617; CHECK-GI-NOFP16-NEXT:    fsub v2.4s, v2.4s, v3.4s618; CHECK-GI-NOFP16-NEXT:    fsub v1.4s, v0.4s, v1.4s619; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v2.4s620; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s621; CHECK-GI-NOFP16-NEXT:    ret622;623; CHECK-GI-FP16-LABEL: fsub_v8f16:624; CHECK-GI-FP16:       // %bb.0: // %entry625; CHECK-GI-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h626; CHECK-GI-FP16-NEXT:    ret627entry:628  %c = fsub <8 x half> %a, %b629  ret <8 x half> %c630}631 632define <16 x half> @fsub_v16f16(<16 x half> %a, <16 x half> %b) {633; CHECK-SD-NOFP16-LABEL: fsub_v16f16:634; CHECK-SD-NOFP16:       // %bb.0: // %entry635; CHECK-SD-NOFP16-NEXT:    fcvtl v4.4s, v2.4h636; CHECK-SD-NOFP16-NEXT:    fcvtl v5.4s, v0.4h637; CHECK-SD-NOFP16-NEXT:    fcvtl v6.4s, v3.4h638; CHECK-SD-NOFP16-NEXT:    fcvtl v7.4s, v1.4h639; CHECK-SD-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h640; CHECK-SD-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h641; CHECK-SD-NOFP16-NEXT:    fcvtl2 v3.4s, v3.8h642; CHECK-SD-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h643; CHECK-SD-NOFP16-NEXT:    fsub v4.4s, v5.4s, v4.4s644; CHECK-SD-NOFP16-NEXT:    fsub v5.4s, v7.4s, v6.4s645; CHECK-SD-NOFP16-NEXT:    fsub v2.4s, v0.4s, v2.4s646; CHECK-SD-NOFP16-NEXT:    fsub v3.4s, v1.4s, v3.4s647; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v4.4s648; CHECK-SD-NOFP16-NEXT:    fcvtn v1.4h, v5.4s649; CHECK-SD-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s650; CHECK-SD-NOFP16-NEXT:    fcvtn2 v1.8h, v3.4s651; CHECK-SD-NOFP16-NEXT:    ret652;653; CHECK-SD-FP16-LABEL: fsub_v16f16:654; CHECK-SD-FP16:       // %bb.0: // %entry655; CHECK-SD-FP16-NEXT:    fsub v1.8h, v1.8h, v3.8h656; CHECK-SD-FP16-NEXT:    fsub v0.8h, v0.8h, v2.8h657; CHECK-SD-FP16-NEXT:    ret658;659; CHECK-GI-NOFP16-LABEL: fsub_v16f16:660; CHECK-GI-NOFP16:       // %bb.0: // %entry661; CHECK-GI-NOFP16-NEXT:    fcvtl v4.4s, v0.4h662; CHECK-GI-NOFP16-NEXT:    fcvtl v5.4s, v1.4h663; CHECK-GI-NOFP16-NEXT:    fcvtl v6.4s, v2.4h664; CHECK-GI-NOFP16-NEXT:    fcvtl v7.4s, v3.4h665; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h666; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h667; CHECK-GI-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h668; CHECK-GI-NOFP16-NEXT:    fcvtl2 v3.4s, v3.8h669; CHECK-GI-NOFP16-NEXT:    fsub v4.4s, v4.4s, v6.4s670; CHECK-GI-NOFP16-NEXT:    fsub v5.4s, v5.4s, v7.4s671; CHECK-GI-NOFP16-NEXT:    fsub v2.4s, v0.4s, v2.4s672; CHECK-GI-NOFP16-NEXT:    fsub v3.4s, v1.4s, v3.4s673; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v4.4s674; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v5.4s675; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s676; CHECK-GI-NOFP16-NEXT:    fcvtn2 v1.8h, v3.4s677; CHECK-GI-NOFP16-NEXT:    ret678;679; CHECK-GI-FP16-LABEL: fsub_v16f16:680; CHECK-GI-FP16:       // %bb.0: // %entry681; CHECK-GI-FP16-NEXT:    fsub v0.8h, v0.8h, v2.8h682; CHECK-GI-FP16-NEXT:    fsub v1.8h, v1.8h, v3.8h683; CHECK-GI-FP16-NEXT:    ret684entry:685  %c = fsub <16 x half> %a, %b686  ret <16 x half> %c687}688