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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SDAGISEL3; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FASTISEL4; RUN: llc -mtriple=aarch64-apple-darwin -global-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL5 6; First test the different supported value types for select.7define zeroext i1 @select_i1(i1 zeroext %c, i1 zeroext %a, i1 zeroext %b) {8; CHECK-SDAGISEL-LABEL: select_i1:9; CHECK-SDAGISEL: ; %bb.0:10; CHECK-SDAGISEL-NEXT: cmp w0, #011; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne12; CHECK-SDAGISEL-NEXT: ret13;14; CHECK-FASTISEL-LABEL: select_i1:15; CHECK-FASTISEL: ; %bb.0:16; CHECK-FASTISEL-NEXT: tst w0, #0x117; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne18; CHECK-FASTISEL-NEXT: and w0, w8, #0x119; CHECK-FASTISEL-NEXT: ret20;21; CHECK-GISEL-LABEL: select_i1:22; CHECK-GISEL: ; %bb.0:23; CHECK-GISEL-NEXT: tst w0, #0x124; CHECK-GISEL-NEXT: csel w0, w1, w2, ne25; CHECK-GISEL-NEXT: ret26 %1 = select i1 %c, i1 %a, i1 %b27 ret i1 %128}29 30define zeroext i8 @select_i8(i1 zeroext %c, i8 zeroext %a, i8 zeroext %b) {31; CHECK-SDAGISEL-LABEL: select_i8:32; CHECK-SDAGISEL: ; %bb.0:33; CHECK-SDAGISEL-NEXT: cmp w0, #034; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne35; CHECK-SDAGISEL-NEXT: ret36;37; CHECK-FASTISEL-LABEL: select_i8:38; CHECK-FASTISEL: ; %bb.0:39; CHECK-FASTISEL-NEXT: tst w0, #0x140; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne41; CHECK-FASTISEL-NEXT: uxtb w0, w842; CHECK-FASTISEL-NEXT: ret43;44; CHECK-GISEL-LABEL: select_i8:45; CHECK-GISEL: ; %bb.0:46; CHECK-GISEL-NEXT: tst w0, #0x147; CHECK-GISEL-NEXT: csel w0, w1, w2, ne48; CHECK-GISEL-NEXT: ret49 %1 = select i1 %c, i8 %a, i8 %b50 ret i8 %151}52 53define zeroext i16 @select_i16(i1 zeroext %c, i16 zeroext %a, i16 zeroext %b) {54; CHECK-SDAGISEL-LABEL: select_i16:55; CHECK-SDAGISEL: ; %bb.0:56; CHECK-SDAGISEL-NEXT: cmp w0, #057; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne58; CHECK-SDAGISEL-NEXT: ret59;60; CHECK-FASTISEL-LABEL: select_i16:61; CHECK-FASTISEL: ; %bb.0:62; CHECK-FASTISEL-NEXT: tst w0, #0x163; CHECK-FASTISEL-NEXT: csel w8, w1, w2, ne64; CHECK-FASTISEL-NEXT: uxth w0, w865; CHECK-FASTISEL-NEXT: ret66;67; CHECK-GISEL-LABEL: select_i16:68; CHECK-GISEL: ; %bb.0:69; CHECK-GISEL-NEXT: tst w0, #0x170; CHECK-GISEL-NEXT: csel w0, w1, w2, ne71; CHECK-GISEL-NEXT: ret72 %1 = select i1 %c, i16 %a, i16 %b73 ret i16 %174}75 76define i32 @select_i32(i1 zeroext %c, i32 %a, i32 %b) {77; CHECK-SDAGISEL-LABEL: select_i32:78; CHECK-SDAGISEL: ; %bb.0:79; CHECK-SDAGISEL-NEXT: cmp w0, #080; CHECK-SDAGISEL-NEXT: csel w0, w1, w2, ne81; CHECK-SDAGISEL-NEXT: ret82;83; CHECK-FASTISEL-LABEL: select_i32:84; CHECK-FASTISEL: ; %bb.0:85; CHECK-FASTISEL-NEXT: tst w0, #0x186; CHECK-FASTISEL-NEXT: csel w0, w1, w2, ne87; CHECK-FASTISEL-NEXT: ret88;89; CHECK-GISEL-LABEL: select_i32:90; CHECK-GISEL: ; %bb.0:91; CHECK-GISEL-NEXT: tst w0, #0x192; CHECK-GISEL-NEXT: csel w0, w1, w2, ne93; CHECK-GISEL-NEXT: ret94 %1 = select i1 %c, i32 %a, i32 %b95 ret i32 %196}97 98define i64 @select_i64(i1 zeroext %c, i64 %a, i64 %b) {99; CHECK-SDAGISEL-LABEL: select_i64:100; CHECK-SDAGISEL: ; %bb.0:101; CHECK-SDAGISEL-NEXT: cmp w0, #0102; CHECK-SDAGISEL-NEXT: csel x0, x1, x2, ne103; CHECK-SDAGISEL-NEXT: ret104;105; CHECK-FASTISEL-LABEL: select_i64:106; CHECK-FASTISEL: ; %bb.0:107; CHECK-FASTISEL-NEXT: tst w0, #0x1108; CHECK-FASTISEL-NEXT: csel x0, x1, x2, ne109; CHECK-FASTISEL-NEXT: ret110;111; CHECK-GISEL-LABEL: select_i64:112; CHECK-GISEL: ; %bb.0:113; CHECK-GISEL-NEXT: tst w0, #0x1114; CHECK-GISEL-NEXT: csel x0, x1, x2, ne115; CHECK-GISEL-NEXT: ret116 %1 = select i1 %c, i64 %a, i64 %b117 ret i64 %1118}119 120define float @select_f32(i1 zeroext %c, float %a, float %b) {121; CHECK-SDAGISEL-LABEL: select_f32:122; CHECK-SDAGISEL: ; %bb.0:123; CHECK-SDAGISEL-NEXT: cmp w0, #0124; CHECK-SDAGISEL-NEXT: fcsel s0, s0, s1, ne125; CHECK-SDAGISEL-NEXT: ret126;127; CHECK-FASTISEL-LABEL: select_f32:128; CHECK-FASTISEL: ; %bb.0:129; CHECK-FASTISEL-NEXT: tst w0, #0x1130; CHECK-FASTISEL-NEXT: fcsel s0, s0, s1, ne131; CHECK-FASTISEL-NEXT: ret132;133; CHECK-GISEL-LABEL: select_f32:134; CHECK-GISEL: ; %bb.0:135; CHECK-GISEL-NEXT: tst w0, #0x1136; CHECK-GISEL-NEXT: fcsel s0, s0, s1, ne137; CHECK-GISEL-NEXT: ret138 %1 = select i1 %c, float %a, float %b139 ret float %1140}141 142define double @select_f64(i1 zeroext %c, double %a, double %b) {143; CHECK-SDAGISEL-LABEL: select_f64:144; CHECK-SDAGISEL: ; %bb.0:145; CHECK-SDAGISEL-NEXT: cmp w0, #0146; CHECK-SDAGISEL-NEXT: fcsel d0, d0, d1, ne147; CHECK-SDAGISEL-NEXT: ret148;149; CHECK-FASTISEL-LABEL: select_f64:150; CHECK-FASTISEL: ; %bb.0:151; CHECK-FASTISEL-NEXT: tst w0, #0x1152; CHECK-FASTISEL-NEXT: fcsel d0, d0, d1, ne153; CHECK-FASTISEL-NEXT: ret154;155; CHECK-GISEL-LABEL: select_f64:156; CHECK-GISEL: ; %bb.0:157; CHECK-GISEL-NEXT: tst w0, #0x1158; CHECK-GISEL-NEXT: fcsel d0, d0, d1, ne159; CHECK-GISEL-NEXT: ret160 %1 = select i1 %c, double %a, double %b161 ret double %1162}163 164; Now test the folding of all compares.165define float @select_fcmp_false(float %x, float %a, float %b) {166; CHECK-SDAGISEL-LABEL: select_fcmp_false:167; CHECK-SDAGISEL: ; %bb.0:168; CHECK-SDAGISEL-NEXT: fmov s0, s2169; CHECK-SDAGISEL-NEXT: ret170;171; CHECK-FASTISEL-LABEL: select_fcmp_false:172; CHECK-FASTISEL: ; %bb.0:173; CHECK-FASTISEL-NEXT: fmov s0, s2174; CHECK-FASTISEL-NEXT: ret175;176; CHECK-GISEL-LABEL: select_fcmp_false:177; CHECK-GISEL: ; %bb.0:178; CHECK-GISEL-NEXT: fcmp s0, s0179; CHECK-GISEL-NEXT: fcsel s0, s1, s2, gt180; CHECK-GISEL-NEXT: ret181 %1 = fcmp ogt float %x, %x182 %2 = select i1 %1, float %a, float %b183 ret float %2184}185 186define float @select_fcmp_ogt(float %x, float %y, float %a, float %b) {187; CHECK-LABEL: select_fcmp_ogt:188; CHECK: ; %bb.0:189; CHECK-NEXT: fcmp s0, s1190; CHECK-NEXT: fcsel s0, s2, s3, gt191; CHECK-NEXT: ret192 %1 = fcmp ogt float %x, %y193 %2 = select i1 %1, float %a, float %b194 ret float %2195}196 197define float @select_fcmp_oge(float %x, float %y, float %a, float %b) {198; CHECK-LABEL: select_fcmp_oge:199; CHECK: ; %bb.0:200; CHECK-NEXT: fcmp s0, s1201; CHECK-NEXT: fcsel s0, s2, s3, ge202; CHECK-NEXT: ret203 %1 = fcmp oge float %x, %y204 %2 = select i1 %1, float %a, float %b205 ret float %2206}207 208define float @select_fcmp_olt(float %x, float %y, float %a, float %b) {209; CHECK-LABEL: select_fcmp_olt:210; CHECK: ; %bb.0:211; CHECK-NEXT: fcmp s0, s1212; CHECK-NEXT: fcsel s0, s2, s3, mi213; CHECK-NEXT: ret214 %1 = fcmp olt float %x, %y215 %2 = select i1 %1, float %a, float %b216 ret float %2217}218 219define float @select_fcmp_ole(float %x, float %y, float %a, float %b) {220; CHECK-LABEL: select_fcmp_ole:221; CHECK: ; %bb.0:222; CHECK-NEXT: fcmp s0, s1223; CHECK-NEXT: fcsel s0, s2, s3, ls224; CHECK-NEXT: ret225 %1 = fcmp ole float %x, %y226 %2 = select i1 %1, float %a, float %b227 ret float %2228}229 230define float @select_fcmp_one(float %x, float %y, float %a, float %b) {231; CHECK-SDAGISEL-LABEL: select_fcmp_one:232; CHECK-SDAGISEL: ; %bb.0:233; CHECK-SDAGISEL-NEXT: fcmp s0, s1234; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s3, mi235; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s0, gt236; CHECK-SDAGISEL-NEXT: ret237;238; CHECK-FASTISEL-LABEL: select_fcmp_one:239; CHECK-FASTISEL: ; %bb.0:240; CHECK-FASTISEL-NEXT: fcmp s0, s1241; CHECK-FASTISEL-NEXT: fcsel s0, s2, s3, mi242; CHECK-FASTISEL-NEXT: fcsel s0, s2, s0, gt243; CHECK-FASTISEL-NEXT: ret244;245; CHECK-GISEL-LABEL: select_fcmp_one:246; CHECK-GISEL: ; %bb.0:247; CHECK-GISEL-NEXT: fcmp s0, s1248; CHECK-GISEL-NEXT: cset w8, mi249; CHECK-GISEL-NEXT: cset w9, gt250; CHECK-GISEL-NEXT: orr w8, w8, w9251; CHECK-GISEL-NEXT: tst w8, #0x1252; CHECK-GISEL-NEXT: fcsel s0, s2, s3, ne253; CHECK-GISEL-NEXT: ret254 %1 = fcmp one float %x, %y255 %2 = select i1 %1, float %a, float %b256 ret float %2257}258 259define float @select_fcmp_ord(float %x, float %y, float %a, float %b) {260; CHECK-LABEL: select_fcmp_ord:261; CHECK: ; %bb.0:262; CHECK-NEXT: fcmp s0, s1263; CHECK-NEXT: fcsel s0, s2, s3, vc264; CHECK-NEXT: ret265 %1 = fcmp ord float %x, %y266 %2 = select i1 %1, float %a, float %b267 ret float %2268}269 270define float @select_fcmp_uno(float %x, float %y, float %a, float %b) {271; CHECK-LABEL: select_fcmp_uno:272; CHECK: ; %bb.0:273; CHECK-NEXT: fcmp s0, s1274; CHECK-NEXT: fcsel s0, s2, s3, vs275; CHECK-NEXT: ret276 %1 = fcmp uno float %x, %y277 %2 = select i1 %1, float %a, float %b278 ret float %2279}280 281define float @select_fcmp_ueq(float %x, float %y, float %a, float %b) {282; CHECK-SDAGISEL-LABEL: select_fcmp_ueq:283; CHECK-SDAGISEL: ; %bb.0:284; CHECK-SDAGISEL-NEXT: fcmp s0, s1285; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s3, eq286; CHECK-SDAGISEL-NEXT: fcsel s0, s2, s0, vs287; CHECK-SDAGISEL-NEXT: ret288;289; CHECK-FASTISEL-LABEL: select_fcmp_ueq:290; CHECK-FASTISEL: ; %bb.0:291; CHECK-FASTISEL-NEXT: fcmp s0, s1292; CHECK-FASTISEL-NEXT: fcsel s0, s2, s3, eq293; CHECK-FASTISEL-NEXT: fcsel s0, s2, s0, vs294; CHECK-FASTISEL-NEXT: ret295;296; CHECK-GISEL-LABEL: select_fcmp_ueq:297; CHECK-GISEL: ; %bb.0:298; CHECK-GISEL-NEXT: fcmp s0, s1299; CHECK-GISEL-NEXT: cset w8, eq300; CHECK-GISEL-NEXT: cset w9, vs301; CHECK-GISEL-NEXT: orr w8, w8, w9302; CHECK-GISEL-NEXT: tst w8, #0x1303; CHECK-GISEL-NEXT: fcsel s0, s2, s3, ne304; CHECK-GISEL-NEXT: ret305 %1 = fcmp ueq float %x, %y306 %2 = select i1 %1, float %a, float %b307 ret float %2308}309 310define float @select_fcmp_ugt(float %x, float %y, float %a, float %b) {311; CHECK-LABEL: select_fcmp_ugt:312; CHECK: ; %bb.0:313; CHECK-NEXT: fcmp s0, s1314; CHECK-NEXT: fcsel s0, s2, s3, hi315; CHECK-NEXT: ret316 %1 = fcmp ugt float %x, %y317 %2 = select i1 %1, float %a, float %b318 ret float %2319}320 321define float @select_fcmp_uge(float %x, float %y, float %a, float %b) {322; CHECK-LABEL: select_fcmp_uge:323; CHECK: ; %bb.0:324; CHECK-NEXT: fcmp s0, s1325; CHECK-NEXT: fcsel s0, s2, s3, pl326; CHECK-NEXT: ret327 %1 = fcmp uge float %x, %y328 %2 = select i1 %1, float %a, float %b329 ret float %2330}331 332define float @select_fcmp_ult(float %x, float %y, float %a, float %b) {333; CHECK-LABEL: select_fcmp_ult:334; CHECK: ; %bb.0:335; CHECK-NEXT: fcmp s0, s1336; CHECK-NEXT: fcsel s0, s2, s3, lt337; CHECK-NEXT: ret338 %1 = fcmp ult float %x, %y339 %2 = select i1 %1, float %a, float %b340 ret float %2341}342 343 344define float @select_fcmp_ule(float %x, float %y, float %a, float %b) {345; CHECK-LABEL: select_fcmp_ule:346; CHECK: ; %bb.0:347; CHECK-NEXT: fcmp s0, s1348; CHECK-NEXT: fcsel s0, s2, s3, le349; CHECK-NEXT: ret350 %1 = fcmp ule float %x, %y351 %2 = select i1 %1, float %a, float %b352 ret float %2353}354 355define float @select_fcmp_une(float %x, float %y, float %a, float %b) {356; CHECK-LABEL: select_fcmp_une:357; CHECK: ; %bb.0:358; CHECK-NEXT: fcmp s0, s1359; CHECK-NEXT: fcsel s0, s2, s3, ne360; CHECK-NEXT: ret361 %1 = fcmp une float %x, %y362 %2 = select i1 %1, float %a, float %b363 ret float %2364}365 366define float @select_fcmp_true(float %x, float %a, float %b) {367; CHECK-SDAGISEL-LABEL: select_fcmp_true:368; CHECK-SDAGISEL: ; %bb.0:369; CHECK-SDAGISEL-NEXT: fmov s0, s1370; CHECK-SDAGISEL-NEXT: ret371;372; CHECK-FASTISEL-LABEL: select_fcmp_true:373; CHECK-FASTISEL: ; %bb.0:374; CHECK-FASTISEL-NEXT: fmov s0, s1375; CHECK-FASTISEL-NEXT: ret376;377; CHECK-GISEL-LABEL: select_fcmp_true:378; CHECK-GISEL: ; %bb.0:379; CHECK-GISEL-NEXT: fcmp s0, s0380; CHECK-GISEL-NEXT: cset w8, eq381; CHECK-GISEL-NEXT: cset w9, vs382; CHECK-GISEL-NEXT: orr w8, w8, w9383; CHECK-GISEL-NEXT: tst w8, #0x1384; CHECK-GISEL-NEXT: fcsel s0, s1, s2, ne385; CHECK-GISEL-NEXT: ret386 %1 = fcmp ueq float %x, %x387 %2 = select i1 %1, float %a, float %b388 ret float %2389}390 391define float @select_icmp_eq(i32 %x, i32 %y, float %a, float %b) {392; CHECK-LABEL: select_icmp_eq:393; CHECK: ; %bb.0:394; CHECK-NEXT: cmp w0, w1395; CHECK-NEXT: fcsel s0, s0, s1, eq396; CHECK-NEXT: ret397 %1 = icmp eq i32 %x, %y398 %2 = select i1 %1, float %a, float %b399 ret float %2400}401 402define float @select_icmp_ne(i32 %x, i32 %y, float %a, float %b) {403; CHECK-LABEL: select_icmp_ne:404; CHECK: ; %bb.0:405; CHECK-NEXT: cmp w0, w1406; CHECK-NEXT: fcsel s0, s0, s1, ne407; CHECK-NEXT: ret408 %1 = icmp ne i32 %x, %y409 %2 = select i1 %1, float %a, float %b410 ret float %2411}412 413define float @select_icmp_ugt(i32 %x, i32 %y, float %a, float %b) {414; CHECK-LABEL: select_icmp_ugt:415; CHECK: ; %bb.0:416; CHECK-NEXT: cmp w0, w1417; CHECK-NEXT: fcsel s0, s0, s1, hi418; CHECK-NEXT: ret419 %1 = icmp ugt i32 %x, %y420 %2 = select i1 %1, float %a, float %b421 ret float %2422}423 424define float @select_icmp_uge(i32 %x, i32 %y, float %a, float %b) {425; CHECK-LABEL: select_icmp_uge:426; CHECK: ; %bb.0:427; CHECK-NEXT: cmp w0, w1428; CHECK-NEXT: fcsel s0, s0, s1, hs429; CHECK-NEXT: ret430 %1 = icmp uge i32 %x, %y431 %2 = select i1 %1, float %a, float %b432 ret float %2433}434 435define float @select_icmp_ult(i32 %x, i32 %y, float %a, float %b) {436; CHECK-LABEL: select_icmp_ult:437; CHECK: ; %bb.0:438; CHECK-NEXT: cmp w0, w1439; CHECK-NEXT: fcsel s0, s0, s1, lo440; CHECK-NEXT: ret441 %1 = icmp ult i32 %x, %y442 %2 = select i1 %1, float %a, float %b443 ret float %2444}445 446define float @select_icmp_ule(i32 %x, i32 %y, float %a, float %b) {447; CHECK-LABEL: select_icmp_ule:448; CHECK: ; %bb.0:449; CHECK-NEXT: cmp w0, w1450; CHECK-NEXT: fcsel s0, s0, s1, ls451; CHECK-NEXT: ret452 %1 = icmp ule i32 %x, %y453 %2 = select i1 %1, float %a, float %b454 ret float %2455}456 457define float @select_icmp_sgt(i32 %x, i32 %y, float %a, float %b) {458; CHECK-LABEL: select_icmp_sgt:459; CHECK: ; %bb.0:460; CHECK-NEXT: cmp w0, w1461; CHECK-NEXT: fcsel s0, s0, s1, gt462; CHECK-NEXT: ret463 %1 = icmp sgt i32 %x, %y464 %2 = select i1 %1, float %a, float %b465 ret float %2466}467 468define float @select_icmp_sge(i32 %x, i32 %y, float %a, float %b) {469; CHECK-LABEL: select_icmp_sge:470; CHECK: ; %bb.0:471; CHECK-NEXT: cmp w0, w1472; CHECK-NEXT: fcsel s0, s0, s1, ge473; CHECK-NEXT: ret474 %1 = icmp sge i32 %x, %y475 %2 = select i1 %1, float %a, float %b476 ret float %2477}478 479define float @select_icmp_slt(i32 %x, i32 %y, float %a, float %b) {480; CHECK-LABEL: select_icmp_slt:481; CHECK: ; %bb.0:482; CHECK-NEXT: cmp w0, w1483; CHECK-NEXT: fcsel s0, s0, s1, lt484; CHECK-NEXT: ret485 %1 = icmp slt i32 %x, %y486 %2 = select i1 %1, float %a, float %b487 ret float %2488}489 490define float @select_icmp_sle(i32 %x, i32 %y, float %a, float %b) {491; CHECK-LABEL: select_icmp_sle:492; CHECK: ; %bb.0:493; CHECK-NEXT: cmp w0, w1494; CHECK-NEXT: fcsel s0, s0, s1, le495; CHECK-NEXT: ret496 %1 = icmp sle i32 %x, %y497 %2 = select i1 %1, float %a, float %b498 ret float %2499}500 501; Test peephole optimizations for select.502define zeroext i1 @select_opt1(i1 zeroext %c, i1 zeroext %a) {503; CHECK-LABEL: select_opt1:504; CHECK: ; %bb.0:505; CHECK-NEXT: orr w8, w0, w1506; CHECK-NEXT: and w0, w8, #0x1507; CHECK-NEXT: ret508 %1 = select i1 %c, i1 true, i1 %a509 ret i1 %1510}511 512define zeroext i1 @select_opt2(i1 zeroext %c, i1 zeroext %a) {513; CHECK-SDAGISEL-LABEL: select_opt2:514; CHECK-SDAGISEL: ; %bb.0:515; CHECK-SDAGISEL-NEXT: orn w8, w1, w0516; CHECK-SDAGISEL-NEXT: and w0, w8, #0x1517; CHECK-SDAGISEL-NEXT: ret518;519; CHECK-FASTISEL-LABEL: select_opt2:520; CHECK-FASTISEL: ; %bb.0:521; CHECK-FASTISEL-NEXT: eor w8, w0, #0x1522; CHECK-FASTISEL-NEXT: orr w8, w8, w1523; CHECK-FASTISEL-NEXT: and w0, w8, #0x1524; CHECK-FASTISEL-NEXT: ret525;526; CHECK-GISEL-LABEL: select_opt2:527; CHECK-GISEL: ; %bb.0:528; CHECK-GISEL-NEXT: eor w8, w0, #0x1529; CHECK-GISEL-NEXT: orr w8, w8, w1530; CHECK-GISEL-NEXT: and w0, w8, #0x1531; CHECK-GISEL-NEXT: ret532 %1 = select i1 %c, i1 %a, i1 true533 ret i1 %1534}535 536define zeroext i1 @select_opt3(i1 zeroext %c, i1 zeroext %a) {537; CHECK-SDAGISEL-LABEL: select_opt3:538; CHECK-SDAGISEL: ; %bb.0:539; CHECK-SDAGISEL-NEXT: eor w8, w0, #0x1540; CHECK-SDAGISEL-NEXT: and w0, w8, w1541; CHECK-SDAGISEL-NEXT: ret542;543; CHECK-FASTISEL-LABEL: select_opt3:544; CHECK-FASTISEL: ; %bb.0:545; CHECK-FASTISEL-NEXT: bic w8, w1, w0546; CHECK-FASTISEL-NEXT: and w0, w8, #0x1547; CHECK-FASTISEL-NEXT: ret548;549; CHECK-GISEL-LABEL: select_opt3:550; CHECK-GISEL: ; %bb.0:551; CHECK-GISEL-NEXT: eor w8, w0, #0x1552; CHECK-GISEL-NEXT: and w0, w8, w1553; CHECK-GISEL-NEXT: ret554 %1 = select i1 %c, i1 false, i1 %a555 ret i1 %1556}557 558define zeroext i1 @select_opt4(i1 zeroext %c, i1 zeroext %a) {559; CHECK-SDAGISEL-LABEL: select_opt4:560; CHECK-SDAGISEL: ; %bb.0:561; CHECK-SDAGISEL-NEXT: and w0, w0, w1562; CHECK-SDAGISEL-NEXT: ret563;564; CHECK-FASTISEL-LABEL: select_opt4:565; CHECK-FASTISEL: ; %bb.0:566; CHECK-FASTISEL-NEXT: and w8, w0, w1567; CHECK-FASTISEL-NEXT: and w0, w8, #0x1568; CHECK-FASTISEL-NEXT: ret569;570; CHECK-GISEL-LABEL: select_opt4:571; CHECK-GISEL: ; %bb.0:572; CHECK-GISEL-NEXT: and w0, w0, w1573; CHECK-GISEL-NEXT: ret574 %1 = select i1 %c, i1 %a, i1 false575 ret i1 %1576}577