312 lines · plain
1; RUN: llc -disable-peephole -aarch64-enable-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck %s2; RUN: llc -disable-peephole -fast-isel -fast-isel-abort=1 -aarch64-enable-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefix=CHECK --check-prefix=FAST %s3 4define i32 @icmp_eq_i8(i8 zeroext %a) {5; CHECK-LABEL: icmp_eq_i86; CHECK: tbz {{w[0-9]+}}, #0, {{LBB.+_2}}7 %1 = and i8 %a, 18 %2 = icmp eq i8 %1, 09 br i1 %2, label %bb1, label %bb2, !prof !010bb1:11 ret i32 112bb2:13 ret i32 014}15 16define i32 @icmp_eq_i16(i16 zeroext %a) {17; CHECK-LABEL: icmp_eq_i1618; CHECK: tbz w0, #1, {{LBB.+_2}}19 %1 = and i16 %a, 220 %2 = icmp eq i16 %1, 021 br i1 %2, label %bb1, label %bb2, !prof !022bb1:23 ret i32 124bb2:25 ret i32 026}27 28define i32 @icmp_eq_i32(i32 %a) {29; CHECK-LABEL: icmp_eq_i3230; CHECK: tbz w0, #2, {{LBB.+_2}}31 %1 = and i32 %a, 432 %2 = icmp eq i32 %1, 033 br i1 %2, label %bb1, label %bb2, !prof !034bb1:35 ret i32 136bb2:37 ret i32 038}39 40define i32 @icmp_eq_i64_1(i64 %a) {41; CHECK-LABEL: icmp_eq_i64_142; CHECK: tbz w0, #3, {{LBB.+_2}}43 %1 = and i64 %a, 844 %2 = icmp eq i64 %1, 045 br i1 %2, label %bb1, label %bb2, !prof !046bb1:47 ret i32 148bb2:49 ret i32 050}51 52define i32 @icmp_eq_i64_2(i64 %a) {53; CHECK-LABEL: icmp_eq_i64_254; CHECK: tbz x0, #32, {{LBB.+_2}}55 %1 = and i64 %a, 429496729656 %2 = icmp eq i64 %1, 057 br i1 %2, label %bb1, label %bb2, !prof !058bb1:59 ret i32 160bb2:61 ret i32 062}63 64define i32 @icmp_ne_i8(i8 zeroext %a) {65; CHECK-LABEL: icmp_ne_i866; CHECK: tbnz w0, #0, {{LBB.+_2}}67 %1 = and i8 %a, 168 %2 = icmp ne i8 %1, 069 br i1 %2, label %bb1, label %bb2, !prof !070bb1:71 ret i32 172bb2:73 ret i32 074}75 76define i32 @icmp_ne_i16(i16 zeroext %a) {77; CHECK-LABEL: icmp_ne_i1678; CHECK: tbnz w0, #1, {{LBB.+_2}}79 %1 = and i16 %a, 280 %2 = icmp ne i16 %1, 081 br i1 %2, label %bb1, label %bb2, !prof !082bb1:83 ret i32 184bb2:85 ret i32 086}87 88define i32 @icmp_ne_i32(i32 %a) {89; CHECK-LABEL: icmp_ne_i3290; CHECK: tbnz w0, #2, {{LBB.+_2}}91 %1 = and i32 %a, 492 %2 = icmp ne i32 %1, 093 br i1 %2, label %bb1, label %bb2, !prof !094bb1:95 ret i32 196bb2:97 ret i32 098}99 100define i32 @icmp_ne_i64_1(i64 %a) {101; CHECK-LABEL: icmp_ne_i64_1102; CHECK: tbnz w0, #3, {{LBB.+_2}}103 %1 = and i64 %a, 8104 %2 = icmp ne i64 %1, 0105 br i1 %2, label %bb1, label %bb2, !prof !0106bb1:107 ret i32 1108bb2:109 ret i32 0110}111 112define i32 @icmp_ne_i64_2(i64 %a) {113; CHECK-LABEL: icmp_ne_i64_2114; CHECK: tbnz x0, #32, {{LBB.+_2}}115 %1 = and i64 %a, 4294967296116 %2 = icmp ne i64 %1, 0117 br i1 %2, label %bb1, label %bb2, !prof !0118bb1:119 ret i32 1120bb2:121 ret i32 0122}123 124define i32 @icmp_slt_i8(i8 zeroext %a) {125; FAST-LABEL: icmp_slt_i8126; FAST: tbnz w0, #7, {{LBB.+_2}}127 %1 = icmp slt i8 %a, 0128 br i1 %1, label %bb1, label %bb2, !prof !0129bb1:130 ret i32 1131bb2:132 ret i32 0133}134 135define i32 @icmp_slt_i16(i16 zeroext %a) {136; FAST-LABEL: icmp_slt_i16137; FAST: tbnz w0, #15, {{LBB.+_2}}138 %1 = icmp slt i16 %a, 0139 br i1 %1, label %bb1, label %bb2, !prof !0140bb1:141 ret i32 1142bb2:143 ret i32 0144}145 146define i32 @icmp_slt_i32(i32 %a) {147; CHECK-LABEL: icmp_slt_i32148; CHECK: tbnz w0, #31, {{LBB.+_2}}149 %1 = icmp slt i32 %a, 0150 br i1 %1, label %bb1, label %bb2, !prof !0151bb1:152 ret i32 1153bb2:154 ret i32 0155}156 157define i32 @icmp_slt_i64(i64 %a) {158; CHECK-LABEL: icmp_slt_i64159; CHECK: tbnz x0, #63, {{LBB.+_2}}160 %1 = icmp slt i64 %a, 0161 br i1 %1, label %bb1, label %bb2, !prof !0162bb1:163 ret i32 1164bb2:165 ret i32 0166}167 168define i32 @icmp_sge_i8(i8 zeroext %a) {169; FAST-LABEL: icmp_sge_i8170; FAST: tbz w0, #7, {{LBB.+_2}}171 %1 = icmp sge i8 %a, 0172 br i1 %1, label %bb1, label %bb2, !prof !0173bb1:174 ret i32 1175bb2:176 ret i32 0177}178 179define i32 @icmp_sge_i16(i16 zeroext %a) {180; FAST-LABEL: icmp_sge_i16181; FAST: tbz w0, #15, {{LBB.+_2}}182 %1 = icmp sge i16 %a, 0183 br i1 %1, label %bb1, label %bb2, !prof !0184bb1:185 ret i32 1186bb2:187 ret i32 0188}189 190define i32 @icmp_sle_i8(i8 zeroext %a) {191; FAST-LABEL: icmp_sle_i8192; FAST: tbnz w0, #7, {{LBB.+_2}}193 %1 = icmp sle i8 %a, -1194 br i1 %1, label %bb1, label %bb2, !prof !0195bb1:196 ret i32 1197bb2:198 ret i32 0199}200 201define i32 @icmp_sle_i16(i16 zeroext %a) {202; FAST-LABEL: icmp_sle_i16203; FAST: tbnz w0, #15, {{LBB.+_2}}204 %1 = icmp sle i16 %a, -1205 br i1 %1, label %bb1, label %bb2, !prof !0206bb1:207 ret i32 1208bb2:209 ret i32 0210}211 212define i32 @icmp_sle_i32(i32 %a) {213; CHECK-LABEL: icmp_sle_i32214; CHECK: tbnz w0, #31, {{LBB.+_2}}215 %1 = icmp sle i32 %a, -1216 br i1 %1, label %bb1, label %bb2, !prof !0217bb1:218 ret i32 1219bb2:220 ret i32 0221}222 223define i32 @icmp_sle_i64(i64 %a) {224; CHECK-LABEL: icmp_sle_i64225; CHECK: tbnz x0, #63, {{LBB.+_2}}226 %1 = icmp sle i64 %a, -1227 br i1 %1, label %bb1, label %bb2, !prof !0228bb1:229 ret i32 1230bb2:231 ret i32 0232}233 234define i32 @icmp_sgt_i8(i8 zeroext %a) {235; FAST-LABEL: icmp_sgt_i8236; FAST: tbz w0, #7, {{LBB.+_2}}237 %1 = icmp sgt i8 %a, -1238 br i1 %1, label %bb1, label %bb2, !prof !0239bb1:240 ret i32 1241bb2:242 ret i32 0243}244 245define i32 @icmp_sgt_i16(i16 zeroext %a) {246; FAST-LABEL: icmp_sgt_i16247; FAST: tbz w0, #15, {{LBB.+_2}}248 %1 = icmp sgt i16 %a, -1249 br i1 %1, label %bb1, label %bb2, !prof !0250bb1:251 ret i32 1252bb2:253 ret i32 0254}255 256define i32 @icmp_sgt_i32(i32 %a) {257; CHECK-LABEL: icmp_sgt_i32258; CHECK: tbz w0, #31, {{LBB.+_2}}259 %1 = icmp sgt i32 %a, -1260 br i1 %1, label %bb1, label %bb2, !prof !0261bb1:262 ret i32 1263bb2:264 ret i32 0265}266 267define i32 @icmp_sgt_i64(i64 %a) {268; FAST-LABEL: icmp_sgt_i64269; FAST: tbz x0, #63, {{LBB.+_2}}270 %1 = icmp sgt i64 %a, -1271 br i1 %1, label %bb1, label %bb2, !prof !0272bb1:273 ret i32 1274bb2:275 ret i32 0276}277 278; Test that we don't fold the 'and' instruction into the compare.279define i32 @icmp_eq_and_i32(i32 %a, i1 %c) {280; CHECK-LABEL: icmp_eq_and_i32281; CHECK: and [[REG:w[0-9]+]], w0, #0x3282; CHECK-NEXT: cbz [[REG]], {{LBB.+_3}}283 %1 = and i32 %a, 3284 br i1 %c, label %bb0, label %bb2285bb0:286 %2 = icmp eq i32 %1, 0287 br i1 %2, label %bb1, label %bb2, !prof !0288bb1:289 ret i32 1290bb2:291 ret i32 0292}293 294; Test that we do fold the 'and' instruction into the compare and295; generate a tbz instruction for the conditional branch.296define i32 @icmp_eq_and1bit_i32(i32 %a, i1 %c) {297; CHECK-LABEL: icmp_eq_and1bit_i32298; CHECK: tbz {{w[0-9]+}}, #2, {{LBB.+_3}}299 %1 = and i32 %a, 4300 br i1 %c, label %bb0, label %bb2301bb0:302 %2 = icmp eq i32 %1, 0303 br i1 %2, label %bb1, label %bb2, !prof !0304bb1:305 ret i32 1306bb2:307 ret i32 0308}309 310!0 = !{!"branch_weights", i32 0, i32 2147483647}311!1 = !{!"branch_weights", i32 2147483647, i32 0}312