153 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-none-linux-gnu %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-linux-gnu -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define {<2 x half>, <2 x half>} @vector_deinterleave_v2f16_v4f16(<4 x half> %vec) {6; CHECK-SD-LABEL: vector_deinterleave_v2f16_v4f16:7; CHECK-SD: // %bb.0:8; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q09; CHECK-SD-NEXT: dup v2.2s, v0.s[1]10; CHECK-SD-NEXT: mov v1.16b, v2.16b11; CHECK-SD-NEXT: zip1 v2.4h, v0.4h, v2.4h12; CHECK-SD-NEXT: mov v1.h[0], v0.h[1]13; CHECK-SD-NEXT: fmov d0, d214; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q115; CHECK-SD-NEXT: ret16;17; CHECK-GI-LABEL: vector_deinterleave_v2f16_v4f16:18; CHECK-GI: // %bb.0:19; CHECK-GI-NEXT: uzp1 v2.4h, v0.4h, v0.4h20; CHECK-GI-NEXT: uzp2 v1.4h, v0.4h, v0.4h21; CHECK-GI-NEXT: fmov d0, d222; CHECK-GI-NEXT: ret23 %retval = call {<2 x half>, <2 x half>} @llvm.vector.deinterleave2.v4f16(<4 x half> %vec)24 ret {<2 x half>, <2 x half>} %retval25}26 27define {<4 x half>, <4 x half>} @vector_deinterleave_v4f16_v8f16(<8 x half> %vec) {28; CHECK-LABEL: vector_deinterleave_v4f16_v8f16:29; CHECK: // %bb.0:30; CHECK-NEXT: uzp1 v2.8h, v0.8h, v0.8h31; CHECK-NEXT: uzp2 v1.8h, v0.8h, v0.8h32; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q133; CHECK-NEXT: fmov d0, d234; CHECK-NEXT: ret35 %retval = call {<4 x half>, <4 x half>} @llvm.vector.deinterleave2.v8f16(<8 x half> %vec)36 ret {<4 x half>, <4 x half>} %retval37}38 39define {<8 x half>, <8 x half>} @vector_deinterleave_v8f16_v16f16(<16 x half> %vec) {40; CHECK-LABEL: vector_deinterleave_v8f16_v16f16:41; CHECK: // %bb.0:42; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h43; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h44; CHECK-NEXT: mov v0.16b, v2.16b45; CHECK-NEXT: ret46 %retval = call {<8 x half>, <8 x half>} @llvm.vector.deinterleave2.v16f16(<16 x half> %vec)47 ret {<8 x half>, <8 x half>} %retval48}49 50define {<2 x float>, <2 x float>} @vector_deinterleave_v2f32_v4f32(<4 x float> %vec) {51; CHECK-SD-LABEL: vector_deinterleave_v2f32_v4f32:52; CHECK-SD: // %bb.0:53; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #854; CHECK-SD-NEXT: zip1 v2.2s, v0.2s, v1.2s55; CHECK-SD-NEXT: zip2 v1.2s, v0.2s, v1.2s56; CHECK-SD-NEXT: fmov d0, d257; CHECK-SD-NEXT: ret58;59; CHECK-GI-LABEL: vector_deinterleave_v2f32_v4f32:60; CHECK-GI: // %bb.0:61; CHECK-GI-NEXT: uzp1 v2.4s, v0.4s, v0.4s62; CHECK-GI-NEXT: uzp2 v1.4s, v0.4s, v0.4s63; CHECK-GI-NEXT: // kill: def $d1 killed $d1 killed $q164; CHECK-GI-NEXT: fmov d0, d265; CHECK-GI-NEXT: ret66 %retval = call {<2 x float>, <2 x float>} @llvm.vector.deinterleave2.v4f32(<4 x float> %vec)67 ret {<2 x float>, <2 x float>} %retval68}69 70define {<4 x float>, <4 x float>} @vector_deinterleave_v4f32_v8f32(<8 x float> %vec) {71; CHECK-LABEL: vector_deinterleave_v4f32_v8f32:72; CHECK: // %bb.0:73; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s74; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s75; CHECK-NEXT: mov v0.16b, v2.16b76; CHECK-NEXT: ret77 %retval = call {<4 x float>, <4 x float>} @llvm.vector.deinterleave2.v8f32(<8 x float> %vec)78ret {<4 x float>, <4 x float>} %retval79}80 81define {<2 x double>, <2 x double>} @vector_deinterleave_v2f64_v4f64(<4 x double> %vec) {82; CHECK-LABEL: vector_deinterleave_v2f64_v4f64:83; CHECK: // %bb.0:84; CHECK-NEXT: zip1 v2.2d, v0.2d, v1.2d85; CHECK-NEXT: zip2 v1.2d, v0.2d, v1.2d86; CHECK-NEXT: mov v0.16b, v2.16b87; CHECK-NEXT: ret88 %retval = call {<2 x double>, <2 x double>} @llvm.vector.deinterleave2.v4f64(<4 x double> %vec)89 ret {<2 x double>, <2 x double>} %retval90}91 92; Integers93 94define {<16 x i8>, <16 x i8>} @vector_deinterleave_v16i8_v32i8(<32 x i8> %vec) {95; CHECK-LABEL: vector_deinterleave_v16i8_v32i8:96; CHECK: // %bb.0:97; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b98; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b99; CHECK-NEXT: mov v0.16b, v2.16b100; CHECK-NEXT: ret101 %retval = call {<16 x i8>, <16 x i8>} @llvm.vector.deinterleave2.v32i8(<32 x i8> %vec)102 ret {<16 x i8>, <16 x i8>} %retval103}104 105define {<8 x i16>, <8 x i16>} @vector_deinterleave_v8i16_v16i16(<16 x i16> %vec) {106; CHECK-LABEL: vector_deinterleave_v8i16_v16i16:107; CHECK: // %bb.0:108; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h109; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h110; CHECK-NEXT: mov v0.16b, v2.16b111; CHECK-NEXT: ret112 %retval = call {<8 x i16>, <8 x i16>} @llvm.vector.deinterleave2.v16i16(<16 x i16> %vec)113 ret {<8 x i16>, <8 x i16>} %retval114}115 116define {<4 x i32>, <4 x i32>} @vector_deinterleave_v4i32_v8i32(<8 x i32> %vec) {117; CHECK-LABEL: vector_deinterleave_v4i32_v8i32:118; CHECK: // %bb.0:119; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s120; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s121; CHECK-NEXT: mov v0.16b, v2.16b122; CHECK-NEXT: ret123 %retval = call {<4 x i32>, <4 x i32>} @llvm.vector.deinterleave2.v8i32(<8 x i32> %vec)124 ret {<4 x i32>, <4 x i32>} %retval125}126 127define {<2 x i64>, <2 x i64>} @vector_deinterleave_v2i64_v4i64(<4 x i64> %vec) {128; CHECK-LABEL: vector_deinterleave_v2i64_v4i64:129; CHECK: // %bb.0:130; CHECK-NEXT: zip1 v2.2d, v0.2d, v1.2d131; CHECK-NEXT: zip2 v1.2d, v0.2d, v1.2d132; CHECK-NEXT: mov v0.16b, v2.16b133; CHECK-NEXT: ret134 %retval = call {<2 x i64>, <2 x i64>} @llvm.vector.deinterleave2.v4i64(<4 x i64> %vec)135 ret {<2 x i64>, <2 x i64>} %retval136}137 138 139; Floating declarations140declare {<2 x half>,<2 x half>} @llvm.vector.deinterleave2.v4f16(<4 x half>)141declare {<4 x half>, <4 x half>} @llvm.vector.deinterleave2.v8f16(<8 x half>)142declare {<2 x float>, <2 x float>} @llvm.vector.deinterleave2.v4f32(<4 x float>)143declare {<8 x half>, <8 x half>} @llvm.vector.deinterleave2.v16f16(<16 x half>)144declare {<4 x float>, <4 x float>} @llvm.vector.deinterleave2.v8f32(<8 x float>)145declare {<2 x double>, <2 x double>} @llvm.vector.deinterleave2.v4f64(<4 x double>)146 147; Integer declarations148declare {<16 x i8>, <16 x i8>} @llvm.vector.deinterleave2.v32i8(<32 x i8>)149declare {<8 x i16>, <8 x i16>} @llvm.vector.deinterleave2.v16i16(<16 x i16>)150declare {<4 x i32>, <4 x i32>} @llvm.vector.deinterleave2.v8i32(<8 x i32>)151declare {<2 x i64>, <2 x i64>} @llvm.vector.deinterleave2.v4i64(<4 x i64>)152 153