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1# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \2# RUN:  -misched-dump-reserved-cycles=true \3# RUN:  -run-pass=machine-scheduler -debug-only=machine-scheduler \4# RUN:  -o - %s 2>&1 -misched-prera-direction=topdown | FileCheck %s5 6# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \7# RUN:  -misched-dump-reserved-cycles=true \8# RUN:  -passes=machine-scheduler -debug-only=machine-scheduler \9# RUN:  -o - %s 2>&1 -misched-prera-direction=topdown | FileCheck %s10 11# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \12# RUN:  -misched-dump-reserved-cycles=true -sched-model-force-enable-intervals=true \13# RUN:  -run-pass=machine-scheduler -debug-only=machine-scheduler \14# RUN:  -o - %s 2>&1 -misched-prera-direction=topdown | FileCheck %s  --check-prefix=FORCE15 16# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \17# RUN:  -misched-dump-reserved-cycles=true -sched-model-force-enable-intervals=true \18# RUN:  -passes=machine-scheduler -debug-only=machine-scheduler \19# RUN:  -o - %s 2>&1 -misched-prera-direction=topdown | FileCheck %s  --check-prefix=FORCE20 21# REQUIRES: asserts22---23name: f24tracksRegLiveness: true25body:             |26  bb.0:27    liveins: $x0, $x1028    $x1 = ADDXrr $x0, $x029    $x2 = ADDXrr $x1, $x130    $x3 = ADDXrr $x2, $x231    STRXui $x3, $x10, 1 :: (store (s64))32 33 34# CHECK-LABEL: Scheduling SU(3) STRXui $x3, $x10, 1 :: (store (s64))35# CHECK-NEXT:   Ready @5c36# CHECK-NEXT:   CortexA55UnitSt +1x2u37# CHECK-NEXT:   TopQ.A TopLatency SU(3) 5c38# CHECK-NEXT: TopQ.A @5c39# CHECK-NEXT:   Retired: 440# CHECK-NEXT:   Executed: 5c41# CHECK-NEXT:   Critical: 2c, 4 MOps42# CHECK-NEXT:   ExpectedLatency: 5c43# CHECK-NEXT:   - Latency limited.44# CHECK-NEXT: CortexA55UnitALU(0) = 345# CHECK-NEXT: CortexA55UnitALU(1) = 429496729546# CHECK-NEXT: CortexA55UnitB(0) = 429496729547# CHECK-NEXT: CortexA55UnitDiv(0) = 429496729548# CHECK-NEXT: CortexA55UnitFPALU(0) = 429496729549# CHECK-NEXT: CortexA55UnitFPALU(1) = 429496729550# CHECK-NEXT: CortexA55UnitFPDIV(0) = 429496729551# CHECK-NEXT: CortexA55UnitFPMAC(0) = 429496729552# CHECK-NEXT: CortexA55UnitFPMAC(1) = 429496729553# CHECK-NEXT: CortexA55UnitLd(0) = 429496729554# CHECK-NEXT: CortexA55UnitMAC(0) = 429496729555# CHECK-NEXT: CortexA55UnitSt(0) = 656 57 58# FORCE-LABEL: Scheduling SU(3) STRXui $x3, $x10, 1 :: (store (s64))59# FORCE-NEXT:   Ready @5c60# FORCE-NEXT:   CortexA55UnitSt +1x2u61# FORCE-NEXT:   TopQ.A TopLatency SU(3) 5c62# FORCE-NEXT: TopQ.A @5c63# FORCE-NEXT:   Retired: 464# FORCE-NEXT:   Executed: 5c65# FORCE-NEXT:   Critical: 2c, 4 MOps66# FORCE-NEXT:   ExpectedLatency: 5c67# FORCE-NEXT:   - Latency limited.68# FORCE-NEXT: CortexA55UnitALU(0) = { [0, 3), }69# FORCE-NEXT: CortexA55UnitALU(1) = { }70# FORCE-NEXT: CortexA55UnitB(0) = { }71# FORCE-NEXT: CortexA55UnitDiv(0) = { }72# FORCE-NEXT: CortexA55UnitFPALU(0) = { }73# FORCE-NEXT: CortexA55UnitFPALU(1) = { }74# FORCE-NEXT: CortexA55UnitFPDIV(0) = { }75# FORCE-NEXT: CortexA55UnitFPMAC(0) = { }76# FORCE-NEXT: CortexA55UnitFPMAC(1) = { }77# FORCE-NEXT: CortexA55UnitLd(0) = { }78# FORCE-NEXT: CortexA55UnitMAC(0) = { }79# FORCE-NEXT: CortexA55UnitSt(0) = { [5, 6), }80