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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3 4; float16x4_t select_64(float16x4_t a, float16x4_t b, uint16x4_t c) { return vbsl_u16(c, a, b); }5define <4 x half> @select_64(<4 x half> %a, <4 x half> %b, <4 x i16> %c) #0 {6; CHECK-LABEL: select_64:7; CHECK: // %bb.0: // %entry8; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b9; CHECK-NEXT: ret10entry:11 %0 = bitcast <4 x half> %a to <4 x i16>12 %1 = bitcast <4 x half> %b to <4 x i16>13 %vbsl3.i = and <4 x i16> %0, %c14 %2 = xor <4 x i16> %c, <i16 -1, i16 -1, i16 -1, i16 -1>15 %vbsl4.i = and <4 x i16> %1, %216 %vbsl5.i = or <4 x i16> %vbsl3.i, %vbsl4.i17 %3 = bitcast <4 x i16> %vbsl5.i to <4 x half>18 ret <4 x half> %319}20 21; float16x8_t select_128(float16x8_t a, float16x8_t b, uint16x8_t c) { return vbslq_u16(c, a, b); }22define <8 x half> @select_128(<8 x half> %a, <8 x half> %b, <8 x i16> %c) #0 {23; CHECK-LABEL: select_128:24; CHECK: // %bb.0: // %entry25; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b26; CHECK-NEXT: ret27entry:28 %0 = bitcast <8 x half> %a to <8 x i16>29 %1 = bitcast <8 x half> %b to <8 x i16>30 %vbsl3.i = and <8 x i16> %0, %c31 %2 = xor <8 x i16> %c, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>32 %vbsl4.i = and <8 x i16> %1, %233 %vbsl5.i = or <8 x i16> %vbsl3.i, %vbsl4.i34 %3 = bitcast <8 x i16> %vbsl5.i to <8 x half>35 ret <8 x half> %336}37 38; float16x4_t lane_64_64(float16x4_t a, float16x4_t b) {39; return vcopy_lane_s16(a, 1, b, 2);40; }41define <4 x half> @lane_64_64(<4 x half> %a, <4 x half> %b) #0 {42; CHECK-LABEL: lane_64_64:43; CHECK: // %bb.0: // %entry44; CHECK-NEXT: // kill: def $d0 killed $d0 def $q045; CHECK-NEXT: // kill: def $d1 killed $d1 def $q146; CHECK-NEXT: mov v0.h[1], v1.h[2]47; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q048; CHECK-NEXT: ret49entry:50 %0 = shufflevector <4 x half> %a, <4 x half> %b, <4 x i32> <i32 0, i32 6, i32 2, i32 3>51 ret <4 x half> %052}53 54; float16x8_t lane_128_64(float16x8_t a, float16x4_t b) {55; return vcopyq_lane_s16(a, 1, b, 2);56; }57define <8 x half> @lane_128_64(<8 x half> %a, <4 x half> %b) #0 {58; CHECK-LABEL: lane_128_64:59; CHECK: // %bb.0: // %entry60; CHECK-NEXT: // kill: def $d1 killed $d1 def $q161; CHECK-NEXT: mov v0.h[1], v1.h[2]62; CHECK-NEXT: ret63entry:64 %0 = bitcast <4 x half> %b to <4 x i16>65 %vget_lane = extractelement <4 x i16> %0, i32 266 %1 = bitcast <8 x half> %a to <8 x i16>67 %vset_lane = insertelement <8 x i16> %1, i16 %vget_lane, i32 168 %2 = bitcast <8 x i16> %vset_lane to <8 x half>69 ret <8 x half> %270}71 72; float16x4_t lane_64_128(float16x4_t a, float16x8_t b) {73; return vcopy_laneq_s16(a, 3, b, 5);74; }75define <4 x half> @lane_64_128(<4 x half> %a, <8 x half> %b) #0 {76; CHECK-LABEL: lane_64_128:77; CHECK: // %bb.0: // %entry78; CHECK-NEXT: // kill: def $d0 killed $d0 def $q079; CHECK-NEXT: mov v0.h[3], v1.h[5]80; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q081; CHECK-NEXT: ret82entry:83 %0 = bitcast <8 x half> %b to <8 x i16>84 %vgetq_lane = extractelement <8 x i16> %0, i32 585 %1 = bitcast <4 x half> %a to <4 x i16>86 %vset_lane = insertelement <4 x i16> %1, i16 %vgetq_lane, i32 387 %2 = bitcast <4 x i16> %vset_lane to <4 x half>88 ret <4 x half> %289}90 91; float16x8_t lane_128_128(float16x8_t a, float16x8_t b) {92; return vcopyq_laneq_s16(a, 3, b, 5);93; }94define <8 x half> @lane_128_128(<8 x half> %a, <8 x half> %b) #0 {95; CHECK-LABEL: lane_128_128:96; CHECK: // %bb.0: // %entry97; CHECK-NEXT: mov v0.h[3], v1.h[5]98; CHECK-NEXT: ret99entry:100 %0 = shufflevector <8 x half> %a, <8 x half> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 13, i32 4, i32 5, i32 6, i32 7>101 ret <8 x half> %0102}103 104; float16x4_t ext_64(float16x4_t a, float16x4_t b) {105; return vext_s16(a, b, 3);106; }107define <4 x half> @ext_64(<4 x half> %a, <4 x half> %b) #0 {108; CHECK-LABEL: ext_64:109; CHECK: // %bb.0: // %entry110; CHECK-NEXT: ext v0.8b, v0.8b, v1.8b, #6111; CHECK-NEXT: ret112entry:113 %0 = shufflevector <4 x half> %a, <4 x half> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>114 ret <4 x half> %0115}116 117; float16x8_t ext_128(float16x8_t a, float16x8_t b) {118; return vextq_s16(a, b, 3);119; }120define <8 x half> @ext_128(<8 x half> %a, <8 x half> %b) #0 {121; CHECK-LABEL: ext_128:122; CHECK: // %bb.0: // %entry123; CHECK-NEXT: ext v0.16b, v0.16b, v1.16b, #6124; CHECK-NEXT: ret125entry:126 %0 = shufflevector <8 x half> %a, <8 x half> %b, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>127 ret <8 x half> %0128}129 130; float16x4_t rev32_64(float16x4_t a) {131; return vrev32_s16(a);132; }133define <4 x half> @rev32_64(<4 x half> %a) #0 {134; CHECK-LABEL: rev32_64:135; CHECK: // %bb.0: // %entry136; CHECK-NEXT: rev32 v0.4h, v0.4h137; CHECK-NEXT: ret138entry:139 %0 = shufflevector <4 x half> %a, <4 x half> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>140 ret <4 x half> %0141}142 143; float16x4_t rev64_64(float16x4_t a) {144; return vrev64_s16(a);145; }146define <4 x half> @rev64_64(<4 x half> %a) #0 {147; CHECK-LABEL: rev64_64:148; CHECK: // %bb.0: // %entry149; CHECK-NEXT: rev64 v0.4h, v0.4h150; CHECK-NEXT: ret151entry:152 %0 = shufflevector <4 x half> %a, <4 x half> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>153 ret <4 x half> %0154}155 156; float16x8_t rev32_128(float16x8_t a) {157; return vrev32q_s16(a);158; }159define <8 x half> @rev32_128(<8 x half> %a) #0 {160; CHECK-LABEL: rev32_128:161; CHECK: // %bb.0: // %entry162; CHECK-NEXT: rev32 v0.8h, v0.8h163; CHECK-NEXT: ret164entry:165 %0 = shufflevector <8 x half> %a, <8 x half> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>166 ret <8 x half> %0167}168 169; float16x8_t rev64_128(float16x8_t a) {170; return vrev64q_s16(a);171; }172define <8 x half> @rev64_128(<8 x half> %a) #0 {173; CHECK-LABEL: rev64_128:174; CHECK: // %bb.0: // %entry175; CHECK-NEXT: rev64 v0.8h, v0.8h176; CHECK-NEXT: ret177entry:178 %0 = shufflevector <8 x half> %a, <8 x half> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>179 ret <8 x half> %0180}181 182; float16x4_t create_64(long long a) { return vcreate_f16(a); }183define <4 x half> @create_64(i64 %a) #0 {184; CHECK-LABEL: create_64:185; CHECK: // %bb.0: // %entry186; CHECK-NEXT: fmov d0, x0187; CHECK-NEXT: ret188entry:189 %0 = bitcast i64 %a to <4 x half>190 ret <4 x half> %0191}192 193; float16x4_t dup_64(__fp16 a) { return vdup_n_f16(a); }194define <4 x half> @dup_64(half %a) #0 {195; CHECK-LABEL: dup_64:196; CHECK: // %bb.0: // %entry197; CHECK-NEXT: // kill: def $h0 killed $h0 def $q0198; CHECK-NEXT: dup v0.4h, v0.h[0]199; CHECK-NEXT: ret200entry:201 %vecinit = insertelement <4 x half> undef, half %a, i32 0202 %vecinit1 = insertelement <4 x half> %vecinit, half %a, i32 1203 %vecinit2 = insertelement <4 x half> %vecinit1, half %a, i32 2204 %vecinit3 = insertelement <4 x half> %vecinit2, half %a, i32 3205 ret <4 x half> %vecinit3206}207 208; float16x8_t dup_128(__fp16 a) { return vdupq_n_f16(a); }209define <8 x half> @dup_128(half %a) #0 {210; CHECK-LABEL: dup_128:211; CHECK: // %bb.0: // %entry212; CHECK-NEXT: // kill: def $h0 killed $h0 def $q0213; CHECK-NEXT: dup v0.8h, v0.h[0]214; CHECK-NEXT: ret215entry:216 %vecinit = insertelement <8 x half> undef, half %a, i32 0217 %vecinit1 = insertelement <8 x half> %vecinit, half %a, i32 1218 %vecinit2 = insertelement <8 x half> %vecinit1, half %a, i32 2219 %vecinit3 = insertelement <8 x half> %vecinit2, half %a, i32 3220 %vecinit4 = insertelement <8 x half> %vecinit3, half %a, i32 4221 %vecinit5 = insertelement <8 x half> %vecinit4, half %a, i32 5222 %vecinit6 = insertelement <8 x half> %vecinit5, half %a, i32 6223 %vecinit7 = insertelement <8 x half> %vecinit6, half %a, i32 7224 ret <8 x half> %vecinit7225}226 227; float16x4_t dup_lane_64(float16x4_t a) { return vdup_lane_f16(a, 2); }228define <4 x half> @dup_lane_64(<4 x half> %a) #0 {229; CHECK-LABEL: dup_lane_64:230; CHECK: // %bb.0: // %entry231; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0232; CHECK-NEXT: dup v0.4h, v0.h[2]233; CHECK-NEXT: ret234entry:235 %shuffle = shufflevector <4 x half> %a, <4 x half> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>236 ret <4 x half> %shuffle237}238 239; float16x8_t dup_lane_128(float16x4_t a) { return vdupq_lane_f16(a, 2); }240define <8 x half> @dup_lane_128(<4 x half> %a) #0 {241; CHECK-LABEL: dup_lane_128:242; CHECK: // %bb.0: // %entry243; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0244; CHECK-NEXT: dup v0.8h, v0.h[2]245; CHECK-NEXT: ret246entry:247 %shuffle = shufflevector <4 x half> %a, <4 x half> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>248 ret <8 x half> %shuffle249}250 251; float16x4_t dup_laneq_64(float16x8_t a) { return vdup_laneq_f16(a, 2); }252define <4 x half> @dup_laneq_64(<8 x half> %a) #0 {253; CHECK-LABEL: dup_laneq_64:254; CHECK: // %bb.0: // %entry255; CHECK-NEXT: dup v0.4h, v0.h[2]256; CHECK-NEXT: ret257entry:258 %shuffle = shufflevector <8 x half> %a, <8 x half> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>259 ret <4 x half> %shuffle260}261 262; float16x8_t dup_laneq_128(float16x8_t a) { return vdupq_laneq_f16(a, 2); }263define <8 x half> @dup_laneq_128(<8 x half> %a) #0 {264; CHECK-LABEL: dup_laneq_128:265; CHECK: // %bb.0: // %entry266; CHECK-NEXT: dup v0.8h, v0.h[2]267; CHECK-NEXT: ret268entry:269 %shuffle = shufflevector <8 x half> %a, <8 x half> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>270 ret <8 x half> %shuffle271}272 273; float16x8_t vcombine(float16x4_t a, float16x4_t b) { return vcombine_f16(a, b); }274define <8 x half> @vcombine(<4 x half> %a, <4 x half> %b) #0 {275; CHECK-LABEL: vcombine:276; CHECK: // %bb.0: // %entry277; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0278; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1279; CHECK-NEXT: mov v0.d[1], v1.d[0]280; CHECK-NEXT: ret281entry:282 %shuffle.i = shufflevector <4 x half> %a, <4 x half> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>283 ret <8 x half> %shuffle.i284}285 286; float16x4_t get_high(float16x8_t a) { return vget_high_f16(a); }287define <4 x half> @get_high(<8 x half> %a) #0 {288; CHECK-LABEL: get_high:289; CHECK: // %bb.0: // %entry290; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8291; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0292; CHECK-NEXT: ret293entry:294 %shuffle.i = shufflevector <8 x half> %a, <8 x half> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>295 ret <4 x half> %shuffle.i296}297 298 299; float16x4_t get_low(float16x8_t a) { return vget_low_f16(a); }300define <4 x half> @get_low(<8 x half> %a) #0 {301; CHECK-LABEL: get_low:302; CHECK: // %bb.0: // %entry303; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0304; CHECK-NEXT: ret305entry:306 %shuffle.i = shufflevector <8 x half> %a, <8 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>307 ret <4 x half> %shuffle.i308}309 310; float16x4_t set_lane_64(float16x4_t a, __fp16 b) { return vset_lane_f16(b, a, 2); }311define <4 x half> @set_lane_64(<4 x half> %a, half %b) #0 {312; CHECK-LABEL: set_lane_64:313; CHECK: // %bb.0: // %entry314; CHECK-NEXT: // kill: def $h1 killed $h1 def $s1315; CHECK-NEXT: fmov w8, s1316; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0317; CHECK-NEXT: mov v0.h[2], w8318; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0319; CHECK-NEXT: ret320entry:321 %0 = bitcast half %b to i16322 %1 = bitcast <4 x half> %a to <4 x i16>323 %vset_lane = insertelement <4 x i16> %1, i16 %0, i32 2324 %2 = bitcast <4 x i16> %vset_lane to <4 x half>325 ret <4 x half> %2326}327 328 329; float16x8_t set_lane_128(float16x8_t a, __fp16 b) { return vsetq_lane_f16(b, a, 2); }330define <8 x half> @set_lane_128(<8 x half> %a, half %b) #0 {331; CHECK-LABEL: set_lane_128:332; CHECK: // %bb.0: // %entry333; CHECK-NEXT: // kill: def $h1 killed $h1 def $s1334; CHECK-NEXT: fmov w8, s1335; CHECK-NEXT: mov v0.h[2], w8336; CHECK-NEXT: ret337entry:338 %0 = bitcast half %b to i16339 %1 = bitcast <8 x half> %a to <8 x i16>340 %vset_lane = insertelement <8 x i16> %1, i16 %0, i32 2341 %2 = bitcast <8 x i16> %vset_lane to <8 x half>342 ret <8 x half> %2343}344 345; __fp16 get_lane_64(float16x4_t a) { return vget_lane_f16(a, 2); }346define half @get_lane_64(<4 x half> %a) #0 {347; CHECK-LABEL: get_lane_64:348; CHECK: // %bb.0: // %entry349; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0350; CHECK-NEXT: mov h0, v0.h[2]351; CHECK-NEXT: // kill: def $h0 killed $h0 killed $q0352; CHECK-NEXT: ret353entry:354 %0 = bitcast <4 x half> %a to <4 x i16>355 %vget_lane = extractelement <4 x i16> %0, i32 2356 %1 = bitcast i16 %vget_lane to half357 ret half %1358}359 360; __fp16 get_lane_128(float16x8_t a) { return vgetq_lane_f16(a, 2); }361define half @get_lane_128(<8 x half> %a) #0 {362; CHECK-LABEL: get_lane_128:363; CHECK: // %bb.0: // %entry364; CHECK-NEXT: mov h0, v0.h[2]365; CHECK-NEXT: // kill: def $h0 killed $h0 killed $q0366; CHECK-NEXT: ret367entry:368 %0 = bitcast <8 x half> %a to <8 x i16>369 %vgetq_lane = extractelement <8 x i16> %0, i32 2370 %1 = bitcast i16 %vgetq_lane to half371 ret half %1372}373