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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 -stop-after=finalize-isel | FileCheck %s --check-prefixes=CHECK-CVT3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -stop-after=finalize-isel | FileCheck %s --check-prefixes=CHECK-FP164 5; Check that the output instructions have the same fast math flags as the input6; fadd, even when fadd is promoted to float type.7 8define half @normal_fadd(half %x, half %y) {9  ; CHECK-CVT-LABEL: name: normal_fadd10  ; CHECK-CVT: bb.0.entry:11  ; CHECK-CVT-NEXT:   liveins: $h0, $h112  ; CHECK-CVT-NEXT: {{  $}}13  ; CHECK-CVT-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h114  ; CHECK-CVT-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h015  ; CHECK-CVT-NEXT:   [[FCVTSHr:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY]], implicit $fpcr16  ; CHECK-CVT-NEXT:   [[FCVTSHr1:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY1]], implicit $fpcr17  ; CHECK-CVT-NEXT:   [[FADDSrr:%[0-9]+]]:fpr32 = nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr18  ; CHECK-CVT-NEXT:   [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr19  ; CHECK-CVT-NEXT:   $h0 = COPY [[FCVTHSr]]20  ; CHECK-CVT-NEXT:   RET_ReallyLR implicit $h021  ;22  ; CHECK-FP16-LABEL: name: normal_fadd23  ; CHECK-FP16: bb.0.entry:24  ; CHECK-FP16-NEXT:   liveins: $h0, $h125  ; CHECK-FP16-NEXT: {{  $}}26  ; CHECK-FP16-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h127  ; CHECK-FP16-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h028  ; CHECK-FP16-NEXT:   [[FADDHrr:%[0-9]+]]:fpr16 = nofpexcept FADDHrr [[COPY1]], [[COPY]], implicit $fpcr29  ; CHECK-FP16-NEXT:   $h0 = COPY [[FADDHrr]]30  ; CHECK-FP16-NEXT:   RET_ReallyLR implicit $h031entry:32  %add = fadd half %x, %y33  ret half %add34}35 36define half @fast_fadd(half %x, half %y) {37  ; CHECK-CVT-LABEL: name: fast_fadd38  ; CHECK-CVT: bb.0.entry:39  ; CHECK-CVT-NEXT:   liveins: $h0, $h140  ; CHECK-CVT-NEXT: {{  $}}41  ; CHECK-CVT-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h142  ; CHECK-CVT-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h043  ; CHECK-CVT-NEXT:   [[FCVTSHr:%[0-9]+]]:fpr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept FCVTSHr [[COPY]], implicit $fpcr44  ; CHECK-CVT-NEXT:   [[FCVTSHr1:%[0-9]+]]:fpr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept FCVTSHr [[COPY1]], implicit $fpcr45  ; CHECK-CVT-NEXT:   [[FADDSrr:%[0-9]+]]:fpr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr46  ; CHECK-CVT-NEXT:   [[FCVTHSr:%[0-9]+]]:fpr16 = nnan ninf nsz arcp contract afn reassoc nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr47  ; CHECK-CVT-NEXT:   $h0 = COPY [[FCVTHSr]]48  ; CHECK-CVT-NEXT:   RET_ReallyLR implicit $h049  ;50  ; CHECK-FP16-LABEL: name: fast_fadd51  ; CHECK-FP16: bb.0.entry:52  ; CHECK-FP16-NEXT:   liveins: $h0, $h153  ; CHECK-FP16-NEXT: {{  $}}54  ; CHECK-FP16-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h155  ; CHECK-FP16-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h056  ; CHECK-FP16-NEXT:   [[FADDHrr:%[0-9]+]]:fpr16 = nnan ninf nsz arcp contract afn reassoc nofpexcept FADDHrr [[COPY1]], [[COPY]], implicit $fpcr57  ; CHECK-FP16-NEXT:   $h0 = COPY [[FADDHrr]]58  ; CHECK-FP16-NEXT:   RET_ReallyLR implicit $h059entry:60  %add = fadd fast half %x, %y61  ret half %add62}63 64define half @ninf_fadd(half %x, half %y) {65  ; CHECK-CVT-LABEL: name: ninf_fadd66  ; CHECK-CVT: bb.0.entry:67  ; CHECK-CVT-NEXT:   liveins: $h0, $h168  ; CHECK-CVT-NEXT: {{  $}}69  ; CHECK-CVT-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h170  ; CHECK-CVT-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h071  ; CHECK-CVT-NEXT:   [[FCVTSHr:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY]], implicit $fpcr72  ; CHECK-CVT-NEXT:   [[FCVTSHr1:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY1]], implicit $fpcr73  ; CHECK-CVT-NEXT:   [[FADDSrr:%[0-9]+]]:fpr32 = ninf nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr74  ; CHECK-CVT-NEXT:   [[FCVTHSr:%[0-9]+]]:fpr16 = ninf nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr75  ; CHECK-CVT-NEXT:   $h0 = COPY [[FCVTHSr]]76  ; CHECK-CVT-NEXT:   RET_ReallyLR implicit $h077  ;78  ; CHECK-FP16-LABEL: name: ninf_fadd79  ; CHECK-FP16: bb.0.entry:80  ; CHECK-FP16-NEXT:   liveins: $h0, $h181  ; CHECK-FP16-NEXT: {{  $}}82  ; CHECK-FP16-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h183  ; CHECK-FP16-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h084  ; CHECK-FP16-NEXT:   [[FADDHrr:%[0-9]+]]:fpr16 = ninf nofpexcept FADDHrr [[COPY1]], [[COPY]], implicit $fpcr85  ; CHECK-FP16-NEXT:   $h0 = COPY [[FADDHrr]]86  ; CHECK-FP16-NEXT:   RET_ReallyLR implicit $h087entry:88  %add = fadd ninf half %x, %y89  ret half %add90}91 92; Check that when we have the right fast math flags the converts in between the93; two fadds are removed.94 95define half @normal_fadd_sequence(half %x, half %y, half %z) {96  ; CHECK-CVT-LABEL: name: normal_fadd_sequence97  ; CHECK-CVT: bb.0.entry:98  ; CHECK-CVT-NEXT:   liveins: $h0, $h1, $h299  ; CHECK-CVT-NEXT: {{  $}}100  ; CHECK-CVT-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h2101  ; CHECK-CVT-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h1102  ; CHECK-CVT-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY $h0103  ; CHECK-CVT-NEXT:   [[FCVTSHr:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY1]], implicit $fpcr104  ; CHECK-CVT-NEXT:   [[FCVTSHr1:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY2]], implicit $fpcr105  ; CHECK-CVT-NEXT:   [[FADDSrr:%[0-9]+]]:fpr32 = nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr106  ; CHECK-CVT-NEXT:   [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr107  ; CHECK-CVT-NEXT:   [[FCVTSHr2:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr killed [[FCVTHSr]], implicit $fpcr108  ; CHECK-CVT-NEXT:   [[FCVTSHr3:%[0-9]+]]:fpr32 = nofpexcept FCVTSHr [[COPY]], implicit $fpcr109  ; CHECK-CVT-NEXT:   [[FADDSrr1:%[0-9]+]]:fpr32 = nofpexcept FADDSrr killed [[FCVTSHr2]], killed [[FCVTSHr3]], implicit $fpcr110  ; CHECK-CVT-NEXT:   [[FCVTHSr1:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr killed [[FADDSrr1]], implicit $fpcr111  ; CHECK-CVT-NEXT:   $h0 = COPY [[FCVTHSr1]]112  ; CHECK-CVT-NEXT:   RET_ReallyLR implicit $h0113  ;114  ; CHECK-FP16-LABEL: name: normal_fadd_sequence115  ; CHECK-FP16: bb.0.entry:116  ; CHECK-FP16-NEXT:   liveins: $h0, $h1, $h2117  ; CHECK-FP16-NEXT: {{  $}}118  ; CHECK-FP16-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h2119  ; CHECK-FP16-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h1120  ; CHECK-FP16-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY $h0121  ; CHECK-FP16-NEXT:   [[FADDHrr:%[0-9]+]]:fpr16 = nofpexcept FADDHrr [[COPY2]], [[COPY1]], implicit $fpcr122  ; CHECK-FP16-NEXT:   [[FADDHrr1:%[0-9]+]]:fpr16 = nofpexcept FADDHrr killed [[FADDHrr]], [[COPY]], implicit $fpcr123  ; CHECK-FP16-NEXT:   $h0 = COPY [[FADDHrr1]]124  ; CHECK-FP16-NEXT:   RET_ReallyLR implicit $h0125entry:126  %add1 = fadd half %x, %y127  %add2 = fadd half %add1, %z128  ret half %add2129}130 131define half @nnan_ninf_contract_fadd_sequence(half %x, half %y, half %z) {132  ; CHECK-CVT-LABEL: name: nnan_ninf_contract_fadd_sequence133  ; CHECK-CVT: bb.0.entry:134  ; CHECK-CVT-NEXT:   liveins: $h0, $h1, $h2135  ; CHECK-CVT-NEXT: {{  $}}136  ; CHECK-CVT-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h2137  ; CHECK-CVT-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h1138  ; CHECK-CVT-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY $h0139  ; CHECK-CVT-NEXT:   [[FCVTSHr:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FCVTSHr [[COPY1]], implicit $fpcr140  ; CHECK-CVT-NEXT:   [[FCVTSHr1:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FCVTSHr [[COPY2]], implicit $fpcr141  ; CHECK-CVT-NEXT:   [[FADDSrr:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr142  ; CHECK-CVT-NEXT:   [[FCVTSHr2:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FCVTSHr [[COPY]], implicit $fpcr143  ; CHECK-CVT-NEXT:   [[FADDSrr1:%[0-9]+]]:fpr32 = nnan ninf contract nofpexcept FADDSrr killed [[FADDSrr]], killed [[FCVTSHr2]], implicit $fpcr144  ; CHECK-CVT-NEXT:   [[FCVTHSr:%[0-9]+]]:fpr16 = nnan ninf contract nofpexcept FCVTHSr killed [[FADDSrr1]], implicit $fpcr145  ; CHECK-CVT-NEXT:   $h0 = COPY [[FCVTHSr]]146  ; CHECK-CVT-NEXT:   RET_ReallyLR implicit $h0147  ;148  ; CHECK-FP16-LABEL: name: nnan_ninf_contract_fadd_sequence149  ; CHECK-FP16: bb.0.entry:150  ; CHECK-FP16-NEXT:   liveins: $h0, $h1, $h2151  ; CHECK-FP16-NEXT: {{  $}}152  ; CHECK-FP16-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h2153  ; CHECK-FP16-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h1154  ; CHECK-FP16-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY $h0155  ; CHECK-FP16-NEXT:   [[FADDHrr:%[0-9]+]]:fpr16 = nnan ninf contract nofpexcept FADDHrr [[COPY2]], [[COPY1]], implicit $fpcr156  ; CHECK-FP16-NEXT:   [[FADDHrr1:%[0-9]+]]:fpr16 = nnan ninf contract nofpexcept FADDHrr killed [[FADDHrr]], [[COPY]], implicit $fpcr157  ; CHECK-FP16-NEXT:   $h0 = COPY [[FADDHrr1]]158  ; CHECK-FP16-NEXT:   RET_ReallyLR implicit $h0159entry:160  %add1 = fadd nnan ninf contract half %x, %y161  %add2 = fadd nnan ninf contract half %add1, %z162  ret half %add2163}164 165define half @ninf_fadd_sequence(half %x, half %y, half %z) {166  ; CHECK-CVT-LABEL: name: ninf_fadd_sequence167  ; CHECK-CVT: bb.0.entry:168  ; CHECK-CVT-NEXT:   liveins: $h0, $h1, $h2169  ; CHECK-CVT-NEXT: {{  $}}170  ; CHECK-CVT-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h2171  ; CHECK-CVT-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h1172  ; CHECK-CVT-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY $h0173  ; CHECK-CVT-NEXT:   [[FCVTSHr:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY1]], implicit $fpcr174  ; CHECK-CVT-NEXT:   [[FCVTSHr1:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY2]], implicit $fpcr175  ; CHECK-CVT-NEXT:   [[FADDSrr:%[0-9]+]]:fpr32 = ninf nofpexcept FADDSrr killed [[FCVTSHr1]], killed [[FCVTSHr]], implicit $fpcr176  ; CHECK-CVT-NEXT:   [[FCVTHSr:%[0-9]+]]:fpr16 = ninf nofpexcept FCVTHSr killed [[FADDSrr]], implicit $fpcr177  ; CHECK-CVT-NEXT:   [[FCVTSHr2:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr killed [[FCVTHSr]], implicit $fpcr178  ; CHECK-CVT-NEXT:   [[FCVTSHr3:%[0-9]+]]:fpr32 = ninf nofpexcept FCVTSHr [[COPY]], implicit $fpcr179  ; CHECK-CVT-NEXT:   [[FADDSrr1:%[0-9]+]]:fpr32 = ninf nofpexcept FADDSrr killed [[FCVTSHr2]], killed [[FCVTSHr3]], implicit $fpcr180  ; CHECK-CVT-NEXT:   [[FCVTHSr1:%[0-9]+]]:fpr16 = ninf nofpexcept FCVTHSr killed [[FADDSrr1]], implicit $fpcr181  ; CHECK-CVT-NEXT:   $h0 = COPY [[FCVTHSr1]]182  ; CHECK-CVT-NEXT:   RET_ReallyLR implicit $h0183  ;184  ; CHECK-FP16-LABEL: name: ninf_fadd_sequence185  ; CHECK-FP16: bb.0.entry:186  ; CHECK-FP16-NEXT:   liveins: $h0, $h1, $h2187  ; CHECK-FP16-NEXT: {{  $}}188  ; CHECK-FP16-NEXT:   [[COPY:%[0-9]+]]:fpr16 = COPY $h2189  ; CHECK-FP16-NEXT:   [[COPY1:%[0-9]+]]:fpr16 = COPY $h1190  ; CHECK-FP16-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY $h0191  ; CHECK-FP16-NEXT:   [[FADDHrr:%[0-9]+]]:fpr16 = ninf nofpexcept FADDHrr [[COPY2]], [[COPY1]], implicit $fpcr192  ; CHECK-FP16-NEXT:   [[FADDHrr1:%[0-9]+]]:fpr16 = ninf nofpexcept FADDHrr killed [[FADDHrr]], [[COPY]], implicit $fpcr193  ; CHECK-FP16-NEXT:   $h0 = COPY [[FADDHrr1]]194  ; CHECK-FP16-NEXT:   RET_ReallyLR implicit $h0195entry:196  %add1 = fadd ninf half %x, %y197  %add2 = fadd ninf half %add1, %z198  ret half %add2199}200