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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mattr=+sme2,+fp8 -enable-subreg-liveness --force-streaming < %s | FileCheck %s3 4target triple = "aarch64-linux"5 6define { <vscale x 16 x i8>, <vscale x 16 x i8> } @cvtn_f16_tuple(i64 %stride, ptr %ptr) {7; CHECK-LABEL: cvtn_f16_tuple:8; CHECK: // %bb.0: // %entry9; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill10; CHECK-NEXT: addvl sp, sp, #-311; CHECK-NEXT: str p8, [sp, #7, mul vl] // 2-byte Spill12; CHECK-NEXT: str z11, [sp, #1, mul vl] // 16-byte Folded Spill13; CHECK-NEXT: str z10, [sp, #2, mul vl] // 16-byte Folded Spill14; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG15; CHECK-NEXT: .cfi_offset w29, -1616; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d10 @ cfa - 8 * VG - 1617; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 16 * VG - 1618; CHECK-NEXT: ptrue pn8.b19; CHECK-NEXT: add x8, x1, x020; CHECK-NEXT: ld1h { z2.h, z10.h }, pn8/z, [x1]21; CHECK-NEXT: ld1h { z3.h, z11.h }, pn8/z, [x8]22; CHECK-NEXT: fcvtn z0.b, { z2.h, z3.h }23; CHECK-NEXT: fcvtn z1.b, { z10.h, z11.h }24; CHECK-NEXT: ldr z11, [sp, #1, mul vl] // 16-byte Folded Reload25; CHECK-NEXT: ldr z10, [sp, #2, mul vl] // 16-byte Folded Reload26; CHECK-NEXT: ldr p8, [sp, #7, mul vl] // 2-byte Reload27; CHECK-NEXT: addvl sp, sp, #328; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload29; CHECK-NEXT: ret30entry:31 %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()32 %1 = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.ld1.pn.x2.nxv4i32(target("aarch64.svcount") %0, ptr %ptr)33 %2 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %1, 034 %3 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %1, 135 %arrayidx2 = getelementptr inbounds i8, ptr %ptr, i64 %stride36 %4 = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.ld1.pn.x2.nxv4i32(target("aarch64.svcount") %0, ptr %arrayidx2)37 %5 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %4, 038 %6 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %4, 139 %res1 = call <vscale x 16 x i8> @llvm.aarch64.sve.fp8.cvtn.nxv8f16(<vscale x 8 x half> %2, <vscale x 8 x half> %5)40 %res2 = call <vscale x 16 x i8> @llvm.aarch64.sve.fp8.cvtn.nxv8f16(<vscale x 8 x half> %3, <vscale x 8 x half> %6)41 %ins1 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8> } poison, <vscale x 16 x i8> %res1, 042 %ins2 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8> } %ins1, <vscale x 16 x i8> %res2, 143 ret { <vscale x 16 x i8>, <vscale x 16 x i8> } %ins244}45 46 47define { <vscale x 16 x i8>, <vscale x 16 x i8> } @cvtnt_f32_tuple(i64 %stride, ptr %ptr, <vscale x 16 x i8> %d) {48; CHECK-LABEL: cvtnt_f32_tuple:49; CHECK: // %bb.0: // %entry50; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill51; CHECK-NEXT: addvl sp, sp, #-352; CHECK-NEXT: str p8, [sp, #7, mul vl] // 2-byte Spill53; CHECK-NEXT: str z11, [sp, #1, mul vl] // 16-byte Folded Spill54; CHECK-NEXT: str z10, [sp, #2, mul vl] // 16-byte Folded Spill55; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG56; CHECK-NEXT: .cfi_offset w29, -1657; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d10 @ cfa - 8 * VG - 1658; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 16 * VG - 1659; CHECK-NEXT: ptrue pn8.b60; CHECK-NEXT: add x8, x1, x061; CHECK-NEXT: mov z1.d, z0.d62; CHECK-NEXT: ld1w { z2.s, z10.s }, pn8/z, [x1]63; CHECK-NEXT: ld1w { z3.s, z11.s }, pn8/z, [x8]64; CHECK-NEXT: fcvtnt z0.b, { z2.s, z3.s }65; CHECK-NEXT: fcvtnt z1.b, { z10.s, z11.s }66; CHECK-NEXT: ldr z11, [sp, #1, mul vl] // 16-byte Folded Reload67; CHECK-NEXT: ldr z10, [sp, #2, mul vl] // 16-byte Folded Reload68; CHECK-NEXT: ldr p8, [sp, #7, mul vl] // 2-byte Reload69; CHECK-NEXT: addvl sp, sp, #370; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload71; CHECK-NEXT: ret72entry:73 %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()74 %1 = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x2.nxv4f32(target("aarch64.svcount") %0, ptr %ptr)75 %2 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %1, 076 %3 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %1, 177 %arrayidx2 = getelementptr inbounds i8, ptr %ptr, i64 %stride78 %4 = tail call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x2.nxv4f32(target("aarch64.svcount") %0, ptr %arrayidx2)79 %5 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %4, 080 %6 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %4, 181 %res1 = call <vscale x 16 x i8> @llvm.aarch64.sve.fp8.cvtnt.nxv4f32(<vscale x 16 x i8> %d, <vscale x 4 x float> %2, <vscale x 4 x float> %5)82 %res2 = call <vscale x 16 x i8> @llvm.aarch64.sve.fp8.cvtnt.nxv4f32(<vscale x 16 x i8> %d, <vscale x 4 x float> %3, <vscale x 4 x float> %6)83 %ins1 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8> } poison, <vscale x 16 x i8> %res1, 084 %ins2 = insertvalue { <vscale x 16 x i8>, <vscale x 16 x i8> } %ins1, <vscale x 16 x i8> %res2, 185 ret { <vscale x 16 x i8>, <vscale x 16 x i8> } %ins286}87