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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 -global-isel=0| FileCheck %s --check-prefixes=CHECK,CHECK-CVT,CHECK-CVT-SD3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel=0 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD4; RUN: llc < %s -mtriple=aarch64 -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-CVT,CHECK-CVT-GI5; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI6 7; i32 saturate8 9define <2 x i32> @stest_f64i32(<2 x double> %x) {10; CHECK-LABEL: stest_f64i32:11; CHECK: // %bb.0: // %entry12; CHECK-NEXT: fcvtzs v0.2d, v0.2d13; CHECK-NEXT: sqxtn v0.2s, v0.2d14; CHECK-NEXT: ret15entry:16 %conv = fptosi <2 x double> %x to <2 x i64>17 %0 = icmp slt <2 x i64> %conv, <i64 2147483647, i64 2147483647>18 %spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647>19 %1 = icmp sgt <2 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648>20 %spec.store.select7 = select <2 x i1> %1, <2 x i64> %spec.store.select, <2 x i64> <i64 -2147483648, i64 -2147483648>21 %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>22 ret <2 x i32> %conv623}24 25define <2 x i32> @utest_f64i32(<2 x double> %x) {26; CHECK-CVT-SD-LABEL: utest_f64i32:27; CHECK-CVT-SD: // %bb.0: // %entry28; CHECK-CVT-SD-NEXT: mov d1, v0.d[1]29; CHECK-CVT-SD-NEXT: fcvtzu w8, d030; CHECK-CVT-SD-NEXT: fcvtzu w9, d131; CHECK-CVT-SD-NEXT: fmov s0, w832; CHECK-CVT-SD-NEXT: mov v0.s[1], w933; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 killed $q034; CHECK-CVT-SD-NEXT: ret35;36; CHECK-FP16-SD-LABEL: utest_f64i32:37; CHECK-FP16-SD: // %bb.0: // %entry38; CHECK-FP16-SD-NEXT: mov d1, v0.d[1]39; CHECK-FP16-SD-NEXT: fcvtzu w8, d040; CHECK-FP16-SD-NEXT: fcvtzu w9, d141; CHECK-FP16-SD-NEXT: fmov s0, w842; CHECK-FP16-SD-NEXT: mov v0.s[1], w943; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q044; CHECK-FP16-SD-NEXT: ret45;46; CHECK-CVT-GI-LABEL: utest_f64i32:47; CHECK-CVT-GI: // %bb.0: // %entry48; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff49; CHECK-CVT-GI-NEXT: fcvtzu v0.2d, v0.2d50; CHECK-CVT-GI-NEXT: cmhi v2.2d, v1.2d, v0.2d51; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v2.16b52; CHECK-CVT-GI-NEXT: xtn v0.2s, v0.2d53; CHECK-CVT-GI-NEXT: ret54;55; CHECK-FP16-GI-LABEL: utest_f64i32:56; CHECK-FP16-GI: // %bb.0: // %entry57; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff58; CHECK-FP16-GI-NEXT: fcvtzu v0.2d, v0.2d59; CHECK-FP16-GI-NEXT: cmhi v2.2d, v1.2d, v0.2d60; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v2.16b61; CHECK-FP16-GI-NEXT: xtn v0.2s, v0.2d62; CHECK-FP16-GI-NEXT: ret63entry:64 %conv = fptoui <2 x double> %x to <2 x i64>65 %0 = icmp ult <2 x i64> %conv, <i64 4294967295, i64 4294967295>66 %spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>67 %conv6 = trunc <2 x i64> %spec.store.select to <2 x i32>68 ret <2 x i32> %conv669}70 71define <2 x i32> @ustest_f64i32(<2 x double> %x) {72; CHECK-LABEL: ustest_f64i32:73; CHECK: // %bb.0: // %entry74; CHECK-NEXT: fcvtzs v0.2d, v0.2d75; CHECK-NEXT: sqxtun v0.2s, v0.2d76; CHECK-NEXT: ret77entry:78 %conv = fptosi <2 x double> %x to <2 x i64>79 %0 = icmp slt <2 x i64> %conv, <i64 4294967295, i64 4294967295>80 %spec.store.select = select <2 x i1> %0, <2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>81 %1 = icmp sgt <2 x i64> %spec.store.select, zeroinitializer82 %spec.store.select7 = select <2 x i1> %1, <2 x i64> %spec.store.select, <2 x i64> zeroinitializer83 %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>84 ret <2 x i32> %conv685}86 87define <4 x i32> @stest_f32i32(<4 x float> %x) {88; CHECK-CVT-SD-LABEL: stest_f32i32:89; CHECK-CVT-SD: // %bb.0: // %entry90; CHECK-CVT-SD-NEXT: fcvtzs v0.4s, v0.4s91; CHECK-CVT-SD-NEXT: ret92;93; CHECK-FP16-SD-LABEL: stest_f32i32:94; CHECK-FP16-SD: // %bb.0: // %entry95; CHECK-FP16-SD-NEXT: fcvtzs v0.4s, v0.4s96; CHECK-FP16-SD-NEXT: ret97;98; CHECK-CVT-GI-LABEL: stest_f32i32:99; CHECK-CVT-GI: // %bb.0: // %entry100; CHECK-CVT-GI-NEXT: fcvtl v1.2d, v0.2s101; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s102; CHECK-CVT-GI-NEXT: adrp x8, .LCPI3_1103; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI3_1]104; CHECK-CVT-GI-NEXT: adrp x8, .LCPI3_0105; CHECK-CVT-GI-NEXT: fcvtzs v1.2d, v1.2d106; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d107; CHECK-CVT-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d108; CHECK-CVT-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d109; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b110; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b111; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI3_0]112; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d113; CHECK-CVT-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d114; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b115; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b116; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s117; CHECK-CVT-GI-NEXT: ret118;119; CHECK-FP16-GI-LABEL: stest_f32i32:120; CHECK-FP16-GI: // %bb.0: // %entry121; CHECK-FP16-GI-NEXT: fcvtl v1.2d, v0.2s122; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s123; CHECK-FP16-GI-NEXT: adrp x8, .LCPI3_1124; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI3_1]125; CHECK-FP16-GI-NEXT: adrp x8, .LCPI3_0126; CHECK-FP16-GI-NEXT: fcvtzs v1.2d, v1.2d127; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d128; CHECK-FP16-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d129; CHECK-FP16-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d130; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b131; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b132; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI3_0]133; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d134; CHECK-FP16-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d135; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b136; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b137; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s138; CHECK-FP16-GI-NEXT: ret139entry:140 %conv = fptosi <4 x float> %x to <4 x i64>141 %0 = icmp slt <4 x i64> %conv, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>142 %spec.store.select = select <4 x i1> %0, <4 x i64> %conv, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>143 %1 = icmp sgt <4 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>144 %spec.store.select7 = select <4 x i1> %1, <4 x i64> %spec.store.select, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>145 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>146 ret <4 x i32> %conv6147}148 149define <4 x i32> @utest_f32i32(<4 x float> %x) {150; CHECK-CVT-SD-LABEL: utest_f32i32:151; CHECK-CVT-SD: // %bb.0: // %entry152; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s153; CHECK-CVT-SD-NEXT: ret154;155; CHECK-FP16-SD-LABEL: utest_f32i32:156; CHECK-FP16-SD: // %bb.0: // %entry157; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s158; CHECK-FP16-SD-NEXT: ret159;160; CHECK-CVT-GI-LABEL: utest_f32i32:161; CHECK-CVT-GI: // %bb.0: // %entry162; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s163; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s164; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff165; CHECK-CVT-GI-NEXT: fcvtzu v2.2d, v2.2d166; CHECK-CVT-GI-NEXT: fcvtzu v0.2d, v0.2d167; CHECK-CVT-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d168; CHECK-CVT-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d169; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b170; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b171; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s172; CHECK-CVT-GI-NEXT: ret173;174; CHECK-FP16-GI-LABEL: utest_f32i32:175; CHECK-FP16-GI: // %bb.0: // %entry176; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s177; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s178; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff179; CHECK-FP16-GI-NEXT: fcvtzu v2.2d, v2.2d180; CHECK-FP16-GI-NEXT: fcvtzu v0.2d, v0.2d181; CHECK-FP16-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d182; CHECK-FP16-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d183; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b184; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b185; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s186; CHECK-FP16-GI-NEXT: ret187entry:188 %conv = fptoui <4 x float> %x to <4 x i64>189 %0 = icmp ult <4 x i64> %conv, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>190 %spec.store.select = select <4 x i1> %0, <4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>191 %conv6 = trunc <4 x i64> %spec.store.select to <4 x i32>192 ret <4 x i32> %conv6193}194 195define <4 x i32> @ustest_f32i32(<4 x float> %x) {196; CHECK-CVT-SD-LABEL: ustest_f32i32:197; CHECK-CVT-SD: // %bb.0: // %entry198; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s199; CHECK-CVT-SD-NEXT: ret200;201; CHECK-FP16-SD-LABEL: ustest_f32i32:202; CHECK-FP16-SD: // %bb.0: // %entry203; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s204; CHECK-FP16-SD-NEXT: ret205;206; CHECK-CVT-GI-LABEL: ustest_f32i32:207; CHECK-CVT-GI: // %bb.0: // %entry208; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s209; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s210; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff211; CHECK-CVT-GI-NEXT: fcvtzs v2.2d, v2.2d212; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d213; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d214; CHECK-CVT-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d215; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b216; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b217; CHECK-CVT-GI-NEXT: cmgt v1.2d, v2.2d, #0218; CHECK-CVT-GI-NEXT: cmgt v3.2d, v0.2d, #0219; CHECK-CVT-GI-NEXT: and v1.16b, v2.16b, v1.16b220; CHECK-CVT-GI-NEXT: and v0.16b, v0.16b, v3.16b221; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s222; CHECK-CVT-GI-NEXT: ret223;224; CHECK-FP16-GI-LABEL: ustest_f32i32:225; CHECK-FP16-GI: // %bb.0: // %entry226; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s227; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s228; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff229; CHECK-FP16-GI-NEXT: fcvtzs v2.2d, v2.2d230; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d231; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d232; CHECK-FP16-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d233; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b234; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b235; CHECK-FP16-GI-NEXT: cmgt v1.2d, v2.2d, #0236; CHECK-FP16-GI-NEXT: cmgt v3.2d, v0.2d, #0237; CHECK-FP16-GI-NEXT: and v1.16b, v2.16b, v1.16b238; CHECK-FP16-GI-NEXT: and v0.16b, v0.16b, v3.16b239; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s240; CHECK-FP16-GI-NEXT: ret241entry:242 %conv = fptosi <4 x float> %x to <4 x i64>243 %0 = icmp slt <4 x i64> %conv, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>244 %spec.store.select = select <4 x i1> %0, <4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>245 %1 = icmp sgt <4 x i64> %spec.store.select, zeroinitializer246 %spec.store.select7 = select <4 x i1> %1, <4 x i64> %spec.store.select, <4 x i64> zeroinitializer247 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>248 ret <4 x i32> %conv6249}250 251define <4 x i32> @stest_f16i32(<4 x half> %x) {252; CHECK-CVT-SD-LABEL: stest_f16i32:253; CHECK-CVT-SD: // %bb.0: // %entry254; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h255; CHECK-CVT-SD-NEXT: fcvtzs v0.4s, v0.4s256; CHECK-CVT-SD-NEXT: ret257;258; CHECK-FP16-SD-LABEL: stest_f16i32:259; CHECK-FP16-SD: // %bb.0: // %entry260; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h261; CHECK-FP16-SD-NEXT: fcvtzs v0.4s, v0.4s262; CHECK-FP16-SD-NEXT: ret263;264; CHECK-CVT-GI-LABEL: stest_f16i32:265; CHECK-CVT-GI: // %bb.0: // %entry266; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h267; CHECK-CVT-GI-NEXT: adrp x8, .LCPI6_1268; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI6_1]269; CHECK-CVT-GI-NEXT: adrp x8, .LCPI6_0270; CHECK-CVT-GI-NEXT: fcvtl v1.2d, v0.2s271; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s272; CHECK-CVT-GI-NEXT: fcvtzs v1.2d, v1.2d273; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d274; CHECK-CVT-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d275; CHECK-CVT-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d276; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b277; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b278; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI6_0]279; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d280; CHECK-CVT-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d281; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b282; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b283; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s284; CHECK-CVT-GI-NEXT: ret285;286; CHECK-FP16-GI-LABEL: stest_f16i32:287; CHECK-FP16-GI: // %bb.0: // %entry288; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h289; CHECK-FP16-GI-NEXT: adrp x8, .LCPI6_1290; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI6_1]291; CHECK-FP16-GI-NEXT: adrp x8, .LCPI6_0292; CHECK-FP16-GI-NEXT: fcvtl v1.2d, v0.2s293; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s294; CHECK-FP16-GI-NEXT: fcvtzs v1.2d, v1.2d295; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d296; CHECK-FP16-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d297; CHECK-FP16-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d298; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b299; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b300; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI6_0]301; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d302; CHECK-FP16-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d303; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b304; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b305; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s306; CHECK-FP16-GI-NEXT: ret307entry:308 %conv = fptosi <4 x half> %x to <4 x i64>309 %0 = icmp slt <4 x i64> %conv, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>310 %spec.store.select = select <4 x i1> %0, <4 x i64> %conv, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>311 %1 = icmp sgt <4 x i64> %spec.store.select, <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>312 %spec.store.select7 = select <4 x i1> %1, <4 x i64> %spec.store.select, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>313 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>314 ret <4 x i32> %conv6315}316 317define <4 x i32> @utest_f16i32(<4 x half> %x) {318; CHECK-CVT-SD-LABEL: utest_f16i32:319; CHECK-CVT-SD: // %bb.0: // %entry320; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h321; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s322; CHECK-CVT-SD-NEXT: ret323;324; CHECK-FP16-SD-LABEL: utest_f16i32:325; CHECK-FP16-SD: // %bb.0: // %entry326; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h327; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s328; CHECK-FP16-SD-NEXT: ret329;330; CHECK-CVT-GI-LABEL: utest_f16i32:331; CHECK-CVT-GI: // %bb.0: // %entry332; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h333; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff334; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s335; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s336; CHECK-CVT-GI-NEXT: fcvtzu v2.2d, v2.2d337; CHECK-CVT-GI-NEXT: fcvtzu v0.2d, v0.2d338; CHECK-CVT-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d339; CHECK-CVT-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d340; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b341; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b342; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s343; CHECK-CVT-GI-NEXT: ret344;345; CHECK-FP16-GI-LABEL: utest_f16i32:346; CHECK-FP16-GI: // %bb.0: // %entry347; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h348; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff349; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s350; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s351; CHECK-FP16-GI-NEXT: fcvtzu v2.2d, v2.2d352; CHECK-FP16-GI-NEXT: fcvtzu v0.2d, v0.2d353; CHECK-FP16-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d354; CHECK-FP16-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d355; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b356; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b357; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s358; CHECK-FP16-GI-NEXT: ret359entry:360 %conv = fptoui <4 x half> %x to <4 x i64>361 %0 = icmp ult <4 x i64> %conv, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>362 %spec.store.select = select <4 x i1> %0, <4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>363 %conv6 = trunc <4 x i64> %spec.store.select to <4 x i32>364 ret <4 x i32> %conv6365}366 367define <4 x i32> @ustest_f16i32(<4 x half> %x) {368; CHECK-CVT-SD-LABEL: ustest_f16i32:369; CHECK-CVT-SD: // %bb.0: // %entry370; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h371; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s372; CHECK-CVT-SD-NEXT: ret373;374; CHECK-FP16-SD-LABEL: ustest_f16i32:375; CHECK-FP16-SD: // %bb.0: // %entry376; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h377; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s378; CHECK-FP16-SD-NEXT: ret379;380; CHECK-CVT-GI-LABEL: ustest_f16i32:381; CHECK-CVT-GI: // %bb.0: // %entry382; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h383; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff384; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s385; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s386; CHECK-CVT-GI-NEXT: fcvtzs v2.2d, v2.2d387; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d388; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d389; CHECK-CVT-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d390; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b391; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b392; CHECK-CVT-GI-NEXT: cmgt v1.2d, v2.2d, #0393; CHECK-CVT-GI-NEXT: cmgt v3.2d, v0.2d, #0394; CHECK-CVT-GI-NEXT: and v1.16b, v2.16b, v1.16b395; CHECK-CVT-GI-NEXT: and v0.16b, v0.16b, v3.16b396; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s397; CHECK-CVT-GI-NEXT: ret398;399; CHECK-FP16-GI-LABEL: ustest_f16i32:400; CHECK-FP16-GI: // %bb.0: // %entry401; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h402; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff403; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s404; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s405; CHECK-FP16-GI-NEXT: fcvtzs v2.2d, v2.2d406; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d407; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d408; CHECK-FP16-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d409; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b410; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b411; CHECK-FP16-GI-NEXT: cmgt v1.2d, v2.2d, #0412; CHECK-FP16-GI-NEXT: cmgt v3.2d, v0.2d, #0413; CHECK-FP16-GI-NEXT: and v1.16b, v2.16b, v1.16b414; CHECK-FP16-GI-NEXT: and v0.16b, v0.16b, v3.16b415; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s416; CHECK-FP16-GI-NEXT: ret417entry:418 %conv = fptosi <4 x half> %x to <4 x i64>419 %0 = icmp slt <4 x i64> %conv, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>420 %spec.store.select = select <4 x i1> %0, <4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>421 %1 = icmp sgt <4 x i64> %spec.store.select, zeroinitializer422 %spec.store.select7 = select <4 x i1> %1, <4 x i64> %spec.store.select, <4 x i64> zeroinitializer423 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>424 ret <4 x i32> %conv6425}426 427; i16 saturate428 429define <2 x i16> @stest_f64i16(<2 x double> %x) {430; CHECK-CVT-SD-LABEL: stest_f64i16:431; CHECK-CVT-SD: // %bb.0: // %entry432; CHECK-CVT-SD-NEXT: fcvtzs v0.2d, v0.2d433; CHECK-CVT-SD-NEXT: movi v1.2s, #127, msl #8434; CHECK-CVT-SD-NEXT: xtn v0.2s, v0.2d435; CHECK-CVT-SD-NEXT: smin v0.2s, v0.2s, v1.2s436; CHECK-CVT-SD-NEXT: mvni v1.2s, #127, msl #8437; CHECK-CVT-SD-NEXT: smax v0.2s, v0.2s, v1.2s438; CHECK-CVT-SD-NEXT: ret439;440; CHECK-FP16-SD-LABEL: stest_f64i16:441; CHECK-FP16-SD: // %bb.0: // %entry442; CHECK-FP16-SD-NEXT: fcvtzs v0.2d, v0.2d443; CHECK-FP16-SD-NEXT: movi v1.2s, #127, msl #8444; CHECK-FP16-SD-NEXT: xtn v0.2s, v0.2d445; CHECK-FP16-SD-NEXT: smin v0.2s, v0.2s, v1.2s446; CHECK-FP16-SD-NEXT: mvni v1.2s, #127, msl #8447; CHECK-FP16-SD-NEXT: smax v0.2s, v0.2s, v1.2s448; CHECK-FP16-SD-NEXT: ret449;450; CHECK-CVT-GI-LABEL: stest_f64i16:451; CHECK-CVT-GI: // %bb.0: // %entry452; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d453; CHECK-CVT-GI-NEXT: movi v1.2s, #127, msl #8454; CHECK-CVT-GI-NEXT: mvni v2.2s, #127, msl #8455; CHECK-CVT-GI-NEXT: xtn v0.2s, v0.2d456; CHECK-CVT-GI-NEXT: smin v0.2s, v0.2s, v1.2s457; CHECK-CVT-GI-NEXT: smax v0.2s, v0.2s, v2.2s458; CHECK-CVT-GI-NEXT: ret459;460; CHECK-FP16-GI-LABEL: stest_f64i16:461; CHECK-FP16-GI: // %bb.0: // %entry462; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d463; CHECK-FP16-GI-NEXT: movi v1.2s, #127, msl #8464; CHECK-FP16-GI-NEXT: mvni v2.2s, #127, msl #8465; CHECK-FP16-GI-NEXT: xtn v0.2s, v0.2d466; CHECK-FP16-GI-NEXT: smin v0.2s, v0.2s, v1.2s467; CHECK-FP16-GI-NEXT: smax v0.2s, v0.2s, v2.2s468; CHECK-FP16-GI-NEXT: ret469entry:470 %conv = fptosi <2 x double> %x to <2 x i32>471 %0 = icmp slt <2 x i32> %conv, <i32 32767, i32 32767>472 %spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 32767, i32 32767>473 %1 = icmp sgt <2 x i32> %spec.store.select, <i32 -32768, i32 -32768>474 %spec.store.select7 = select <2 x i1> %1, <2 x i32> %spec.store.select, <2 x i32> <i32 -32768, i32 -32768>475 %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>476 ret <2 x i16> %conv6477}478 479define <2 x i16> @utest_f64i16(<2 x double> %x) {480; CHECK-LABEL: utest_f64i16:481; CHECK: // %bb.0: // %entry482; CHECK-NEXT: fcvtzu v0.2d, v0.2d483; CHECK-NEXT: movi d1, #0x00ffff0000ffff484; CHECK-NEXT: xtn v0.2s, v0.2d485; CHECK-NEXT: umin v0.2s, v0.2s, v1.2s486; CHECK-NEXT: ret487entry:488 %conv = fptoui <2 x double> %x to <2 x i32>489 %0 = icmp ult <2 x i32> %conv, <i32 65535, i32 65535>490 %spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>491 %conv6 = trunc <2 x i32> %spec.store.select to <2 x i16>492 ret <2 x i16> %conv6493}494 495define <2 x i16> @ustest_f64i16(<2 x double> %x) {496; CHECK-LABEL: ustest_f64i16:497; CHECK: // %bb.0: // %entry498; CHECK-NEXT: fcvtzs v0.2d, v0.2d499; CHECK-NEXT: movi d1, #0x00ffff0000ffff500; CHECK-NEXT: movi v2.2d, #0000000000000000501; CHECK-NEXT: xtn v0.2s, v0.2d502; CHECK-NEXT: smin v0.2s, v0.2s, v1.2s503; CHECK-NEXT: smax v0.2s, v0.2s, v2.2s504; CHECK-NEXT: ret505entry:506 %conv = fptosi <2 x double> %x to <2 x i32>507 %0 = icmp slt <2 x i32> %conv, <i32 65535, i32 65535>508 %spec.store.select = select <2 x i1> %0, <2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>509 %1 = icmp sgt <2 x i32> %spec.store.select, zeroinitializer510 %spec.store.select7 = select <2 x i1> %1, <2 x i32> %spec.store.select, <2 x i32> zeroinitializer511 %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>512 ret <2 x i16> %conv6513}514 515define <4 x i16> @stest_f32i16(<4 x float> %x) {516; CHECK-LABEL: stest_f32i16:517; CHECK: // %bb.0: // %entry518; CHECK-NEXT: fcvtzs v0.4s, v0.4s519; CHECK-NEXT: sqxtn v0.4h, v0.4s520; CHECK-NEXT: ret521entry:522 %conv = fptosi <4 x float> %x to <4 x i32>523 %0 = icmp slt <4 x i32> %conv, <i32 32767, i32 32767, i32 32767, i32 32767>524 %spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>525 %1 = icmp sgt <4 x i32> %spec.store.select, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>526 %spec.store.select7 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>527 %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>528 ret <4 x i16> %conv6529}530 531define <4 x i16> @utest_f32i16(<4 x float> %x) {532; CHECK-LABEL: utest_f32i16:533; CHECK: // %bb.0: // %entry534; CHECK-NEXT: fcvtzu v0.4s, v0.4s535; CHECK-NEXT: uqxtn v0.4h, v0.4s536; CHECK-NEXT: ret537entry:538 %conv = fptoui <4 x float> %x to <4 x i32>539 %0 = icmp ult <4 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535>540 %spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>541 %conv6 = trunc <4 x i32> %spec.store.select to <4 x i16>542 ret <4 x i16> %conv6543}544 545define <4 x i16> @ustest_f32i16(<4 x float> %x) {546; CHECK-LABEL: ustest_f32i16:547; CHECK: // %bb.0: // %entry548; CHECK-NEXT: fcvtzs v0.4s, v0.4s549; CHECK-NEXT: sqxtun v0.4h, v0.4s550; CHECK-NEXT: ret551entry:552 %conv = fptosi <4 x float> %x to <4 x i32>553 %0 = icmp slt <4 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535>554 %spec.store.select = select <4 x i1> %0, <4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>555 %1 = icmp sgt <4 x i32> %spec.store.select, zeroinitializer556 %spec.store.select7 = select <4 x i1> %1, <4 x i32> %spec.store.select, <4 x i32> zeroinitializer557 %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>558 ret <4 x i16> %conv6559}560 561define <8 x i16> @stest_f16i16(<8 x half> %x) {562; CHECK-CVT-LABEL: stest_f16i16:563; CHECK-CVT: // %bb.0: // %entry564; CHECK-CVT-NEXT: fcvtl v1.4s, v0.4h565; CHECK-CVT-NEXT: fcvtl2 v0.4s, v0.8h566; CHECK-CVT-NEXT: fcvtzs v1.4s, v1.4s567; CHECK-CVT-NEXT: fcvtzs v2.4s, v0.4s568; CHECK-CVT-NEXT: sqxtn v0.4h, v1.4s569; CHECK-CVT-NEXT: sqxtn2 v0.8h, v2.4s570; CHECK-CVT-NEXT: ret571;572; CHECK-FP16-SD-LABEL: stest_f16i16:573; CHECK-FP16-SD: // %bb.0: // %entry574; CHECK-FP16-SD-NEXT: fcvtzs v0.8h, v0.8h575; CHECK-FP16-SD-NEXT: ret576;577; CHECK-FP16-GI-LABEL: stest_f16i16:578; CHECK-FP16-GI: // %bb.0: // %entry579; CHECK-FP16-GI-NEXT: fcvtl v1.4s, v0.4h580; CHECK-FP16-GI-NEXT: fcvtl2 v0.4s, v0.8h581; CHECK-FP16-GI-NEXT: fcvtzs v1.4s, v1.4s582; CHECK-FP16-GI-NEXT: fcvtzs v2.4s, v0.4s583; CHECK-FP16-GI-NEXT: sqxtn v0.4h, v1.4s584; CHECK-FP16-GI-NEXT: sqxtn2 v0.8h, v2.4s585; CHECK-FP16-GI-NEXT: ret586entry:587 %conv = fptosi <8 x half> %x to <8 x i32>588 %0 = icmp slt <8 x i32> %conv, <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>589 %spec.store.select = select <8 x i1> %0, <8 x i32> %conv, <8 x i32> <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>590 %1 = icmp sgt <8 x i32> %spec.store.select, <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>591 %spec.store.select7 = select <8 x i1> %1, <8 x i32> %spec.store.select, <8 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>592 %conv6 = trunc <8 x i32> %spec.store.select7 to <8 x i16>593 ret <8 x i16> %conv6594}595 596define <8 x i16> @utest_f16i16(<8 x half> %x) {597; CHECK-CVT-LABEL: utest_f16i16:598; CHECK-CVT: // %bb.0: // %entry599; CHECK-CVT-NEXT: fcvtl v1.4s, v0.4h600; CHECK-CVT-NEXT: fcvtl2 v0.4s, v0.8h601; CHECK-CVT-NEXT: fcvtzu v1.4s, v1.4s602; CHECK-CVT-NEXT: fcvtzu v2.4s, v0.4s603; CHECK-CVT-NEXT: uqxtn v0.4h, v1.4s604; CHECK-CVT-NEXT: uqxtn2 v0.8h, v2.4s605; CHECK-CVT-NEXT: ret606;607; CHECK-FP16-SD-LABEL: utest_f16i16:608; CHECK-FP16-SD: // %bb.0: // %entry609; CHECK-FP16-SD-NEXT: fcvtzu v0.8h, v0.8h610; CHECK-FP16-SD-NEXT: ret611;612; CHECK-FP16-GI-LABEL: utest_f16i16:613; CHECK-FP16-GI: // %bb.0: // %entry614; CHECK-FP16-GI-NEXT: fcvtl v1.4s, v0.4h615; CHECK-FP16-GI-NEXT: fcvtl2 v0.4s, v0.8h616; CHECK-FP16-GI-NEXT: fcvtzu v1.4s, v1.4s617; CHECK-FP16-GI-NEXT: fcvtzu v2.4s, v0.4s618; CHECK-FP16-GI-NEXT: uqxtn v0.4h, v1.4s619; CHECK-FP16-GI-NEXT: uqxtn2 v0.8h, v2.4s620; CHECK-FP16-GI-NEXT: ret621entry:622 %conv = fptoui <8 x half> %x to <8 x i32>623 %0 = icmp ult <8 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>624 %spec.store.select = select <8 x i1> %0, <8 x i32> %conv, <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>625 %conv6 = trunc <8 x i32> %spec.store.select to <8 x i16>626 ret <8 x i16> %conv6627}628 629define <8 x i16> @ustest_f16i16(<8 x half> %x) {630; CHECK-CVT-LABEL: ustest_f16i16:631; CHECK-CVT: // %bb.0: // %entry632; CHECK-CVT-NEXT: fcvtl v1.4s, v0.4h633; CHECK-CVT-NEXT: fcvtl2 v0.4s, v0.8h634; CHECK-CVT-NEXT: fcvtzs v1.4s, v1.4s635; CHECK-CVT-NEXT: fcvtzs v2.4s, v0.4s636; CHECK-CVT-NEXT: sqxtun v0.4h, v1.4s637; CHECK-CVT-NEXT: sqxtun2 v0.8h, v2.4s638; CHECK-CVT-NEXT: ret639;640; CHECK-FP16-SD-LABEL: ustest_f16i16:641; CHECK-FP16-SD: // %bb.0: // %entry642; CHECK-FP16-SD-NEXT: fcvtzu v0.8h, v0.8h643; CHECK-FP16-SD-NEXT: ret644;645; CHECK-FP16-GI-LABEL: ustest_f16i16:646; CHECK-FP16-GI: // %bb.0: // %entry647; CHECK-FP16-GI-NEXT: fcvtl v1.4s, v0.4h648; CHECK-FP16-GI-NEXT: fcvtl2 v0.4s, v0.8h649; CHECK-FP16-GI-NEXT: fcvtzs v1.4s, v1.4s650; CHECK-FP16-GI-NEXT: fcvtzs v2.4s, v0.4s651; CHECK-FP16-GI-NEXT: sqxtun v0.4h, v1.4s652; CHECK-FP16-GI-NEXT: sqxtun2 v0.8h, v2.4s653; CHECK-FP16-GI-NEXT: ret654entry:655 %conv = fptosi <8 x half> %x to <8 x i32>656 %0 = icmp slt <8 x i32> %conv, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>657 %spec.store.select = select <8 x i1> %0, <8 x i32> %conv, <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>658 %1 = icmp sgt <8 x i32> %spec.store.select, zeroinitializer659 %spec.store.select7 = select <8 x i1> %1, <8 x i32> %spec.store.select, <8 x i32> zeroinitializer660 %conv6 = trunc <8 x i32> %spec.store.select7 to <8 x i16>661 ret <8 x i16> %conv6662}663 664; i64 saturate665 666define <2 x i64> @stest_f64i64(<2 x double> %x) {667; CHECK-CVT-SD-LABEL: stest_f64i64:668; CHECK-CVT-SD: // %bb.0: // %entry669; CHECK-CVT-SD-NEXT: fcvtzs v0.2d, v0.2d670; CHECK-CVT-SD-NEXT: ret671;672; CHECK-FP16-SD-LABEL: stest_f64i64:673; CHECK-FP16-SD: // %bb.0: // %entry674; CHECK-FP16-SD-NEXT: fcvtzs v0.2d, v0.2d675; CHECK-FP16-SD-NEXT: ret676;677; CHECK-CVT-GI-LABEL: stest_f64i64:678; CHECK-CVT-GI: // %bb.0: // %entry679; CHECK-CVT-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill680; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill681; CHECK-CVT-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill682; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill683; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 48684; CHECK-CVT-GI-NEXT: .cfi_offset w19, -8685; CHECK-CVT-GI-NEXT: .cfi_offset w20, -16686; CHECK-CVT-GI-NEXT: .cfi_offset w21, -24687; CHECK-CVT-GI-NEXT: .cfi_offset w22, -32688; CHECK-CVT-GI-NEXT: .cfi_offset w30, -40689; CHECK-CVT-GI-NEXT: .cfi_offset b8, -48690; CHECK-CVT-GI-NEXT: mov d8, v0.d[1]691; CHECK-CVT-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff692; CHECK-CVT-GI-NEXT: mov x22, #-9223372036854775808 // =0x8000000000000000693; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 killed $q0694; CHECK-CVT-GI-NEXT: bl __fixdfti695; CHECK-CVT-GI-NEXT: fmov d0, d8696; CHECK-CVT-GI-NEXT: mov x19, x0697; CHECK-CVT-GI-NEXT: mov x20, x1698; CHECK-CVT-GI-NEXT: bl __fixdfti699; CHECK-CVT-GI-NEXT: cmp x19, x21700; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload701; CHECK-CVT-GI-NEXT: cset w8, lo702; CHECK-CVT-GI-NEXT: cmp x20, #0703; CHECK-CVT-GI-NEXT: cset w9, mi704; CHECK-CVT-GI-NEXT: csel w8, w8, w9, eq705; CHECK-CVT-GI-NEXT: cmp x0, x21706; CHECK-CVT-GI-NEXT: cset w9, lo707; CHECK-CVT-GI-NEXT: cmp x1, #0708; CHECK-CVT-GI-NEXT: cset w10, mi709; CHECK-CVT-GI-NEXT: csel w9, w9, w10, eq710; CHECK-CVT-GI-NEXT: tst w8, #0x1711; CHECK-CVT-GI-NEXT: csel x8, x19, x21, ne712; CHECK-CVT-GI-NEXT: csel x10, x20, xzr, ne713; CHECK-CVT-GI-NEXT: tst w9, #0x1714; CHECK-CVT-GI-NEXT: csel x9, x0, x21, ne715; CHECK-CVT-GI-NEXT: csel x11, x1, xzr, ne716; CHECK-CVT-GI-NEXT: cmp x8, x22717; CHECK-CVT-GI-NEXT: cset w12, hi718; CHECK-CVT-GI-NEXT: cmp x10, #0719; CHECK-CVT-GI-NEXT: cset w13, pl720; CHECK-CVT-GI-NEXT: cmn x10, #1721; CHECK-CVT-GI-NEXT: csel w10, w12, w13, eq722; CHECK-CVT-GI-NEXT: cmp x9, x22723; CHECK-CVT-GI-NEXT: cset w12, hi724; CHECK-CVT-GI-NEXT: cmp x11, #0725; CHECK-CVT-GI-NEXT: cset w13, pl726; CHECK-CVT-GI-NEXT: cmn x11, #1727; CHECK-CVT-GI-NEXT: csel w11, w12, w13, eq728; CHECK-CVT-GI-NEXT: tst w10, #0x1729; CHECK-CVT-GI-NEXT: csel x8, x8, x22, ne730; CHECK-CVT-GI-NEXT: tst w11, #0x1731; CHECK-CVT-GI-NEXT: fmov d0, x8732; CHECK-CVT-GI-NEXT: csel x9, x9, x22, ne733; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload734; CHECK-CVT-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload735; CHECK-CVT-GI-NEXT: mov v0.d[1], x9736; CHECK-CVT-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload737; CHECK-CVT-GI-NEXT: ret738;739; CHECK-FP16-GI-LABEL: stest_f64i64:740; CHECK-FP16-GI: // %bb.0: // %entry741; CHECK-FP16-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill742; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill743; CHECK-FP16-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill744; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill745; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 48746; CHECK-FP16-GI-NEXT: .cfi_offset w19, -8747; CHECK-FP16-GI-NEXT: .cfi_offset w20, -16748; CHECK-FP16-GI-NEXT: .cfi_offset w21, -24749; CHECK-FP16-GI-NEXT: .cfi_offset w22, -32750; CHECK-FP16-GI-NEXT: .cfi_offset w30, -40751; CHECK-FP16-GI-NEXT: .cfi_offset b8, -48752; CHECK-FP16-GI-NEXT: mov d8, v0.d[1]753; CHECK-FP16-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff754; CHECK-FP16-GI-NEXT: mov x22, #-9223372036854775808 // =0x8000000000000000755; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q0756; CHECK-FP16-GI-NEXT: bl __fixdfti757; CHECK-FP16-GI-NEXT: fmov d0, d8758; CHECK-FP16-GI-NEXT: mov x19, x0759; CHECK-FP16-GI-NEXT: mov x20, x1760; CHECK-FP16-GI-NEXT: bl __fixdfti761; CHECK-FP16-GI-NEXT: cmp x19, x21762; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload763; CHECK-FP16-GI-NEXT: cset w8, lo764; CHECK-FP16-GI-NEXT: cmp x20, #0765; CHECK-FP16-GI-NEXT: cset w9, mi766; CHECK-FP16-GI-NEXT: csel w8, w8, w9, eq767; CHECK-FP16-GI-NEXT: cmp x0, x21768; CHECK-FP16-GI-NEXT: cset w9, lo769; CHECK-FP16-GI-NEXT: cmp x1, #0770; CHECK-FP16-GI-NEXT: cset w10, mi771; CHECK-FP16-GI-NEXT: csel w9, w9, w10, eq772; CHECK-FP16-GI-NEXT: tst w8, #0x1773; CHECK-FP16-GI-NEXT: csel x8, x19, x21, ne774; CHECK-FP16-GI-NEXT: csel x10, x20, xzr, ne775; CHECK-FP16-GI-NEXT: tst w9, #0x1776; CHECK-FP16-GI-NEXT: csel x9, x0, x21, ne777; CHECK-FP16-GI-NEXT: csel x11, x1, xzr, ne778; CHECK-FP16-GI-NEXT: cmp x8, x22779; CHECK-FP16-GI-NEXT: cset w12, hi780; CHECK-FP16-GI-NEXT: cmp x10, #0781; CHECK-FP16-GI-NEXT: cset w13, pl782; CHECK-FP16-GI-NEXT: cmn x10, #1783; CHECK-FP16-GI-NEXT: csel w10, w12, w13, eq784; CHECK-FP16-GI-NEXT: cmp x9, x22785; CHECK-FP16-GI-NEXT: cset w12, hi786; CHECK-FP16-GI-NEXT: cmp x11, #0787; CHECK-FP16-GI-NEXT: cset w13, pl788; CHECK-FP16-GI-NEXT: cmn x11, #1789; CHECK-FP16-GI-NEXT: csel w11, w12, w13, eq790; CHECK-FP16-GI-NEXT: tst w10, #0x1791; CHECK-FP16-GI-NEXT: csel x8, x8, x22, ne792; CHECK-FP16-GI-NEXT: tst w11, #0x1793; CHECK-FP16-GI-NEXT: fmov d0, x8794; CHECK-FP16-GI-NEXT: csel x9, x9, x22, ne795; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload796; CHECK-FP16-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload797; CHECK-FP16-GI-NEXT: mov v0.d[1], x9798; CHECK-FP16-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload799; CHECK-FP16-GI-NEXT: ret800entry:801 %conv = fptosi <2 x double> %x to <2 x i128>802 %0 = icmp slt <2 x i128> %conv, <i128 9223372036854775807, i128 9223372036854775807>803 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 9223372036854775807, i128 9223372036854775807>804 %1 = icmp sgt <2 x i128> %spec.store.select, <i128 -9223372036854775808, i128 -9223372036854775808>805 %spec.store.select7 = select <2 x i1> %1, <2 x i128> %spec.store.select, <2 x i128> <i128 -9223372036854775808, i128 -9223372036854775808>806 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>807 ret <2 x i64> %conv6808}809 810define <2 x i64> @utest_f64i64(<2 x double> %x) {811; CHECK-CVT-SD-LABEL: utest_f64i64:812; CHECK-CVT-SD: // %bb.0: // %entry813; CHECK-CVT-SD-NEXT: sub sp, sp, #48814; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill815; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill816; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 48817; CHECK-CVT-SD-NEXT: .cfi_offset w19, -8818; CHECK-CVT-SD-NEXT: .cfi_offset w20, -16819; CHECK-CVT-SD-NEXT: .cfi_offset w30, -32820; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill821; CHECK-CVT-SD-NEXT: mov d0, v0.d[1]822; CHECK-CVT-SD-NEXT: bl __fixunsdfti823; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload824; CHECK-CVT-SD-NEXT: mov x19, x0825; CHECK-CVT-SD-NEXT: mov x20, x1826; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 killed $q0827; CHECK-CVT-SD-NEXT: bl __fixunsdfti828; CHECK-CVT-SD-NEXT: cmp x1, #0829; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload830; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, eq831; CHECK-CVT-SD-NEXT: cmp x20, #0832; CHECK-CVT-SD-NEXT: csel x9, x19, xzr, eq833; CHECK-CVT-SD-NEXT: fmov d0, x8834; CHECK-CVT-SD-NEXT: fmov d1, x9835; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload836; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]837; CHECK-CVT-SD-NEXT: add sp, sp, #48838; CHECK-CVT-SD-NEXT: ret839;840; CHECK-FP16-SD-LABEL: utest_f64i64:841; CHECK-FP16-SD: // %bb.0: // %entry842; CHECK-FP16-SD-NEXT: sub sp, sp, #48843; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill844; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill845; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 48846; CHECK-FP16-SD-NEXT: .cfi_offset w19, -8847; CHECK-FP16-SD-NEXT: .cfi_offset w20, -16848; CHECK-FP16-SD-NEXT: .cfi_offset w30, -32849; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill850; CHECK-FP16-SD-NEXT: mov d0, v0.d[1]851; CHECK-FP16-SD-NEXT: bl __fixunsdfti852; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload853; CHECK-FP16-SD-NEXT: mov x19, x0854; CHECK-FP16-SD-NEXT: mov x20, x1855; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q0856; CHECK-FP16-SD-NEXT: bl __fixunsdfti857; CHECK-FP16-SD-NEXT: cmp x1, #0858; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload859; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, eq860; CHECK-FP16-SD-NEXT: cmp x20, #0861; CHECK-FP16-SD-NEXT: csel x9, x19, xzr, eq862; CHECK-FP16-SD-NEXT: fmov d0, x8863; CHECK-FP16-SD-NEXT: fmov d1, x9864; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload865; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]866; CHECK-FP16-SD-NEXT: add sp, sp, #48867; CHECK-FP16-SD-NEXT: ret868;869; CHECK-CVT-GI-LABEL: utest_f64i64:870; CHECK-CVT-GI: // %bb.0: // %entry871; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill872; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill873; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill874; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 32875; CHECK-CVT-GI-NEXT: .cfi_offset w19, -8876; CHECK-CVT-GI-NEXT: .cfi_offset w20, -16877; CHECK-CVT-GI-NEXT: .cfi_offset w30, -24878; CHECK-CVT-GI-NEXT: .cfi_offset b8, -32879; CHECK-CVT-GI-NEXT: mov d8, v0.d[1]880; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 killed $q0881; CHECK-CVT-GI-NEXT: bl __fixunsdfti882; CHECK-CVT-GI-NEXT: fmov d0, d8883; CHECK-CVT-GI-NEXT: mov x19, x0884; CHECK-CVT-GI-NEXT: mov x20, x1885; CHECK-CVT-GI-NEXT: bl __fixunsdfti886; CHECK-CVT-GI-NEXT: cmp x20, #1887; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload888; CHECK-CVT-GI-NEXT: cset w8, lo889; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq890; CHECK-CVT-GI-NEXT: cmp x1, #1891; CHECK-CVT-GI-NEXT: cset w9, lo892; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq893; CHECK-CVT-GI-NEXT: tst w8, #0x1894; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne895; CHECK-CVT-GI-NEXT: tst w9, #0x1896; CHECK-CVT-GI-NEXT: fmov d0, x8897; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload898; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne899; CHECK-CVT-GI-NEXT: mov v0.d[1], x9900; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload901; CHECK-CVT-GI-NEXT: ret902;903; CHECK-FP16-GI-LABEL: utest_f64i64:904; CHECK-FP16-GI: // %bb.0: // %entry905; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill906; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill907; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill908; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 32909; CHECK-FP16-GI-NEXT: .cfi_offset w19, -8910; CHECK-FP16-GI-NEXT: .cfi_offset w20, -16911; CHECK-FP16-GI-NEXT: .cfi_offset w30, -24912; CHECK-FP16-GI-NEXT: .cfi_offset b8, -32913; CHECK-FP16-GI-NEXT: mov d8, v0.d[1]914; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q0915; CHECK-FP16-GI-NEXT: bl __fixunsdfti916; CHECK-FP16-GI-NEXT: fmov d0, d8917; CHECK-FP16-GI-NEXT: mov x19, x0918; CHECK-FP16-GI-NEXT: mov x20, x1919; CHECK-FP16-GI-NEXT: bl __fixunsdfti920; CHECK-FP16-GI-NEXT: cmp x20, #1921; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload922; CHECK-FP16-GI-NEXT: cset w8, lo923; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq924; CHECK-FP16-GI-NEXT: cmp x1, #1925; CHECK-FP16-GI-NEXT: cset w9, lo926; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq927; CHECK-FP16-GI-NEXT: tst w8, #0x1928; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne929; CHECK-FP16-GI-NEXT: tst w9, #0x1930; CHECK-FP16-GI-NEXT: fmov d0, x8931; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload932; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne933; CHECK-FP16-GI-NEXT: mov v0.d[1], x9934; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload935; CHECK-FP16-GI-NEXT: ret936entry:937 %conv = fptoui <2 x double> %x to <2 x i128>938 %0 = icmp ult <2 x i128> %conv, <i128 18446744073709551616, i128 18446744073709551616>939 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>940 %conv6 = trunc <2 x i128> %spec.store.select to <2 x i64>941 ret <2 x i64> %conv6942}943 944define <2 x i64> @ustest_f64i64(<2 x double> %x) {945; CHECK-CVT-SD-LABEL: ustest_f64i64:946; CHECK-CVT-SD: // %bb.0: // %entry947; CHECK-CVT-SD-NEXT: sub sp, sp, #48948; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill949; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill950; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 48951; CHECK-CVT-SD-NEXT: .cfi_offset w19, -8952; CHECK-CVT-SD-NEXT: .cfi_offset w20, -16953; CHECK-CVT-SD-NEXT: .cfi_offset w30, -32954; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill955; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 killed $q0956; CHECK-CVT-SD-NEXT: bl __fixdfti957; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload958; CHECK-CVT-SD-NEXT: mov x19, x0959; CHECK-CVT-SD-NEXT: mov x20, x1960; CHECK-CVT-SD-NEXT: mov d0, v0.d[1]961; CHECK-CVT-SD-NEXT: bl __fixdfti962; CHECK-CVT-SD-NEXT: cmp x1, #1963; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload964; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, lt965; CHECK-CVT-SD-NEXT: csinc x9, x1, xzr, lt966; CHECK-CVT-SD-NEXT: cmp x20, #1967; CHECK-CVT-SD-NEXT: csel x10, x19, xzr, lt968; CHECK-CVT-SD-NEXT: csinc x11, x20, xzr, lt969; CHECK-CVT-SD-NEXT: cmp xzr, x10970; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload971; CHECK-CVT-SD-NEXT: ngcs xzr, x11972; CHECK-CVT-SD-NEXT: csel x10, x10, xzr, lt973; CHECK-CVT-SD-NEXT: cmp xzr, x8974; CHECK-CVT-SD-NEXT: ngcs xzr, x9975; CHECK-CVT-SD-NEXT: fmov d0, x10976; CHECK-CVT-SD-NEXT: csel x8, x8, xzr, lt977; CHECK-CVT-SD-NEXT: fmov d1, x8978; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]979; CHECK-CVT-SD-NEXT: add sp, sp, #48980; CHECK-CVT-SD-NEXT: ret981;982; CHECK-FP16-SD-LABEL: ustest_f64i64:983; CHECK-FP16-SD: // %bb.0: // %entry984; CHECK-FP16-SD-NEXT: sub sp, sp, #48985; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill986; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill987; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 48988; CHECK-FP16-SD-NEXT: .cfi_offset w19, -8989; CHECK-FP16-SD-NEXT: .cfi_offset w20, -16990; CHECK-FP16-SD-NEXT: .cfi_offset w30, -32991; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill992; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q0993; CHECK-FP16-SD-NEXT: bl __fixdfti994; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload995; CHECK-FP16-SD-NEXT: mov x19, x0996; CHECK-FP16-SD-NEXT: mov x20, x1997; CHECK-FP16-SD-NEXT: mov d0, v0.d[1]998; CHECK-FP16-SD-NEXT: bl __fixdfti999; CHECK-FP16-SD-NEXT: cmp x1, #11000; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1001; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, lt1002; CHECK-FP16-SD-NEXT: csinc x9, x1, xzr, lt1003; CHECK-FP16-SD-NEXT: cmp x20, #11004; CHECK-FP16-SD-NEXT: csel x10, x19, xzr, lt1005; CHECK-FP16-SD-NEXT: csinc x11, x20, xzr, lt1006; CHECK-FP16-SD-NEXT: cmp xzr, x101007; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1008; CHECK-FP16-SD-NEXT: ngcs xzr, x111009; CHECK-FP16-SD-NEXT: csel x10, x10, xzr, lt1010; CHECK-FP16-SD-NEXT: cmp xzr, x81011; CHECK-FP16-SD-NEXT: ngcs xzr, x91012; CHECK-FP16-SD-NEXT: fmov d0, x101013; CHECK-FP16-SD-NEXT: csel x8, x8, xzr, lt1014; CHECK-FP16-SD-NEXT: fmov d1, x81015; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]1016; CHECK-FP16-SD-NEXT: add sp, sp, #481017; CHECK-FP16-SD-NEXT: ret1018;1019; CHECK-CVT-GI-LABEL: ustest_f64i64:1020; CHECK-CVT-GI: // %bb.0: // %entry1021; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill1022; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1023; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill1024; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 321025; CHECK-CVT-GI-NEXT: .cfi_offset w19, -81026; CHECK-CVT-GI-NEXT: .cfi_offset w20, -161027; CHECK-CVT-GI-NEXT: .cfi_offset w30, -241028; CHECK-CVT-GI-NEXT: .cfi_offset b8, -321029; CHECK-CVT-GI-NEXT: mov d8, v0.d[1]1030; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 killed $q01031; CHECK-CVT-GI-NEXT: bl __fixdfti1032; CHECK-CVT-GI-NEXT: fmov d0, d81033; CHECK-CVT-GI-NEXT: mov x19, x01034; CHECK-CVT-GI-NEXT: mov x20, x11035; CHECK-CVT-GI-NEXT: bl __fixdfti1036; CHECK-CVT-GI-NEXT: cmp x20, #11037; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1038; CHECK-CVT-GI-NEXT: cset w8, lt1039; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq1040; CHECK-CVT-GI-NEXT: cmp x1, #11041; CHECK-CVT-GI-NEXT: cset w9, lt1042; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq1043; CHECK-CVT-GI-NEXT: tst w8, #0x11044; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne1045; CHECK-CVT-GI-NEXT: csinc x10, x20, xzr, ne1046; CHECK-CVT-GI-NEXT: tst w9, #0x11047; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne1048; CHECK-CVT-GI-NEXT: csinc x11, x1, xzr, ne1049; CHECK-CVT-GI-NEXT: cmp x8, #01050; CHECK-CVT-GI-NEXT: cset w12, hi1051; CHECK-CVT-GI-NEXT: cmp x10, #01052; CHECK-CVT-GI-NEXT: cset w10, gt1053; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload1054; CHECK-CVT-GI-NEXT: csel w10, w12, w10, eq1055; CHECK-CVT-GI-NEXT: cmp x9, #01056; CHECK-CVT-GI-NEXT: cset w12, hi1057; CHECK-CVT-GI-NEXT: cmp x11, #01058; CHECK-CVT-GI-NEXT: cset w11, gt1059; CHECK-CVT-GI-NEXT: csel w11, w12, w11, eq1060; CHECK-CVT-GI-NEXT: tst w10, #0x11061; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne1062; CHECK-CVT-GI-NEXT: tst w11, #0x11063; CHECK-CVT-GI-NEXT: fmov d0, x81064; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne1065; CHECK-CVT-GI-NEXT: mov v0.d[1], x91066; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload1067; CHECK-CVT-GI-NEXT: ret1068;1069; CHECK-FP16-GI-LABEL: ustest_f64i64:1070; CHECK-FP16-GI: // %bb.0: // %entry1071; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill1072; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1073; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill1074; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 321075; CHECK-FP16-GI-NEXT: .cfi_offset w19, -81076; CHECK-FP16-GI-NEXT: .cfi_offset w20, -161077; CHECK-FP16-GI-NEXT: .cfi_offset w30, -241078; CHECK-FP16-GI-NEXT: .cfi_offset b8, -321079; CHECK-FP16-GI-NEXT: mov d8, v0.d[1]1080; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q01081; CHECK-FP16-GI-NEXT: bl __fixdfti1082; CHECK-FP16-GI-NEXT: fmov d0, d81083; CHECK-FP16-GI-NEXT: mov x19, x01084; CHECK-FP16-GI-NEXT: mov x20, x11085; CHECK-FP16-GI-NEXT: bl __fixdfti1086; CHECK-FP16-GI-NEXT: cmp x20, #11087; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1088; CHECK-FP16-GI-NEXT: cset w8, lt1089; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq1090; CHECK-FP16-GI-NEXT: cmp x1, #11091; CHECK-FP16-GI-NEXT: cset w9, lt1092; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq1093; CHECK-FP16-GI-NEXT: tst w8, #0x11094; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne1095; CHECK-FP16-GI-NEXT: csinc x10, x20, xzr, ne1096; CHECK-FP16-GI-NEXT: tst w9, #0x11097; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne1098; CHECK-FP16-GI-NEXT: csinc x11, x1, xzr, ne1099; CHECK-FP16-GI-NEXT: cmp x8, #01100; CHECK-FP16-GI-NEXT: cset w12, hi1101; CHECK-FP16-GI-NEXT: cmp x10, #01102; CHECK-FP16-GI-NEXT: cset w10, gt1103; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload1104; CHECK-FP16-GI-NEXT: csel w10, w12, w10, eq1105; CHECK-FP16-GI-NEXT: cmp x9, #01106; CHECK-FP16-GI-NEXT: cset w12, hi1107; CHECK-FP16-GI-NEXT: cmp x11, #01108; CHECK-FP16-GI-NEXT: cset w11, gt1109; CHECK-FP16-GI-NEXT: csel w11, w12, w11, eq1110; CHECK-FP16-GI-NEXT: tst w10, #0x11111; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne1112; CHECK-FP16-GI-NEXT: tst w11, #0x11113; CHECK-FP16-GI-NEXT: fmov d0, x81114; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne1115; CHECK-FP16-GI-NEXT: mov v0.d[1], x91116; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload1117; CHECK-FP16-GI-NEXT: ret1118entry:1119 %conv = fptosi <2 x double> %x to <2 x i128>1120 %0 = icmp slt <2 x i128> %conv, <i128 18446744073709551616, i128 18446744073709551616>1121 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>1122 %1 = icmp sgt <2 x i128> %spec.store.select, zeroinitializer1123 %spec.store.select7 = select <2 x i1> %1, <2 x i128> %spec.store.select, <2 x i128> zeroinitializer1124 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>1125 ret <2 x i64> %conv61126}1127 1128define <2 x i64> @stest_f32i64(<2 x float> %x) {1129; CHECK-CVT-SD-LABEL: stest_f32i64:1130; CHECK-CVT-SD: // %bb.0: // %entry1131; CHECK-CVT-SD-NEXT: fcvtl v0.2d, v0.2s1132; CHECK-CVT-SD-NEXT: fcvtzs v0.2d, v0.2d1133; CHECK-CVT-SD-NEXT: ret1134;1135; CHECK-FP16-SD-LABEL: stest_f32i64:1136; CHECK-FP16-SD: // %bb.0: // %entry1137; CHECK-FP16-SD-NEXT: fcvtl v0.2d, v0.2s1138; CHECK-FP16-SD-NEXT: fcvtzs v0.2d, v0.2d1139; CHECK-FP16-SD-NEXT: ret1140;1141; CHECK-CVT-GI-LABEL: stest_f32i64:1142; CHECK-CVT-GI: // %bb.0: // %entry1143; CHECK-CVT-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill1144; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1145; CHECK-CVT-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill1146; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1147; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 481148; CHECK-CVT-GI-NEXT: .cfi_offset w19, -81149; CHECK-CVT-GI-NEXT: .cfi_offset w20, -161150; CHECK-CVT-GI-NEXT: .cfi_offset w21, -241151; CHECK-CVT-GI-NEXT: .cfi_offset w22, -321152; CHECK-CVT-GI-NEXT: .cfi_offset w30, -401153; CHECK-CVT-GI-NEXT: .cfi_offset b8, -481154; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q01155; CHECK-CVT-GI-NEXT: mov s8, v0.s[1]1156; CHECK-CVT-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff1157; CHECK-CVT-GI-NEXT: mov x22, #-9223372036854775808 // =0x80000000000000001158; CHECK-CVT-GI-NEXT: // kill: def $s0 killed $s0 killed $q01159; CHECK-CVT-GI-NEXT: bl __fixsfti1160; CHECK-CVT-GI-NEXT: fmov s0, s81161; CHECK-CVT-GI-NEXT: mov x19, x01162; CHECK-CVT-GI-NEXT: mov x20, x11163; CHECK-CVT-GI-NEXT: bl __fixsfti1164; CHECK-CVT-GI-NEXT: cmp x19, x211165; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1166; CHECK-CVT-GI-NEXT: cset w8, lo1167; CHECK-CVT-GI-NEXT: cmp x20, #01168; CHECK-CVT-GI-NEXT: cset w9, mi1169; CHECK-CVT-GI-NEXT: csel w8, w8, w9, eq1170; CHECK-CVT-GI-NEXT: cmp x0, x211171; CHECK-CVT-GI-NEXT: cset w9, lo1172; CHECK-CVT-GI-NEXT: cmp x1, #01173; CHECK-CVT-GI-NEXT: cset w10, mi1174; CHECK-CVT-GI-NEXT: csel w9, w9, w10, eq1175; CHECK-CVT-GI-NEXT: tst w8, #0x11176; CHECK-CVT-GI-NEXT: csel x8, x19, x21, ne1177; CHECK-CVT-GI-NEXT: csel x10, x20, xzr, ne1178; CHECK-CVT-GI-NEXT: tst w9, #0x11179; CHECK-CVT-GI-NEXT: csel x9, x0, x21, ne1180; CHECK-CVT-GI-NEXT: csel x11, x1, xzr, ne1181; CHECK-CVT-GI-NEXT: cmp x8, x221182; CHECK-CVT-GI-NEXT: cset w12, hi1183; CHECK-CVT-GI-NEXT: cmp x10, #01184; CHECK-CVT-GI-NEXT: cset w13, pl1185; CHECK-CVT-GI-NEXT: cmn x10, #11186; CHECK-CVT-GI-NEXT: csel w10, w12, w13, eq1187; CHECK-CVT-GI-NEXT: cmp x9, x221188; CHECK-CVT-GI-NEXT: cset w12, hi1189; CHECK-CVT-GI-NEXT: cmp x11, #01190; CHECK-CVT-GI-NEXT: cset w13, pl1191; CHECK-CVT-GI-NEXT: cmn x11, #11192; CHECK-CVT-GI-NEXT: csel w11, w12, w13, eq1193; CHECK-CVT-GI-NEXT: tst w10, #0x11194; CHECK-CVT-GI-NEXT: csel x8, x8, x22, ne1195; CHECK-CVT-GI-NEXT: tst w11, #0x11196; CHECK-CVT-GI-NEXT: fmov d0, x81197; CHECK-CVT-GI-NEXT: csel x9, x9, x22, ne1198; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1199; CHECK-CVT-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload1200; CHECK-CVT-GI-NEXT: mov v0.d[1], x91201; CHECK-CVT-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload1202; CHECK-CVT-GI-NEXT: ret1203;1204; CHECK-FP16-GI-LABEL: stest_f32i64:1205; CHECK-FP16-GI: // %bb.0: // %entry1206; CHECK-FP16-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill1207; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1208; CHECK-FP16-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill1209; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1210; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 481211; CHECK-FP16-GI-NEXT: .cfi_offset w19, -81212; CHECK-FP16-GI-NEXT: .cfi_offset w20, -161213; CHECK-FP16-GI-NEXT: .cfi_offset w21, -241214; CHECK-FP16-GI-NEXT: .cfi_offset w22, -321215; CHECK-FP16-GI-NEXT: .cfi_offset w30, -401216; CHECK-FP16-GI-NEXT: .cfi_offset b8, -481217; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q01218; CHECK-FP16-GI-NEXT: mov s8, v0.s[1]1219; CHECK-FP16-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff1220; CHECK-FP16-GI-NEXT: mov x22, #-9223372036854775808 // =0x80000000000000001221; CHECK-FP16-GI-NEXT: // kill: def $s0 killed $s0 killed $q01222; CHECK-FP16-GI-NEXT: bl __fixsfti1223; CHECK-FP16-GI-NEXT: fmov s0, s81224; CHECK-FP16-GI-NEXT: mov x19, x01225; CHECK-FP16-GI-NEXT: mov x20, x11226; CHECK-FP16-GI-NEXT: bl __fixsfti1227; CHECK-FP16-GI-NEXT: cmp x19, x211228; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1229; CHECK-FP16-GI-NEXT: cset w8, lo1230; CHECK-FP16-GI-NEXT: cmp x20, #01231; CHECK-FP16-GI-NEXT: cset w9, mi1232; CHECK-FP16-GI-NEXT: csel w8, w8, w9, eq1233; CHECK-FP16-GI-NEXT: cmp x0, x211234; CHECK-FP16-GI-NEXT: cset w9, lo1235; CHECK-FP16-GI-NEXT: cmp x1, #01236; CHECK-FP16-GI-NEXT: cset w10, mi1237; CHECK-FP16-GI-NEXT: csel w9, w9, w10, eq1238; CHECK-FP16-GI-NEXT: tst w8, #0x11239; CHECK-FP16-GI-NEXT: csel x8, x19, x21, ne1240; CHECK-FP16-GI-NEXT: csel x10, x20, xzr, ne1241; CHECK-FP16-GI-NEXT: tst w9, #0x11242; CHECK-FP16-GI-NEXT: csel x9, x0, x21, ne1243; CHECK-FP16-GI-NEXT: csel x11, x1, xzr, ne1244; CHECK-FP16-GI-NEXT: cmp x8, x221245; CHECK-FP16-GI-NEXT: cset w12, hi1246; CHECK-FP16-GI-NEXT: cmp x10, #01247; CHECK-FP16-GI-NEXT: cset w13, pl1248; CHECK-FP16-GI-NEXT: cmn x10, #11249; CHECK-FP16-GI-NEXT: csel w10, w12, w13, eq1250; CHECK-FP16-GI-NEXT: cmp x9, x221251; CHECK-FP16-GI-NEXT: cset w12, hi1252; CHECK-FP16-GI-NEXT: cmp x11, #01253; CHECK-FP16-GI-NEXT: cset w13, pl1254; CHECK-FP16-GI-NEXT: cmn x11, #11255; CHECK-FP16-GI-NEXT: csel w11, w12, w13, eq1256; CHECK-FP16-GI-NEXT: tst w10, #0x11257; CHECK-FP16-GI-NEXT: csel x8, x8, x22, ne1258; CHECK-FP16-GI-NEXT: tst w11, #0x11259; CHECK-FP16-GI-NEXT: fmov d0, x81260; CHECK-FP16-GI-NEXT: csel x9, x9, x22, ne1261; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1262; CHECK-FP16-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload1263; CHECK-FP16-GI-NEXT: mov v0.d[1], x91264; CHECK-FP16-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload1265; CHECK-FP16-GI-NEXT: ret1266entry:1267 %conv = fptosi <2 x float> %x to <2 x i128>1268 %0 = icmp slt <2 x i128> %conv, <i128 9223372036854775807, i128 9223372036854775807>1269 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 9223372036854775807, i128 9223372036854775807>1270 %1 = icmp sgt <2 x i128> %spec.store.select, <i128 -9223372036854775808, i128 -9223372036854775808>1271 %spec.store.select7 = select <2 x i1> %1, <2 x i128> %spec.store.select, <2 x i128> <i128 -9223372036854775808, i128 -9223372036854775808>1272 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>1273 ret <2 x i64> %conv61274}1275 1276define <2 x i64> @utest_f32i64(<2 x float> %x) {1277; CHECK-CVT-SD-LABEL: utest_f32i64:1278; CHECK-CVT-SD: // %bb.0: // %entry1279; CHECK-CVT-SD-NEXT: sub sp, sp, #481280; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1281; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1282; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 481283; CHECK-CVT-SD-NEXT: .cfi_offset w19, -81284; CHECK-CVT-SD-NEXT: .cfi_offset w20, -161285; CHECK-CVT-SD-NEXT: .cfi_offset w30, -321286; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q01287; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill1288; CHECK-CVT-SD-NEXT: mov s0, v0.s[1]1289; CHECK-CVT-SD-NEXT: bl __fixunssfti1290; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload1291; CHECK-CVT-SD-NEXT: mov x19, x01292; CHECK-CVT-SD-NEXT: mov x20, x11293; CHECK-CVT-SD-NEXT: // kill: def $s0 killed $s0 killed $q01294; CHECK-CVT-SD-NEXT: bl __fixunssfti1295; CHECK-CVT-SD-NEXT: cmp x1, #01296; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1297; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, eq1298; CHECK-CVT-SD-NEXT: cmp x20, #01299; CHECK-CVT-SD-NEXT: csel x9, x19, xzr, eq1300; CHECK-CVT-SD-NEXT: fmov d0, x81301; CHECK-CVT-SD-NEXT: fmov d1, x91302; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1303; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]1304; CHECK-CVT-SD-NEXT: add sp, sp, #481305; CHECK-CVT-SD-NEXT: ret1306;1307; CHECK-FP16-SD-LABEL: utest_f32i64:1308; CHECK-FP16-SD: // %bb.0: // %entry1309; CHECK-FP16-SD-NEXT: sub sp, sp, #481310; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1311; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1312; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 481313; CHECK-FP16-SD-NEXT: .cfi_offset w19, -81314; CHECK-FP16-SD-NEXT: .cfi_offset w20, -161315; CHECK-FP16-SD-NEXT: .cfi_offset w30, -321316; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q01317; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill1318; CHECK-FP16-SD-NEXT: mov s0, v0.s[1]1319; CHECK-FP16-SD-NEXT: bl __fixunssfti1320; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload1321; CHECK-FP16-SD-NEXT: mov x19, x01322; CHECK-FP16-SD-NEXT: mov x20, x11323; CHECK-FP16-SD-NEXT: // kill: def $s0 killed $s0 killed $q01324; CHECK-FP16-SD-NEXT: bl __fixunssfti1325; CHECK-FP16-SD-NEXT: cmp x1, #01326; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1327; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, eq1328; CHECK-FP16-SD-NEXT: cmp x20, #01329; CHECK-FP16-SD-NEXT: csel x9, x19, xzr, eq1330; CHECK-FP16-SD-NEXT: fmov d0, x81331; CHECK-FP16-SD-NEXT: fmov d1, x91332; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1333; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]1334; CHECK-FP16-SD-NEXT: add sp, sp, #481335; CHECK-FP16-SD-NEXT: ret1336;1337; CHECK-CVT-GI-LABEL: utest_f32i64:1338; CHECK-CVT-GI: // %bb.0: // %entry1339; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill1340; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1341; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill1342; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 321343; CHECK-CVT-GI-NEXT: .cfi_offset w19, -81344; CHECK-CVT-GI-NEXT: .cfi_offset w20, -161345; CHECK-CVT-GI-NEXT: .cfi_offset w30, -241346; CHECK-CVT-GI-NEXT: .cfi_offset b8, -321347; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q01348; CHECK-CVT-GI-NEXT: mov s8, v0.s[1]1349; CHECK-CVT-GI-NEXT: // kill: def $s0 killed $s0 killed $q01350; CHECK-CVT-GI-NEXT: bl __fixunssfti1351; CHECK-CVT-GI-NEXT: fmov s0, s81352; CHECK-CVT-GI-NEXT: mov x19, x01353; CHECK-CVT-GI-NEXT: mov x20, x11354; CHECK-CVT-GI-NEXT: bl __fixunssfti1355; CHECK-CVT-GI-NEXT: cmp x20, #11356; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1357; CHECK-CVT-GI-NEXT: cset w8, lo1358; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq1359; CHECK-CVT-GI-NEXT: cmp x1, #11360; CHECK-CVT-GI-NEXT: cset w9, lo1361; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq1362; CHECK-CVT-GI-NEXT: tst w8, #0x11363; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne1364; CHECK-CVT-GI-NEXT: tst w9, #0x11365; CHECK-CVT-GI-NEXT: fmov d0, x81366; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload1367; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne1368; CHECK-CVT-GI-NEXT: mov v0.d[1], x91369; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload1370; CHECK-CVT-GI-NEXT: ret1371;1372; CHECK-FP16-GI-LABEL: utest_f32i64:1373; CHECK-FP16-GI: // %bb.0: // %entry1374; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill1375; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1376; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill1377; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 321378; CHECK-FP16-GI-NEXT: .cfi_offset w19, -81379; CHECK-FP16-GI-NEXT: .cfi_offset w20, -161380; CHECK-FP16-GI-NEXT: .cfi_offset w30, -241381; CHECK-FP16-GI-NEXT: .cfi_offset b8, -321382; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q01383; CHECK-FP16-GI-NEXT: mov s8, v0.s[1]1384; CHECK-FP16-GI-NEXT: // kill: def $s0 killed $s0 killed $q01385; CHECK-FP16-GI-NEXT: bl __fixunssfti1386; CHECK-FP16-GI-NEXT: fmov s0, s81387; CHECK-FP16-GI-NEXT: mov x19, x01388; CHECK-FP16-GI-NEXT: mov x20, x11389; CHECK-FP16-GI-NEXT: bl __fixunssfti1390; CHECK-FP16-GI-NEXT: cmp x20, #11391; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1392; CHECK-FP16-GI-NEXT: cset w8, lo1393; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq1394; CHECK-FP16-GI-NEXT: cmp x1, #11395; CHECK-FP16-GI-NEXT: cset w9, lo1396; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq1397; CHECK-FP16-GI-NEXT: tst w8, #0x11398; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne1399; CHECK-FP16-GI-NEXT: tst w9, #0x11400; CHECK-FP16-GI-NEXT: fmov d0, x81401; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload1402; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne1403; CHECK-FP16-GI-NEXT: mov v0.d[1], x91404; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload1405; CHECK-FP16-GI-NEXT: ret1406entry:1407 %conv = fptoui <2 x float> %x to <2 x i128>1408 %0 = icmp ult <2 x i128> %conv, <i128 18446744073709551616, i128 18446744073709551616>1409 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>1410 %conv6 = trunc <2 x i128> %spec.store.select to <2 x i64>1411 ret <2 x i64> %conv61412}1413 1414define <2 x i64> @ustest_f32i64(<2 x float> %x) {1415; CHECK-CVT-SD-LABEL: ustest_f32i64:1416; CHECK-CVT-SD: // %bb.0: // %entry1417; CHECK-CVT-SD-NEXT: sub sp, sp, #481418; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1419; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1420; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 481421; CHECK-CVT-SD-NEXT: .cfi_offset w19, -81422; CHECK-CVT-SD-NEXT: .cfi_offset w20, -161423; CHECK-CVT-SD-NEXT: .cfi_offset w30, -321424; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q01425; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill1426; CHECK-CVT-SD-NEXT: // kill: def $s0 killed $s0 killed $q01427; CHECK-CVT-SD-NEXT: bl __fixsfti1428; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload1429; CHECK-CVT-SD-NEXT: mov x19, x01430; CHECK-CVT-SD-NEXT: mov x20, x11431; CHECK-CVT-SD-NEXT: mov s0, v0.s[1]1432; CHECK-CVT-SD-NEXT: bl __fixsfti1433; CHECK-CVT-SD-NEXT: cmp x1, #11434; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1435; CHECK-CVT-SD-NEXT: csinc x8, x1, xzr, lt1436; CHECK-CVT-SD-NEXT: csel x9, x0, xzr, lt1437; CHECK-CVT-SD-NEXT: cmp x20, #11438; CHECK-CVT-SD-NEXT: csel x10, x19, xzr, lt1439; CHECK-CVT-SD-NEXT: csinc x11, x20, xzr, lt1440; CHECK-CVT-SD-NEXT: cmp xzr, x101441; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1442; CHECK-CVT-SD-NEXT: ngcs xzr, x111443; CHECK-CVT-SD-NEXT: csel x10, x10, xzr, lt1444; CHECK-CVT-SD-NEXT: cmp xzr, x91445; CHECK-CVT-SD-NEXT: ngcs xzr, x81446; CHECK-CVT-SD-NEXT: fmov d0, x101447; CHECK-CVT-SD-NEXT: csel x8, x9, xzr, lt1448; CHECK-CVT-SD-NEXT: fmov d1, x81449; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]1450; CHECK-CVT-SD-NEXT: add sp, sp, #481451; CHECK-CVT-SD-NEXT: ret1452;1453; CHECK-FP16-SD-LABEL: ustest_f32i64:1454; CHECK-FP16-SD: // %bb.0: // %entry1455; CHECK-FP16-SD-NEXT: sub sp, sp, #481456; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1457; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1458; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 481459; CHECK-FP16-SD-NEXT: .cfi_offset w19, -81460; CHECK-FP16-SD-NEXT: .cfi_offset w20, -161461; CHECK-FP16-SD-NEXT: .cfi_offset w30, -321462; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q01463; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill1464; CHECK-FP16-SD-NEXT: // kill: def $s0 killed $s0 killed $q01465; CHECK-FP16-SD-NEXT: bl __fixsfti1466; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload1467; CHECK-FP16-SD-NEXT: mov x19, x01468; CHECK-FP16-SD-NEXT: mov x20, x11469; CHECK-FP16-SD-NEXT: mov s0, v0.s[1]1470; CHECK-FP16-SD-NEXT: bl __fixsfti1471; CHECK-FP16-SD-NEXT: cmp x1, #11472; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1473; CHECK-FP16-SD-NEXT: csinc x8, x1, xzr, lt1474; CHECK-FP16-SD-NEXT: csel x9, x0, xzr, lt1475; CHECK-FP16-SD-NEXT: cmp x20, #11476; CHECK-FP16-SD-NEXT: csel x10, x19, xzr, lt1477; CHECK-FP16-SD-NEXT: csinc x11, x20, xzr, lt1478; CHECK-FP16-SD-NEXT: cmp xzr, x101479; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1480; CHECK-FP16-SD-NEXT: ngcs xzr, x111481; CHECK-FP16-SD-NEXT: csel x10, x10, xzr, lt1482; CHECK-FP16-SD-NEXT: cmp xzr, x91483; CHECK-FP16-SD-NEXT: ngcs xzr, x81484; CHECK-FP16-SD-NEXT: fmov d0, x101485; CHECK-FP16-SD-NEXT: csel x8, x9, xzr, lt1486; CHECK-FP16-SD-NEXT: fmov d1, x81487; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]1488; CHECK-FP16-SD-NEXT: add sp, sp, #481489; CHECK-FP16-SD-NEXT: ret1490;1491; CHECK-CVT-GI-LABEL: ustest_f32i64:1492; CHECK-CVT-GI: // %bb.0: // %entry1493; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill1494; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1495; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill1496; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 321497; CHECK-CVT-GI-NEXT: .cfi_offset w19, -81498; CHECK-CVT-GI-NEXT: .cfi_offset w20, -161499; CHECK-CVT-GI-NEXT: .cfi_offset w30, -241500; CHECK-CVT-GI-NEXT: .cfi_offset b8, -321501; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q01502; CHECK-CVT-GI-NEXT: mov s8, v0.s[1]1503; CHECK-CVT-GI-NEXT: // kill: def $s0 killed $s0 killed $q01504; CHECK-CVT-GI-NEXT: bl __fixsfti1505; CHECK-CVT-GI-NEXT: fmov s0, s81506; CHECK-CVT-GI-NEXT: mov x19, x01507; CHECK-CVT-GI-NEXT: mov x20, x11508; CHECK-CVT-GI-NEXT: bl __fixsfti1509; CHECK-CVT-GI-NEXT: cmp x20, #11510; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1511; CHECK-CVT-GI-NEXT: cset w8, lt1512; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq1513; CHECK-CVT-GI-NEXT: cmp x1, #11514; CHECK-CVT-GI-NEXT: cset w9, lt1515; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq1516; CHECK-CVT-GI-NEXT: tst w8, #0x11517; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne1518; CHECK-CVT-GI-NEXT: csinc x10, x20, xzr, ne1519; CHECK-CVT-GI-NEXT: tst w9, #0x11520; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne1521; CHECK-CVT-GI-NEXT: csinc x11, x1, xzr, ne1522; CHECK-CVT-GI-NEXT: cmp x8, #01523; CHECK-CVT-GI-NEXT: cset w12, hi1524; CHECK-CVT-GI-NEXT: cmp x10, #01525; CHECK-CVT-GI-NEXT: cset w10, gt1526; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload1527; CHECK-CVT-GI-NEXT: csel w10, w12, w10, eq1528; CHECK-CVT-GI-NEXT: cmp x9, #01529; CHECK-CVT-GI-NEXT: cset w12, hi1530; CHECK-CVT-GI-NEXT: cmp x11, #01531; CHECK-CVT-GI-NEXT: cset w11, gt1532; CHECK-CVT-GI-NEXT: csel w11, w12, w11, eq1533; CHECK-CVT-GI-NEXT: tst w10, #0x11534; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne1535; CHECK-CVT-GI-NEXT: tst w11, #0x11536; CHECK-CVT-GI-NEXT: fmov d0, x81537; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne1538; CHECK-CVT-GI-NEXT: mov v0.d[1], x91539; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload1540; CHECK-CVT-GI-NEXT: ret1541;1542; CHECK-FP16-GI-LABEL: ustest_f32i64:1543; CHECK-FP16-GI: // %bb.0: // %entry1544; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill1545; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill1546; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill1547; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 321548; CHECK-FP16-GI-NEXT: .cfi_offset w19, -81549; CHECK-FP16-GI-NEXT: .cfi_offset w20, -161550; CHECK-FP16-GI-NEXT: .cfi_offset w30, -241551; CHECK-FP16-GI-NEXT: .cfi_offset b8, -321552; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q01553; CHECK-FP16-GI-NEXT: mov s8, v0.s[1]1554; CHECK-FP16-GI-NEXT: // kill: def $s0 killed $s0 killed $q01555; CHECK-FP16-GI-NEXT: bl __fixsfti1556; CHECK-FP16-GI-NEXT: fmov s0, s81557; CHECK-FP16-GI-NEXT: mov x19, x01558; CHECK-FP16-GI-NEXT: mov x20, x11559; CHECK-FP16-GI-NEXT: bl __fixsfti1560; CHECK-FP16-GI-NEXT: cmp x20, #11561; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload1562; CHECK-FP16-GI-NEXT: cset w8, lt1563; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq1564; CHECK-FP16-GI-NEXT: cmp x1, #11565; CHECK-FP16-GI-NEXT: cset w9, lt1566; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq1567; CHECK-FP16-GI-NEXT: tst w8, #0x11568; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne1569; CHECK-FP16-GI-NEXT: csinc x10, x20, xzr, ne1570; CHECK-FP16-GI-NEXT: tst w9, #0x11571; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne1572; CHECK-FP16-GI-NEXT: csinc x11, x1, xzr, ne1573; CHECK-FP16-GI-NEXT: cmp x8, #01574; CHECK-FP16-GI-NEXT: cset w12, hi1575; CHECK-FP16-GI-NEXT: cmp x10, #01576; CHECK-FP16-GI-NEXT: cset w10, gt1577; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload1578; CHECK-FP16-GI-NEXT: csel w10, w12, w10, eq1579; CHECK-FP16-GI-NEXT: cmp x9, #01580; CHECK-FP16-GI-NEXT: cset w12, hi1581; CHECK-FP16-GI-NEXT: cmp x11, #01582; CHECK-FP16-GI-NEXT: cset w11, gt1583; CHECK-FP16-GI-NEXT: csel w11, w12, w11, eq1584; CHECK-FP16-GI-NEXT: tst w10, #0x11585; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne1586; CHECK-FP16-GI-NEXT: tst w11, #0x11587; CHECK-FP16-GI-NEXT: fmov d0, x81588; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne1589; CHECK-FP16-GI-NEXT: mov v0.d[1], x91590; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload1591; CHECK-FP16-GI-NEXT: ret1592entry:1593 %conv = fptosi <2 x float> %x to <2 x i128>1594 %0 = icmp slt <2 x i128> %conv, <i128 18446744073709551616, i128 18446744073709551616>1595 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>1596 %1 = icmp sgt <2 x i128> %spec.store.select, zeroinitializer1597 %spec.store.select7 = select <2 x i1> %1, <2 x i128> %spec.store.select, <2 x i128> zeroinitializer1598 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>1599 ret <2 x i64> %conv61600}1601 1602define <2 x i64> @stest_f16i64(<2 x half> %x) {1603; CHECK-CVT-SD-LABEL: stest_f16i64:1604; CHECK-CVT-SD: // %bb.0: // %entry1605; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q01606; CHECK-CVT-SD-NEXT: mov h1, v0.h[1]1607; CHECK-CVT-SD-NEXT: fcvt s0, h01608; CHECK-CVT-SD-NEXT: fcvt s1, h11609; CHECK-CVT-SD-NEXT: fcvtzs x8, s01610; CHECK-CVT-SD-NEXT: fcvtzs x9, s11611; CHECK-CVT-SD-NEXT: fmov d0, x81612; CHECK-CVT-SD-NEXT: mov v0.d[1], x91613; CHECK-CVT-SD-NEXT: ret1614;1615; CHECK-FP16-SD-LABEL: stest_f16i64:1616; CHECK-FP16-SD: // %bb.0: // %entry1617; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q01618; CHECK-FP16-SD-NEXT: mov h1, v0.h[1]1619; CHECK-FP16-SD-NEXT: fcvtzs x8, h01620; CHECK-FP16-SD-NEXT: fcvtzs x9, h11621; CHECK-FP16-SD-NEXT: fmov d0, x81622; CHECK-FP16-SD-NEXT: mov v0.d[1], x91623; CHECK-FP16-SD-NEXT: ret1624;1625; CHECK-CVT-GI-LABEL: stest_f16i64:1626; CHECK-CVT-GI: // %bb.0: // %entry1627; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q01628; CHECK-CVT-GI-NEXT: mov h1, v0.h[1]1629; CHECK-CVT-GI-NEXT: mov x8, #9223372036854775807 // =0x7fffffffffffffff1630; CHECK-CVT-GI-NEXT: mov x16, #-9223372036854775808 // =0x80000000000000001631; CHECK-CVT-GI-NEXT: fcvt s0, h01632; CHECK-CVT-GI-NEXT: fcvt s1, h11633; CHECK-CVT-GI-NEXT: fcvtzs x9, s01634; CHECK-CVT-GI-NEXT: fcvtzs x10, s11635; CHECK-CVT-GI-NEXT: asr x11, x9, #631636; CHECK-CVT-GI-NEXT: cmp x9, x81637; CHECK-CVT-GI-NEXT: cset w12, lo1638; CHECK-CVT-GI-NEXT: cmp x11, #01639; CHECK-CVT-GI-NEXT: asr x13, x10, #631640; CHECK-CVT-GI-NEXT: cset w14, mi1641; CHECK-CVT-GI-NEXT: csel w12, w12, w14, eq1642; CHECK-CVT-GI-NEXT: cmp x10, x81643; CHECK-CVT-GI-NEXT: cset w14, lo1644; CHECK-CVT-GI-NEXT: cmp x13, #01645; CHECK-CVT-GI-NEXT: cset w15, mi1646; CHECK-CVT-GI-NEXT: csel w14, w14, w15, eq1647; CHECK-CVT-GI-NEXT: tst w12, #0x11648; CHECK-CVT-GI-NEXT: csel x9, x9, x8, ne1649; CHECK-CVT-GI-NEXT: csel x11, x11, xzr, ne1650; CHECK-CVT-GI-NEXT: tst w14, #0x11651; CHECK-CVT-GI-NEXT: csel x8, x10, x8, ne1652; CHECK-CVT-GI-NEXT: csel x10, x13, xzr, ne1653; CHECK-CVT-GI-NEXT: cmp x9, x161654; CHECK-CVT-GI-NEXT: cset w12, hi1655; CHECK-CVT-GI-NEXT: cmp x11, #01656; CHECK-CVT-GI-NEXT: cset w13, pl1657; CHECK-CVT-GI-NEXT: cmn x11, #11658; CHECK-CVT-GI-NEXT: csel w11, w12, w13, eq1659; CHECK-CVT-GI-NEXT: cmp x8, x161660; CHECK-CVT-GI-NEXT: cset w12, hi1661; CHECK-CVT-GI-NEXT: cmp x10, #01662; CHECK-CVT-GI-NEXT: cset w13, pl1663; CHECK-CVT-GI-NEXT: cmn x10, #11664; CHECK-CVT-GI-NEXT: csel w10, w12, w13, eq1665; CHECK-CVT-GI-NEXT: tst w11, #0x11666; CHECK-CVT-GI-NEXT: csel x9, x9, x16, ne1667; CHECK-CVT-GI-NEXT: tst w10, #0x11668; CHECK-CVT-GI-NEXT: fmov d0, x91669; CHECK-CVT-GI-NEXT: csel x8, x8, x16, ne1670; CHECK-CVT-GI-NEXT: mov v0.d[1], x81671; CHECK-CVT-GI-NEXT: ret1672;1673; CHECK-FP16-GI-LABEL: stest_f16i64:1674; CHECK-FP16-GI: // %bb.0: // %entry1675; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q01676; CHECK-FP16-GI-NEXT: mov h1, v0.h[1]1677; CHECK-FP16-GI-NEXT: fcvtzs x9, h01678; CHECK-FP16-GI-NEXT: mov x8, #9223372036854775807 // =0x7fffffffffffffff1679; CHECK-FP16-GI-NEXT: mov x16, #-9223372036854775808 // =0x80000000000000001680; CHECK-FP16-GI-NEXT: fcvtzs x10, h11681; CHECK-FP16-GI-NEXT: asr x11, x9, #631682; CHECK-FP16-GI-NEXT: cmp x9, x81683; CHECK-FP16-GI-NEXT: cset w12, lo1684; CHECK-FP16-GI-NEXT: cmp x11, #01685; CHECK-FP16-GI-NEXT: cset w14, mi1686; CHECK-FP16-GI-NEXT: asr x13, x10, #631687; CHECK-FP16-GI-NEXT: csel w12, w12, w14, eq1688; CHECK-FP16-GI-NEXT: cmp x10, x81689; CHECK-FP16-GI-NEXT: cset w14, lo1690; CHECK-FP16-GI-NEXT: cmp x13, #01691; CHECK-FP16-GI-NEXT: cset w15, mi1692; CHECK-FP16-GI-NEXT: csel w14, w14, w15, eq1693; CHECK-FP16-GI-NEXT: tst w12, #0x11694; CHECK-FP16-GI-NEXT: csel x9, x9, x8, ne1695; CHECK-FP16-GI-NEXT: csel x11, x11, xzr, ne1696; CHECK-FP16-GI-NEXT: tst w14, #0x11697; CHECK-FP16-GI-NEXT: csel x8, x10, x8, ne1698; CHECK-FP16-GI-NEXT: csel x10, x13, xzr, ne1699; CHECK-FP16-GI-NEXT: cmp x9, x161700; CHECK-FP16-GI-NEXT: cset w12, hi1701; CHECK-FP16-GI-NEXT: cmp x11, #01702; CHECK-FP16-GI-NEXT: cset w13, pl1703; CHECK-FP16-GI-NEXT: cmn x11, #11704; CHECK-FP16-GI-NEXT: csel w11, w12, w13, eq1705; CHECK-FP16-GI-NEXT: cmp x8, x161706; CHECK-FP16-GI-NEXT: cset w12, hi1707; CHECK-FP16-GI-NEXT: cmp x10, #01708; CHECK-FP16-GI-NEXT: cset w13, pl1709; CHECK-FP16-GI-NEXT: cmn x10, #11710; CHECK-FP16-GI-NEXT: csel w10, w12, w13, eq1711; CHECK-FP16-GI-NEXT: tst w11, #0x11712; CHECK-FP16-GI-NEXT: csel x9, x9, x16, ne1713; CHECK-FP16-GI-NEXT: tst w10, #0x11714; CHECK-FP16-GI-NEXT: fmov d0, x91715; CHECK-FP16-GI-NEXT: csel x8, x8, x16, ne1716; CHECK-FP16-GI-NEXT: mov v0.d[1], x81717; CHECK-FP16-GI-NEXT: ret1718entry:1719 %conv = fptosi <2 x half> %x to <2 x i128>1720 %0 = icmp slt <2 x i128> %conv, <i128 9223372036854775807, i128 9223372036854775807>1721 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 9223372036854775807, i128 9223372036854775807>1722 %1 = icmp sgt <2 x i128> %spec.store.select, <i128 -9223372036854775808, i128 -9223372036854775808>1723 %spec.store.select7 = select <2 x i1> %1, <2 x i128> %spec.store.select, <2 x i128> <i128 -9223372036854775808, i128 -9223372036854775808>1724 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>1725 ret <2 x i64> %conv61726}1727 1728define <2 x i64> @utest_f16i64(<2 x half> %x) {1729; CHECK-CVT-SD-LABEL: utest_f16i64:1730; CHECK-CVT-SD: // %bb.0: // %entry1731; CHECK-CVT-SD-NEXT: sub sp, sp, #481732; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1733; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1734; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 481735; CHECK-CVT-SD-NEXT: .cfi_offset w19, -81736; CHECK-CVT-SD-NEXT: .cfi_offset w20, -161737; CHECK-CVT-SD-NEXT: .cfi_offset w30, -321738; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q01739; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill1740; CHECK-CVT-SD-NEXT: mov h0, v0.h[1]1741; CHECK-CVT-SD-NEXT: bl __fixunshfti1742; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload1743; CHECK-CVT-SD-NEXT: mov x19, x01744; CHECK-CVT-SD-NEXT: mov x20, x11745; CHECK-CVT-SD-NEXT: // kill: def $h0 killed $h0 killed $q01746; CHECK-CVT-SD-NEXT: bl __fixunshfti1747; CHECK-CVT-SD-NEXT: cmp x1, #01748; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1749; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, eq1750; CHECK-CVT-SD-NEXT: cmp x20, #01751; CHECK-CVT-SD-NEXT: csel x9, x19, xzr, eq1752; CHECK-CVT-SD-NEXT: fmov d0, x81753; CHECK-CVT-SD-NEXT: fmov d1, x91754; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1755; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]1756; CHECK-CVT-SD-NEXT: add sp, sp, #481757; CHECK-CVT-SD-NEXT: ret1758;1759; CHECK-FP16-SD-LABEL: utest_f16i64:1760; CHECK-FP16-SD: // %bb.0: // %entry1761; CHECK-FP16-SD-NEXT: sub sp, sp, #481762; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1763; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1764; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 481765; CHECK-FP16-SD-NEXT: .cfi_offset w19, -81766; CHECK-FP16-SD-NEXT: .cfi_offset w20, -161767; CHECK-FP16-SD-NEXT: .cfi_offset w30, -321768; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q01769; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill1770; CHECK-FP16-SD-NEXT: mov h0, v0.h[1]1771; CHECK-FP16-SD-NEXT: bl __fixunshfti1772; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload1773; CHECK-FP16-SD-NEXT: mov x19, x01774; CHECK-FP16-SD-NEXT: mov x20, x11775; CHECK-FP16-SD-NEXT: // kill: def $h0 killed $h0 killed $q01776; CHECK-FP16-SD-NEXT: bl __fixunshfti1777; CHECK-FP16-SD-NEXT: cmp x1, #01778; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1779; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, eq1780; CHECK-FP16-SD-NEXT: cmp x20, #01781; CHECK-FP16-SD-NEXT: csel x9, x19, xzr, eq1782; CHECK-FP16-SD-NEXT: fmov d0, x81783; CHECK-FP16-SD-NEXT: fmov d1, x91784; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1785; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]1786; CHECK-FP16-SD-NEXT: add sp, sp, #481787; CHECK-FP16-SD-NEXT: ret1788;1789; CHECK-CVT-GI-LABEL: utest_f16i64:1790; CHECK-CVT-GI: // %bb.0: // %entry1791; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q01792; CHECK-CVT-GI-NEXT: mov h1, v0.h[1]1793; CHECK-CVT-GI-NEXT: fcvt s0, h01794; CHECK-CVT-GI-NEXT: fcvt s1, h11795; CHECK-CVT-GI-NEXT: fcvtzu x8, s01796; CHECK-CVT-GI-NEXT: fcvtzu x9, s11797; CHECK-CVT-GI-NEXT: fmov d0, x81798; CHECK-CVT-GI-NEXT: mov v0.d[1], x91799; CHECK-CVT-GI-NEXT: ret1800;1801; CHECK-FP16-GI-LABEL: utest_f16i64:1802; CHECK-FP16-GI: // %bb.0: // %entry1803; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q01804; CHECK-FP16-GI-NEXT: mov h1, v0.h[1]1805; CHECK-FP16-GI-NEXT: fcvtzu x8, h01806; CHECK-FP16-GI-NEXT: fcvtzu x9, h11807; CHECK-FP16-GI-NEXT: fmov d0, x81808; CHECK-FP16-GI-NEXT: mov v0.d[1], x91809; CHECK-FP16-GI-NEXT: ret1810entry:1811 %conv = fptoui <2 x half> %x to <2 x i128>1812 %0 = icmp ult <2 x i128> %conv, <i128 18446744073709551616, i128 18446744073709551616>1813 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>1814 %conv6 = trunc <2 x i128> %spec.store.select to <2 x i64>1815 ret <2 x i64> %conv61816}1817 1818define <2 x i64> @ustest_f16i64(<2 x half> %x) {1819; CHECK-CVT-SD-LABEL: ustest_f16i64:1820; CHECK-CVT-SD: // %bb.0: // %entry1821; CHECK-CVT-SD-NEXT: sub sp, sp, #481822; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1823; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1824; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 481825; CHECK-CVT-SD-NEXT: .cfi_offset w19, -81826; CHECK-CVT-SD-NEXT: .cfi_offset w20, -161827; CHECK-CVT-SD-NEXT: .cfi_offset w30, -321828; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q01829; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill1830; CHECK-CVT-SD-NEXT: // kill: def $h0 killed $h0 killed $q01831; CHECK-CVT-SD-NEXT: bl __fixhfti1832; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload1833; CHECK-CVT-SD-NEXT: mov x19, x01834; CHECK-CVT-SD-NEXT: mov x20, x11835; CHECK-CVT-SD-NEXT: mov h0, v0.h[1]1836; CHECK-CVT-SD-NEXT: bl __fixhfti1837; CHECK-CVT-SD-NEXT: cmp x1, #11838; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1839; CHECK-CVT-SD-NEXT: csinc x8, x1, xzr, lt1840; CHECK-CVT-SD-NEXT: csel x9, x0, xzr, lt1841; CHECK-CVT-SD-NEXT: cmp x20, #11842; CHECK-CVT-SD-NEXT: csel x10, x19, xzr, lt1843; CHECK-CVT-SD-NEXT: csinc x11, x20, xzr, lt1844; CHECK-CVT-SD-NEXT: cmp xzr, x101845; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1846; CHECK-CVT-SD-NEXT: ngcs xzr, x111847; CHECK-CVT-SD-NEXT: csel x10, x10, xzr, lt1848; CHECK-CVT-SD-NEXT: cmp xzr, x91849; CHECK-CVT-SD-NEXT: ngcs xzr, x81850; CHECK-CVT-SD-NEXT: fmov d0, x101851; CHECK-CVT-SD-NEXT: csel x8, x9, xzr, lt1852; CHECK-CVT-SD-NEXT: fmov d1, x81853; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]1854; CHECK-CVT-SD-NEXT: add sp, sp, #481855; CHECK-CVT-SD-NEXT: ret1856;1857; CHECK-FP16-SD-LABEL: ustest_f16i64:1858; CHECK-FP16-SD: // %bb.0: // %entry1859; CHECK-FP16-SD-NEXT: sub sp, sp, #481860; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill1861; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill1862; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 481863; CHECK-FP16-SD-NEXT: .cfi_offset w19, -81864; CHECK-FP16-SD-NEXT: .cfi_offset w20, -161865; CHECK-FP16-SD-NEXT: .cfi_offset w30, -321866; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q01867; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill1868; CHECK-FP16-SD-NEXT: // kill: def $h0 killed $h0 killed $q01869; CHECK-FP16-SD-NEXT: bl __fixhfti1870; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload1871; CHECK-FP16-SD-NEXT: mov x19, x01872; CHECK-FP16-SD-NEXT: mov x20, x11873; CHECK-FP16-SD-NEXT: mov h0, v0.h[1]1874; CHECK-FP16-SD-NEXT: bl __fixhfti1875; CHECK-FP16-SD-NEXT: cmp x1, #11876; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload1877; CHECK-FP16-SD-NEXT: csinc x8, x1, xzr, lt1878; CHECK-FP16-SD-NEXT: csel x9, x0, xzr, lt1879; CHECK-FP16-SD-NEXT: cmp x20, #11880; CHECK-FP16-SD-NEXT: csel x10, x19, xzr, lt1881; CHECK-FP16-SD-NEXT: csinc x11, x20, xzr, lt1882; CHECK-FP16-SD-NEXT: cmp xzr, x101883; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1884; CHECK-FP16-SD-NEXT: ngcs xzr, x111885; CHECK-FP16-SD-NEXT: csel x10, x10, xzr, lt1886; CHECK-FP16-SD-NEXT: cmp xzr, x91887; CHECK-FP16-SD-NEXT: ngcs xzr, x81888; CHECK-FP16-SD-NEXT: fmov d0, x101889; CHECK-FP16-SD-NEXT: csel x8, x9, xzr, lt1890; CHECK-FP16-SD-NEXT: fmov d1, x81891; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]1892; CHECK-FP16-SD-NEXT: add sp, sp, #481893; CHECK-FP16-SD-NEXT: ret1894;1895; CHECK-CVT-GI-LABEL: ustest_f16i64:1896; CHECK-CVT-GI: // %bb.0: // %entry1897; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q01898; CHECK-CVT-GI-NEXT: mov h1, v0.h[1]1899; CHECK-CVT-GI-NEXT: fcvt s0, h01900; CHECK-CVT-GI-NEXT: fcvt s1, h11901; CHECK-CVT-GI-NEXT: fcvtzs x8, s01902; CHECK-CVT-GI-NEXT: fcvtzs x9, s11903; CHECK-CVT-GI-NEXT: asr x10, x8, #631904; CHECK-CVT-GI-NEXT: cmp x10, #11905; CHECK-CVT-GI-NEXT: asr x11, x9, #631906; CHECK-CVT-GI-NEXT: cset w12, lt1907; CHECK-CVT-GI-NEXT: csel w12, wzr, w12, eq1908; CHECK-CVT-GI-NEXT: cmp x11, #11909; CHECK-CVT-GI-NEXT: cset w13, lt1910; CHECK-CVT-GI-NEXT: csel w13, wzr, w13, eq1911; CHECK-CVT-GI-NEXT: tst w12, #0x11912; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne1913; CHECK-CVT-GI-NEXT: csinc x10, x10, xzr, ne1914; CHECK-CVT-GI-NEXT: tst w13, #0x11915; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne1916; CHECK-CVT-GI-NEXT: csinc x11, x11, xzr, ne1917; CHECK-CVT-GI-NEXT: cmp x8, #01918; CHECK-CVT-GI-NEXT: cset w12, hi1919; CHECK-CVT-GI-NEXT: cmp x10, #01920; CHECK-CVT-GI-NEXT: cset w10, gt1921; CHECK-CVT-GI-NEXT: csel w10, w12, w10, eq1922; CHECK-CVT-GI-NEXT: cmp x9, #01923; CHECK-CVT-GI-NEXT: cset w12, hi1924; CHECK-CVT-GI-NEXT: cmp x11, #01925; CHECK-CVT-GI-NEXT: cset w11, gt1926; CHECK-CVT-GI-NEXT: csel w11, w12, w11, eq1927; CHECK-CVT-GI-NEXT: tst w10, #0x11928; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne1929; CHECK-CVT-GI-NEXT: tst w11, #0x11930; CHECK-CVT-GI-NEXT: fmov d0, x81931; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne1932; CHECK-CVT-GI-NEXT: mov v0.d[1], x91933; CHECK-CVT-GI-NEXT: ret1934;1935; CHECK-FP16-GI-LABEL: ustest_f16i64:1936; CHECK-FP16-GI: // %bb.0: // %entry1937; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q01938; CHECK-FP16-GI-NEXT: mov h1, v0.h[1]1939; CHECK-FP16-GI-NEXT: fcvtzs x8, h01940; CHECK-FP16-GI-NEXT: fcvtzs x9, h11941; CHECK-FP16-GI-NEXT: asr x10, x8, #631942; CHECK-FP16-GI-NEXT: cmp x10, #11943; CHECK-FP16-GI-NEXT: cset w12, lt1944; CHECK-FP16-GI-NEXT: asr x11, x9, #631945; CHECK-FP16-GI-NEXT: csel w12, wzr, w12, eq1946; CHECK-FP16-GI-NEXT: cmp x11, #11947; CHECK-FP16-GI-NEXT: cset w13, lt1948; CHECK-FP16-GI-NEXT: csel w13, wzr, w13, eq1949; CHECK-FP16-GI-NEXT: tst w12, #0x11950; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne1951; CHECK-FP16-GI-NEXT: csinc x10, x10, xzr, ne1952; CHECK-FP16-GI-NEXT: tst w13, #0x11953; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne1954; CHECK-FP16-GI-NEXT: csinc x11, x11, xzr, ne1955; CHECK-FP16-GI-NEXT: cmp x8, #01956; CHECK-FP16-GI-NEXT: cset w12, hi1957; CHECK-FP16-GI-NEXT: cmp x10, #01958; CHECK-FP16-GI-NEXT: cset w10, gt1959; CHECK-FP16-GI-NEXT: csel w10, w12, w10, eq1960; CHECK-FP16-GI-NEXT: cmp x9, #01961; CHECK-FP16-GI-NEXT: cset w12, hi1962; CHECK-FP16-GI-NEXT: cmp x11, #01963; CHECK-FP16-GI-NEXT: cset w11, gt1964; CHECK-FP16-GI-NEXT: csel w11, w12, w11, eq1965; CHECK-FP16-GI-NEXT: tst w10, #0x11966; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne1967; CHECK-FP16-GI-NEXT: tst w11, #0x11968; CHECK-FP16-GI-NEXT: fmov d0, x81969; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne1970; CHECK-FP16-GI-NEXT: mov v0.d[1], x91971; CHECK-FP16-GI-NEXT: ret1972entry:1973 %conv = fptosi <2 x half> %x to <2 x i128>1974 %0 = icmp slt <2 x i128> %conv, <i128 18446744073709551616, i128 18446744073709551616>1975 %spec.store.select = select <2 x i1> %0, <2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>1976 %1 = icmp sgt <2 x i128> %spec.store.select, zeroinitializer1977 %spec.store.select7 = select <2 x i1> %1, <2 x i128> %spec.store.select, <2 x i128> zeroinitializer1978 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>1979 ret <2 x i64> %conv61980}1981 1982 1983 1984; i32 saturate1985 1986define <2 x i32> @stest_f64i32_mm(<2 x double> %x) {1987; CHECK-LABEL: stest_f64i32_mm:1988; CHECK: // %bb.0: // %entry1989; CHECK-NEXT: fcvtzs v0.2d, v0.2d1990; CHECK-NEXT: sqxtn v0.2s, v0.2d1991; CHECK-NEXT: ret1992entry:1993 %conv = fptosi <2 x double> %x to <2 x i64>1994 %spec.store.select = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647>)1995 %spec.store.select7 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %spec.store.select, <2 x i64> <i64 -2147483648, i64 -2147483648>)1996 %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>1997 ret <2 x i32> %conv61998}1999 2000define <2 x i32> @utest_f64i32_mm(<2 x double> %x) {2001; CHECK-CVT-SD-LABEL: utest_f64i32_mm:2002; CHECK-CVT-SD: // %bb.0: // %entry2003; CHECK-CVT-SD-NEXT: mov d1, v0.d[1]2004; CHECK-CVT-SD-NEXT: fcvtzu w8, d02005; CHECK-CVT-SD-NEXT: fcvtzu w9, d12006; CHECK-CVT-SD-NEXT: fmov s0, w82007; CHECK-CVT-SD-NEXT: mov v0.s[1], w92008; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 killed $q02009; CHECK-CVT-SD-NEXT: ret2010;2011; CHECK-FP16-SD-LABEL: utest_f64i32_mm:2012; CHECK-FP16-SD: // %bb.0: // %entry2013; CHECK-FP16-SD-NEXT: mov d1, v0.d[1]2014; CHECK-FP16-SD-NEXT: fcvtzu w8, d02015; CHECK-FP16-SD-NEXT: fcvtzu w9, d12016; CHECK-FP16-SD-NEXT: fmov s0, w82017; CHECK-FP16-SD-NEXT: mov v0.s[1], w92018; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q02019; CHECK-FP16-SD-NEXT: ret2020;2021; CHECK-CVT-GI-LABEL: utest_f64i32_mm:2022; CHECK-CVT-GI: // %bb.0: // %entry2023; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff2024; CHECK-CVT-GI-NEXT: fcvtzu v0.2d, v0.2d2025; CHECK-CVT-GI-NEXT: cmhi v2.2d, v1.2d, v0.2d2026; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v2.16b2027; CHECK-CVT-GI-NEXT: xtn v0.2s, v0.2d2028; CHECK-CVT-GI-NEXT: ret2029;2030; CHECK-FP16-GI-LABEL: utest_f64i32_mm:2031; CHECK-FP16-GI: // %bb.0: // %entry2032; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff2033; CHECK-FP16-GI-NEXT: fcvtzu v0.2d, v0.2d2034; CHECK-FP16-GI-NEXT: cmhi v2.2d, v1.2d, v0.2d2035; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v2.16b2036; CHECK-FP16-GI-NEXT: xtn v0.2s, v0.2d2037; CHECK-FP16-GI-NEXT: ret2038entry:2039 %conv = fptoui <2 x double> %x to <2 x i64>2040 %spec.store.select = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>)2041 %conv6 = trunc <2 x i64> %spec.store.select to <2 x i32>2042 ret <2 x i32> %conv62043}2044 2045define <2 x i32> @ustest_f64i32_mm(<2 x double> %x) {2046; CHECK-LABEL: ustest_f64i32_mm:2047; CHECK: // %bb.0: // %entry2048; CHECK-NEXT: fcvtzs v0.2d, v0.2d2049; CHECK-NEXT: sqxtun v0.2s, v0.2d2050; CHECK-NEXT: ret2051entry:2052 %conv = fptosi <2 x double> %x to <2 x i64>2053 %spec.store.select = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 4294967295, i64 4294967295>)2054 %spec.store.select7 = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %spec.store.select, <2 x i64> zeroinitializer)2055 %conv6 = trunc <2 x i64> %spec.store.select7 to <2 x i32>2056 ret <2 x i32> %conv62057}2058 2059define <4 x i32> @stest_f32i32_mm(<4 x float> %x) {2060; CHECK-CVT-SD-LABEL: stest_f32i32_mm:2061; CHECK-CVT-SD: // %bb.0: // %entry2062; CHECK-CVT-SD-NEXT: fcvtzs v0.4s, v0.4s2063; CHECK-CVT-SD-NEXT: ret2064;2065; CHECK-FP16-SD-LABEL: stest_f32i32_mm:2066; CHECK-FP16-SD: // %bb.0: // %entry2067; CHECK-FP16-SD-NEXT: fcvtzs v0.4s, v0.4s2068; CHECK-FP16-SD-NEXT: ret2069;2070; CHECK-CVT-GI-LABEL: stest_f32i32_mm:2071; CHECK-CVT-GI: // %bb.0: // %entry2072; CHECK-CVT-GI-NEXT: fcvtl v1.2d, v0.2s2073; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s2074; CHECK-CVT-GI-NEXT: adrp x8, .LCPI30_12075; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI30_1]2076; CHECK-CVT-GI-NEXT: adrp x8, .LCPI30_02077; CHECK-CVT-GI-NEXT: fcvtzs v1.2d, v1.2d2078; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d2079; CHECK-CVT-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d2080; CHECK-CVT-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d2081; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b2082; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b2083; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI30_0]2084; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2085; CHECK-CVT-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d2086; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b2087; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b2088; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2089; CHECK-CVT-GI-NEXT: ret2090;2091; CHECK-FP16-GI-LABEL: stest_f32i32_mm:2092; CHECK-FP16-GI: // %bb.0: // %entry2093; CHECK-FP16-GI-NEXT: fcvtl v1.2d, v0.2s2094; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s2095; CHECK-FP16-GI-NEXT: adrp x8, .LCPI30_12096; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI30_1]2097; CHECK-FP16-GI-NEXT: adrp x8, .LCPI30_02098; CHECK-FP16-GI-NEXT: fcvtzs v1.2d, v1.2d2099; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d2100; CHECK-FP16-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d2101; CHECK-FP16-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d2102; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b2103; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b2104; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI30_0]2105; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2106; CHECK-FP16-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d2107; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b2108; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b2109; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2110; CHECK-FP16-GI-NEXT: ret2111entry:2112 %conv = fptosi <4 x float> %x to <4 x i64>2113 %spec.store.select = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %conv, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)2114 %spec.store.select7 = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %spec.store.select, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)2115 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>2116 ret <4 x i32> %conv62117}2118 2119define <4 x i32> @utest_f32i32_mm(<4 x float> %x) {2120; CHECK-CVT-SD-LABEL: utest_f32i32_mm:2121; CHECK-CVT-SD: // %bb.0: // %entry2122; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s2123; CHECK-CVT-SD-NEXT: ret2124;2125; CHECK-FP16-SD-LABEL: utest_f32i32_mm:2126; CHECK-FP16-SD: // %bb.0: // %entry2127; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s2128; CHECK-FP16-SD-NEXT: ret2129;2130; CHECK-CVT-GI-LABEL: utest_f32i32_mm:2131; CHECK-CVT-GI: // %bb.0: // %entry2132; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s2133; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s2134; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff2135; CHECK-CVT-GI-NEXT: fcvtzu v2.2d, v2.2d2136; CHECK-CVT-GI-NEXT: fcvtzu v0.2d, v0.2d2137; CHECK-CVT-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d2138; CHECK-CVT-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d2139; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b2140; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b2141; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s2142; CHECK-CVT-GI-NEXT: ret2143;2144; CHECK-FP16-GI-LABEL: utest_f32i32_mm:2145; CHECK-FP16-GI: // %bb.0: // %entry2146; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s2147; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s2148; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff2149; CHECK-FP16-GI-NEXT: fcvtzu v2.2d, v2.2d2150; CHECK-FP16-GI-NEXT: fcvtzu v0.2d, v0.2d2151; CHECK-FP16-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d2152; CHECK-FP16-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d2153; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b2154; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b2155; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s2156; CHECK-FP16-GI-NEXT: ret2157entry:2158 %conv = fptoui <4 x float> %x to <4 x i64>2159 %spec.store.select = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)2160 %conv6 = trunc <4 x i64> %spec.store.select to <4 x i32>2161 ret <4 x i32> %conv62162}2163 2164define <4 x i32> @ustest_f32i32_mm(<4 x float> %x) {2165; CHECK-CVT-SD-LABEL: ustest_f32i32_mm:2166; CHECK-CVT-SD: // %bb.0: // %entry2167; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s2168; CHECK-CVT-SD-NEXT: ret2169;2170; CHECK-FP16-SD-LABEL: ustest_f32i32_mm:2171; CHECK-FP16-SD: // %bb.0: // %entry2172; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s2173; CHECK-FP16-SD-NEXT: ret2174;2175; CHECK-CVT-GI-LABEL: ustest_f32i32_mm:2176; CHECK-CVT-GI: // %bb.0: // %entry2177; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s2178; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s2179; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff2180; CHECK-CVT-GI-NEXT: fcvtzs v2.2d, v2.2d2181; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d2182; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2183; CHECK-CVT-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d2184; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b2185; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b2186; CHECK-CVT-GI-NEXT: cmgt v1.2d, v2.2d, #02187; CHECK-CVT-GI-NEXT: cmgt v3.2d, v0.2d, #02188; CHECK-CVT-GI-NEXT: and v1.16b, v2.16b, v1.16b2189; CHECK-CVT-GI-NEXT: and v0.16b, v0.16b, v3.16b2190; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2191; CHECK-CVT-GI-NEXT: ret2192;2193; CHECK-FP16-GI-LABEL: ustest_f32i32_mm:2194; CHECK-FP16-GI: // %bb.0: // %entry2195; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s2196; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s2197; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff2198; CHECK-FP16-GI-NEXT: fcvtzs v2.2d, v2.2d2199; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d2200; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2201; CHECK-FP16-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d2202; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b2203; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b2204; CHECK-FP16-GI-NEXT: cmgt v1.2d, v2.2d, #02205; CHECK-FP16-GI-NEXT: cmgt v3.2d, v0.2d, #02206; CHECK-FP16-GI-NEXT: and v1.16b, v2.16b, v1.16b2207; CHECK-FP16-GI-NEXT: and v0.16b, v0.16b, v3.16b2208; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2209; CHECK-FP16-GI-NEXT: ret2210entry:2211 %conv = fptosi <4 x float> %x to <4 x i64>2212 %spec.store.select = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)2213 %spec.store.select7 = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %spec.store.select, <4 x i64> zeroinitializer)2214 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>2215 ret <4 x i32> %conv62216}2217 2218define <4 x i32> @stest_f16i32_mm(<4 x half> %x) {2219; CHECK-CVT-SD-LABEL: stest_f16i32_mm:2220; CHECK-CVT-SD: // %bb.0: // %entry2221; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h2222; CHECK-CVT-SD-NEXT: fcvtzs v0.4s, v0.4s2223; CHECK-CVT-SD-NEXT: ret2224;2225; CHECK-FP16-SD-LABEL: stest_f16i32_mm:2226; CHECK-FP16-SD: // %bb.0: // %entry2227; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h2228; CHECK-FP16-SD-NEXT: fcvtzs v0.4s, v0.4s2229; CHECK-FP16-SD-NEXT: ret2230;2231; CHECK-CVT-GI-LABEL: stest_f16i32_mm:2232; CHECK-CVT-GI: // %bb.0: // %entry2233; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h2234; CHECK-CVT-GI-NEXT: adrp x8, .LCPI33_12235; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI33_1]2236; CHECK-CVT-GI-NEXT: adrp x8, .LCPI33_02237; CHECK-CVT-GI-NEXT: fcvtl v1.2d, v0.2s2238; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s2239; CHECK-CVT-GI-NEXT: fcvtzs v1.2d, v1.2d2240; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d2241; CHECK-CVT-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d2242; CHECK-CVT-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d2243; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b2244; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b2245; CHECK-CVT-GI-NEXT: ldr q2, [x8, :lo12:.LCPI33_0]2246; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2247; CHECK-CVT-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d2248; CHECK-CVT-GI-NEXT: bif v1.16b, v2.16b, v3.16b2249; CHECK-CVT-GI-NEXT: bif v0.16b, v2.16b, v4.16b2250; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2251; CHECK-CVT-GI-NEXT: ret2252;2253; CHECK-FP16-GI-LABEL: stest_f16i32_mm:2254; CHECK-FP16-GI: // %bb.0: // %entry2255; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h2256; CHECK-FP16-GI-NEXT: adrp x8, .LCPI33_12257; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI33_1]2258; CHECK-FP16-GI-NEXT: adrp x8, .LCPI33_02259; CHECK-FP16-GI-NEXT: fcvtl v1.2d, v0.2s2260; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s2261; CHECK-FP16-GI-NEXT: fcvtzs v1.2d, v1.2d2262; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d2263; CHECK-FP16-GI-NEXT: cmgt v3.2d, v2.2d, v1.2d2264; CHECK-FP16-GI-NEXT: cmgt v4.2d, v2.2d, v0.2d2265; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b2266; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b2267; CHECK-FP16-GI-NEXT: ldr q2, [x8, :lo12:.LCPI33_0]2268; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2269; CHECK-FP16-GI-NEXT: cmgt v4.2d, v0.2d, v2.2d2270; CHECK-FP16-GI-NEXT: bif v1.16b, v2.16b, v3.16b2271; CHECK-FP16-GI-NEXT: bif v0.16b, v2.16b, v4.16b2272; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2273; CHECK-FP16-GI-NEXT: ret2274entry:2275 %conv = fptosi <4 x half> %x to <4 x i64>2276 %spec.store.select = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %conv, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)2277 %spec.store.select7 = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %spec.store.select, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)2278 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>2279 ret <4 x i32> %conv62280}2281 2282define <4 x i32> @utest_f16i32_mm(<4 x half> %x) {2283; CHECK-CVT-SD-LABEL: utest_f16i32_mm:2284; CHECK-CVT-SD: // %bb.0: // %entry2285; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h2286; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s2287; CHECK-CVT-SD-NEXT: ret2288;2289; CHECK-FP16-SD-LABEL: utest_f16i32_mm:2290; CHECK-FP16-SD: // %bb.0: // %entry2291; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h2292; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s2293; CHECK-FP16-SD-NEXT: ret2294;2295; CHECK-CVT-GI-LABEL: utest_f16i32_mm:2296; CHECK-CVT-GI: // %bb.0: // %entry2297; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h2298; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff2299; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s2300; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s2301; CHECK-CVT-GI-NEXT: fcvtzu v2.2d, v2.2d2302; CHECK-CVT-GI-NEXT: fcvtzu v0.2d, v0.2d2303; CHECK-CVT-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d2304; CHECK-CVT-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d2305; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b2306; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b2307; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s2308; CHECK-CVT-GI-NEXT: ret2309;2310; CHECK-FP16-GI-LABEL: utest_f16i32_mm:2311; CHECK-FP16-GI: // %bb.0: // %entry2312; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h2313; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff2314; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s2315; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s2316; CHECK-FP16-GI-NEXT: fcvtzu v2.2d, v2.2d2317; CHECK-FP16-GI-NEXT: fcvtzu v0.2d, v0.2d2318; CHECK-FP16-GI-NEXT: cmhi v3.2d, v1.2d, v2.2d2319; CHECK-FP16-GI-NEXT: cmhi v4.2d, v1.2d, v0.2d2320; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b2321; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b2322; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v2.4s, v0.4s2323; CHECK-FP16-GI-NEXT: ret2324entry:2325 %conv = fptoui <4 x half> %x to <4 x i64>2326 %spec.store.select = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)2327 %conv6 = trunc <4 x i64> %spec.store.select to <4 x i32>2328 ret <4 x i32> %conv62329}2330 2331define <4 x i32> @ustest_f16i32_mm(<4 x half> %x) {2332; CHECK-CVT-SD-LABEL: ustest_f16i32_mm:2333; CHECK-CVT-SD: // %bb.0: // %entry2334; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h2335; CHECK-CVT-SD-NEXT: fcvtzu v0.4s, v0.4s2336; CHECK-CVT-SD-NEXT: ret2337;2338; CHECK-FP16-SD-LABEL: ustest_f16i32_mm:2339; CHECK-FP16-SD: // %bb.0: // %entry2340; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h2341; CHECK-FP16-SD-NEXT: fcvtzu v0.4s, v0.4s2342; CHECK-FP16-SD-NEXT: ret2343;2344; CHECK-CVT-GI-LABEL: ustest_f16i32_mm:2345; CHECK-CVT-GI: // %bb.0: // %entry2346; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h2347; CHECK-CVT-GI-NEXT: movi v1.2d, #0x000000ffffffff2348; CHECK-CVT-GI-NEXT: fcvtl v2.2d, v0.2s2349; CHECK-CVT-GI-NEXT: fcvtl2 v0.2d, v0.4s2350; CHECK-CVT-GI-NEXT: fcvtzs v2.2d, v2.2d2351; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d2352; CHECK-CVT-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2353; CHECK-CVT-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d2354; CHECK-CVT-GI-NEXT: bif v2.16b, v1.16b, v3.16b2355; CHECK-CVT-GI-NEXT: bif v0.16b, v1.16b, v4.16b2356; CHECK-CVT-GI-NEXT: cmgt v1.2d, v2.2d, #02357; CHECK-CVT-GI-NEXT: cmgt v3.2d, v0.2d, #02358; CHECK-CVT-GI-NEXT: and v1.16b, v2.16b, v1.16b2359; CHECK-CVT-GI-NEXT: and v0.16b, v0.16b, v3.16b2360; CHECK-CVT-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2361; CHECK-CVT-GI-NEXT: ret2362;2363; CHECK-FP16-GI-LABEL: ustest_f16i32_mm:2364; CHECK-FP16-GI: // %bb.0: // %entry2365; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h2366; CHECK-FP16-GI-NEXT: movi v1.2d, #0x000000ffffffff2367; CHECK-FP16-GI-NEXT: fcvtl v2.2d, v0.2s2368; CHECK-FP16-GI-NEXT: fcvtl2 v0.2d, v0.4s2369; CHECK-FP16-GI-NEXT: fcvtzs v2.2d, v2.2d2370; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d2371; CHECK-FP16-GI-NEXT: cmgt v3.2d, v1.2d, v2.2d2372; CHECK-FP16-GI-NEXT: cmgt v4.2d, v1.2d, v0.2d2373; CHECK-FP16-GI-NEXT: bif v2.16b, v1.16b, v3.16b2374; CHECK-FP16-GI-NEXT: bif v0.16b, v1.16b, v4.16b2375; CHECK-FP16-GI-NEXT: cmgt v1.2d, v2.2d, #02376; CHECK-FP16-GI-NEXT: cmgt v3.2d, v0.2d, #02377; CHECK-FP16-GI-NEXT: and v1.16b, v2.16b, v1.16b2378; CHECK-FP16-GI-NEXT: and v0.16b, v0.16b, v3.16b2379; CHECK-FP16-GI-NEXT: uzp1 v0.4s, v1.4s, v0.4s2380; CHECK-FP16-GI-NEXT: ret2381entry:2382 %conv = fptosi <4 x half> %x to <4 x i64>2383 %spec.store.select = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %conv, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)2384 %spec.store.select7 = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %spec.store.select, <4 x i64> zeroinitializer)2385 %conv6 = trunc <4 x i64> %spec.store.select7 to <4 x i32>2386 ret <4 x i32> %conv62387}2388 2389; i16 saturate2390 2391define <2 x i16> @stest_f64i16_mm(<2 x double> %x) {2392; CHECK-CVT-SD-LABEL: stest_f64i16_mm:2393; CHECK-CVT-SD: // %bb.0: // %entry2394; CHECK-CVT-SD-NEXT: fcvtzs v0.2d, v0.2d2395; CHECK-CVT-SD-NEXT: movi v1.2s, #127, msl #82396; CHECK-CVT-SD-NEXT: xtn v0.2s, v0.2d2397; CHECK-CVT-SD-NEXT: smin v0.2s, v0.2s, v1.2s2398; CHECK-CVT-SD-NEXT: mvni v1.2s, #127, msl #82399; CHECK-CVT-SD-NEXT: smax v0.2s, v0.2s, v1.2s2400; CHECK-CVT-SD-NEXT: ret2401;2402; CHECK-FP16-SD-LABEL: stest_f64i16_mm:2403; CHECK-FP16-SD: // %bb.0: // %entry2404; CHECK-FP16-SD-NEXT: fcvtzs v0.2d, v0.2d2405; CHECK-FP16-SD-NEXT: movi v1.2s, #127, msl #82406; CHECK-FP16-SD-NEXT: xtn v0.2s, v0.2d2407; CHECK-FP16-SD-NEXT: smin v0.2s, v0.2s, v1.2s2408; CHECK-FP16-SD-NEXT: mvni v1.2s, #127, msl #82409; CHECK-FP16-SD-NEXT: smax v0.2s, v0.2s, v1.2s2410; CHECK-FP16-SD-NEXT: ret2411;2412; CHECK-CVT-GI-LABEL: stest_f64i16_mm:2413; CHECK-CVT-GI: // %bb.0: // %entry2414; CHECK-CVT-GI-NEXT: fcvtzs v0.2d, v0.2d2415; CHECK-CVT-GI-NEXT: movi v1.2s, #127, msl #82416; CHECK-CVT-GI-NEXT: mvni v2.2s, #127, msl #82417; CHECK-CVT-GI-NEXT: xtn v0.2s, v0.2d2418; CHECK-CVT-GI-NEXT: smin v0.2s, v0.2s, v1.2s2419; CHECK-CVT-GI-NEXT: smax v0.2s, v0.2s, v2.2s2420; CHECK-CVT-GI-NEXT: ret2421;2422; CHECK-FP16-GI-LABEL: stest_f64i16_mm:2423; CHECK-FP16-GI: // %bb.0: // %entry2424; CHECK-FP16-GI-NEXT: fcvtzs v0.2d, v0.2d2425; CHECK-FP16-GI-NEXT: movi v1.2s, #127, msl #82426; CHECK-FP16-GI-NEXT: mvni v2.2s, #127, msl #82427; CHECK-FP16-GI-NEXT: xtn v0.2s, v0.2d2428; CHECK-FP16-GI-NEXT: smin v0.2s, v0.2s, v1.2s2429; CHECK-FP16-GI-NEXT: smax v0.2s, v0.2s, v2.2s2430; CHECK-FP16-GI-NEXT: ret2431entry:2432 %conv = fptosi <2 x double> %x to <2 x i32>2433 %spec.store.select = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %conv, <2 x i32> <i32 32767, i32 32767>)2434 %spec.store.select7 = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %spec.store.select, <2 x i32> <i32 -32768, i32 -32768>)2435 %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>2436 ret <2 x i16> %conv62437}2438 2439define <2 x i16> @utest_f64i16_mm(<2 x double> %x) {2440; CHECK-LABEL: utest_f64i16_mm:2441; CHECK: // %bb.0: // %entry2442; CHECK-NEXT: fcvtzu v0.2d, v0.2d2443; CHECK-NEXT: movi d1, #0x00ffff0000ffff2444; CHECK-NEXT: xtn v0.2s, v0.2d2445; CHECK-NEXT: umin v0.2s, v0.2s, v1.2s2446; CHECK-NEXT: ret2447entry:2448 %conv = fptoui <2 x double> %x to <2 x i32>2449 %spec.store.select = call <2 x i32> @llvm.umin.v2i32(<2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>)2450 %conv6 = trunc <2 x i32> %spec.store.select to <2 x i16>2451 ret <2 x i16> %conv62452}2453 2454define <2 x i16> @ustest_f64i16_mm(<2 x double> %x) {2455; CHECK-LABEL: ustest_f64i16_mm:2456; CHECK: // %bb.0: // %entry2457; CHECK-NEXT: fcvtzs v0.2d, v0.2d2458; CHECK-NEXT: movi d1, #0x00ffff0000ffff2459; CHECK-NEXT: movi v2.2d, #00000000000000002460; CHECK-NEXT: xtn v0.2s, v0.2d2461; CHECK-NEXT: smin v0.2s, v0.2s, v1.2s2462; CHECK-NEXT: smax v0.2s, v0.2s, v2.2s2463; CHECK-NEXT: ret2464entry:2465 %conv = fptosi <2 x double> %x to <2 x i32>2466 %spec.store.select = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %conv, <2 x i32> <i32 65535, i32 65535>)2467 %spec.store.select7 = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %spec.store.select, <2 x i32> zeroinitializer)2468 %conv6 = trunc <2 x i32> %spec.store.select7 to <2 x i16>2469 ret <2 x i16> %conv62470}2471 2472define <4 x i16> @stest_f32i16_mm(<4 x float> %x) {2473; CHECK-LABEL: stest_f32i16_mm:2474; CHECK: // %bb.0: // %entry2475; CHECK-NEXT: fcvtzs v0.4s, v0.4s2476; CHECK-NEXT: sqxtn v0.4h, v0.4s2477; CHECK-NEXT: ret2478entry:2479 %conv = fptosi <4 x float> %x to <4 x i32>2480 %spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)2481 %spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>)2482 %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>2483 ret <4 x i16> %conv62484}2485 2486define <4 x i16> @utest_f32i16_mm(<4 x float> %x) {2487; CHECK-LABEL: utest_f32i16_mm:2488; CHECK: // %bb.0: // %entry2489; CHECK-NEXT: fcvtzu v0.4s, v0.4s2490; CHECK-NEXT: uqxtn v0.4h, v0.4s2491; CHECK-NEXT: ret2492entry:2493 %conv = fptoui <4 x float> %x to <4 x i32>2494 %spec.store.select = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)2495 %conv6 = trunc <4 x i32> %spec.store.select to <4 x i16>2496 ret <4 x i16> %conv62497}2498 2499define <4 x i16> @ustest_f32i16_mm(<4 x float> %x) {2500; CHECK-LABEL: ustest_f32i16_mm:2501; CHECK: // %bb.0: // %entry2502; CHECK-NEXT: fcvtzs v0.4s, v0.4s2503; CHECK-NEXT: sqxtun v0.4h, v0.4s2504; CHECK-NEXT: ret2505entry:2506 %conv = fptosi <4 x float> %x to <4 x i32>2507 %spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)2508 %spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> zeroinitializer)2509 %conv6 = trunc <4 x i32> %spec.store.select7 to <4 x i16>2510 ret <4 x i16> %conv62511}2512 2513define <8 x i16> @stest_f16i16_mm(<8 x half> %x) {2514; CHECK-CVT-LABEL: stest_f16i16_mm:2515; CHECK-CVT: // %bb.0: // %entry2516; CHECK-CVT-NEXT: fcvtl v1.4s, v0.4h2517; CHECK-CVT-NEXT: fcvtl2 v0.4s, v0.8h2518; CHECK-CVT-NEXT: fcvtzs v1.4s, v1.4s2519; CHECK-CVT-NEXT: fcvtzs v2.4s, v0.4s2520; CHECK-CVT-NEXT: sqxtn v0.4h, v1.4s2521; CHECK-CVT-NEXT: sqxtn2 v0.8h, v2.4s2522; CHECK-CVT-NEXT: ret2523;2524; CHECK-FP16-SD-LABEL: stest_f16i16_mm:2525; CHECK-FP16-SD: // %bb.0: // %entry2526; CHECK-FP16-SD-NEXT: fcvtzs v0.8h, v0.8h2527; CHECK-FP16-SD-NEXT: ret2528;2529; CHECK-FP16-GI-LABEL: stest_f16i16_mm:2530; CHECK-FP16-GI: // %bb.0: // %entry2531; CHECK-FP16-GI-NEXT: fcvtl v1.4s, v0.4h2532; CHECK-FP16-GI-NEXT: fcvtl2 v0.4s, v0.8h2533; CHECK-FP16-GI-NEXT: fcvtzs v1.4s, v1.4s2534; CHECK-FP16-GI-NEXT: fcvtzs v2.4s, v0.4s2535; CHECK-FP16-GI-NEXT: sqxtn v0.4h, v1.4s2536; CHECK-FP16-GI-NEXT: sqxtn2 v0.8h, v2.4s2537; CHECK-FP16-GI-NEXT: ret2538entry:2539 %conv = fptosi <8 x half> %x to <8 x i32>2540 %spec.store.select = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %conv, <8 x i32> <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>)2541 %spec.store.select7 = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %spec.store.select, <8 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>)2542 %conv6 = trunc <8 x i32> %spec.store.select7 to <8 x i16>2543 ret <8 x i16> %conv62544}2545 2546define <8 x i16> @utest_f16i16_mm(<8 x half> %x) {2547; CHECK-CVT-LABEL: utest_f16i16_mm:2548; CHECK-CVT: // %bb.0: // %entry2549; CHECK-CVT-NEXT: fcvtl v1.4s, v0.4h2550; CHECK-CVT-NEXT: fcvtl2 v0.4s, v0.8h2551; CHECK-CVT-NEXT: fcvtzu v1.4s, v1.4s2552; CHECK-CVT-NEXT: fcvtzu v2.4s, v0.4s2553; CHECK-CVT-NEXT: uqxtn v0.4h, v1.4s2554; CHECK-CVT-NEXT: uqxtn2 v0.8h, v2.4s2555; CHECK-CVT-NEXT: ret2556;2557; CHECK-FP16-SD-LABEL: utest_f16i16_mm:2558; CHECK-FP16-SD: // %bb.0: // %entry2559; CHECK-FP16-SD-NEXT: fcvtzu v0.8h, v0.8h2560; CHECK-FP16-SD-NEXT: ret2561;2562; CHECK-FP16-GI-LABEL: utest_f16i16_mm:2563; CHECK-FP16-GI: // %bb.0: // %entry2564; CHECK-FP16-GI-NEXT: fcvtl v1.4s, v0.4h2565; CHECK-FP16-GI-NEXT: fcvtl2 v0.4s, v0.8h2566; CHECK-FP16-GI-NEXT: fcvtzu v1.4s, v1.4s2567; CHECK-FP16-GI-NEXT: fcvtzu v2.4s, v0.4s2568; CHECK-FP16-GI-NEXT: uqxtn v0.4h, v1.4s2569; CHECK-FP16-GI-NEXT: uqxtn2 v0.8h, v2.4s2570; CHECK-FP16-GI-NEXT: ret2571entry:2572 %conv = fptoui <8 x half> %x to <8 x i32>2573 %spec.store.select = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %conv, <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>)2574 %conv6 = trunc <8 x i32> %spec.store.select to <8 x i16>2575 ret <8 x i16> %conv62576}2577 2578define <8 x i16> @ustest_f16i16_mm(<8 x half> %x) {2579; CHECK-CVT-LABEL: ustest_f16i16_mm:2580; CHECK-CVT: // %bb.0: // %entry2581; CHECK-CVT-NEXT: fcvtl v1.4s, v0.4h2582; CHECK-CVT-NEXT: fcvtl2 v0.4s, v0.8h2583; CHECK-CVT-NEXT: fcvtzs v1.4s, v1.4s2584; CHECK-CVT-NEXT: fcvtzs v2.4s, v0.4s2585; CHECK-CVT-NEXT: sqxtun v0.4h, v1.4s2586; CHECK-CVT-NEXT: sqxtun2 v0.8h, v2.4s2587; CHECK-CVT-NEXT: ret2588;2589; CHECK-FP16-SD-LABEL: ustest_f16i16_mm:2590; CHECK-FP16-SD: // %bb.0: // %entry2591; CHECK-FP16-SD-NEXT: fcvtzu v0.8h, v0.8h2592; CHECK-FP16-SD-NEXT: ret2593;2594; CHECK-FP16-GI-LABEL: ustest_f16i16_mm:2595; CHECK-FP16-GI: // %bb.0: // %entry2596; CHECK-FP16-GI-NEXT: fcvtl v1.4s, v0.4h2597; CHECK-FP16-GI-NEXT: fcvtl2 v0.4s, v0.8h2598; CHECK-FP16-GI-NEXT: fcvtzs v1.4s, v1.4s2599; CHECK-FP16-GI-NEXT: fcvtzs v2.4s, v0.4s2600; CHECK-FP16-GI-NEXT: sqxtun v0.4h, v1.4s2601; CHECK-FP16-GI-NEXT: sqxtun2 v0.8h, v2.4s2602; CHECK-FP16-GI-NEXT: ret2603entry:2604 %conv = fptosi <8 x half> %x to <8 x i32>2605 %spec.store.select = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %conv, <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>)2606 %spec.store.select7 = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %spec.store.select, <8 x i32> zeroinitializer)2607 %conv6 = trunc <8 x i32> %spec.store.select7 to <8 x i16>2608 ret <8 x i16> %conv62609}2610 2611; i64 saturate2612 2613define <2 x i64> @stest_f64i64_mm(<2 x double> %x) {2614; CHECK-CVT-SD-LABEL: stest_f64i64_mm:2615; CHECK-CVT-SD: // %bb.0: // %entry2616; CHECK-CVT-SD-NEXT: fcvtzs v0.2d, v0.2d2617; CHECK-CVT-SD-NEXT: ret2618;2619; CHECK-FP16-SD-LABEL: stest_f64i64_mm:2620; CHECK-FP16-SD: // %bb.0: // %entry2621; CHECK-FP16-SD-NEXT: fcvtzs v0.2d, v0.2d2622; CHECK-FP16-SD-NEXT: ret2623;2624; CHECK-CVT-GI-LABEL: stest_f64i64_mm:2625; CHECK-CVT-GI: // %bb.0: // %entry2626; CHECK-CVT-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill2627; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill2628; CHECK-CVT-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill2629; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill2630; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 482631; CHECK-CVT-GI-NEXT: .cfi_offset w19, -82632; CHECK-CVT-GI-NEXT: .cfi_offset w20, -162633; CHECK-CVT-GI-NEXT: .cfi_offset w21, -242634; CHECK-CVT-GI-NEXT: .cfi_offset w22, -322635; CHECK-CVT-GI-NEXT: .cfi_offset w30, -402636; CHECK-CVT-GI-NEXT: .cfi_offset b8, -482637; CHECK-CVT-GI-NEXT: mov d8, v0.d[1]2638; CHECK-CVT-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff2639; CHECK-CVT-GI-NEXT: mov x22, #-9223372036854775808 // =0x80000000000000002640; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 killed $q02641; CHECK-CVT-GI-NEXT: bl __fixdfti2642; CHECK-CVT-GI-NEXT: fmov d0, d82643; CHECK-CVT-GI-NEXT: mov x19, x02644; CHECK-CVT-GI-NEXT: mov x20, x12645; CHECK-CVT-GI-NEXT: bl __fixdfti2646; CHECK-CVT-GI-NEXT: cmp x19, x212647; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload2648; CHECK-CVT-GI-NEXT: cset w8, lo2649; CHECK-CVT-GI-NEXT: cmp x20, #02650; CHECK-CVT-GI-NEXT: cset w9, mi2651; CHECK-CVT-GI-NEXT: csel w8, w8, w9, eq2652; CHECK-CVT-GI-NEXT: cmp x0, x212653; CHECK-CVT-GI-NEXT: cset w9, lo2654; CHECK-CVT-GI-NEXT: cmp x1, #02655; CHECK-CVT-GI-NEXT: cset w10, mi2656; CHECK-CVT-GI-NEXT: csel w9, w9, w10, eq2657; CHECK-CVT-GI-NEXT: tst w8, #0x12658; CHECK-CVT-GI-NEXT: csel x8, x19, x21, ne2659; CHECK-CVT-GI-NEXT: csel x10, x20, xzr, ne2660; CHECK-CVT-GI-NEXT: tst w9, #0x12661; CHECK-CVT-GI-NEXT: csel x9, x0, x21, ne2662; CHECK-CVT-GI-NEXT: csel x11, x1, xzr, ne2663; CHECK-CVT-GI-NEXT: cmp x8, x222664; CHECK-CVT-GI-NEXT: cset w12, hi2665; CHECK-CVT-GI-NEXT: cmp x10, #02666; CHECK-CVT-GI-NEXT: cset w13, pl2667; CHECK-CVT-GI-NEXT: cmn x10, #12668; CHECK-CVT-GI-NEXT: csel w10, w12, w13, eq2669; CHECK-CVT-GI-NEXT: cmp x9, x222670; CHECK-CVT-GI-NEXT: cset w12, hi2671; CHECK-CVT-GI-NEXT: cmp x11, #02672; CHECK-CVT-GI-NEXT: cset w13, pl2673; CHECK-CVT-GI-NEXT: cmn x11, #12674; CHECK-CVT-GI-NEXT: csel w11, w12, w13, eq2675; CHECK-CVT-GI-NEXT: tst w10, #0x12676; CHECK-CVT-GI-NEXT: csel x8, x8, x22, ne2677; CHECK-CVT-GI-NEXT: tst w11, #0x12678; CHECK-CVT-GI-NEXT: fmov d0, x82679; CHECK-CVT-GI-NEXT: csel x9, x9, x22, ne2680; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload2681; CHECK-CVT-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload2682; CHECK-CVT-GI-NEXT: mov v0.d[1], x92683; CHECK-CVT-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload2684; CHECK-CVT-GI-NEXT: ret2685;2686; CHECK-FP16-GI-LABEL: stest_f64i64_mm:2687; CHECK-FP16-GI: // %bb.0: // %entry2688; CHECK-FP16-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill2689; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill2690; CHECK-FP16-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill2691; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill2692; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 482693; CHECK-FP16-GI-NEXT: .cfi_offset w19, -82694; CHECK-FP16-GI-NEXT: .cfi_offset w20, -162695; CHECK-FP16-GI-NEXT: .cfi_offset w21, -242696; CHECK-FP16-GI-NEXT: .cfi_offset w22, -322697; CHECK-FP16-GI-NEXT: .cfi_offset w30, -402698; CHECK-FP16-GI-NEXT: .cfi_offset b8, -482699; CHECK-FP16-GI-NEXT: mov d8, v0.d[1]2700; CHECK-FP16-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff2701; CHECK-FP16-GI-NEXT: mov x22, #-9223372036854775808 // =0x80000000000000002702; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q02703; CHECK-FP16-GI-NEXT: bl __fixdfti2704; CHECK-FP16-GI-NEXT: fmov d0, d82705; CHECK-FP16-GI-NEXT: mov x19, x02706; CHECK-FP16-GI-NEXT: mov x20, x12707; CHECK-FP16-GI-NEXT: bl __fixdfti2708; CHECK-FP16-GI-NEXT: cmp x19, x212709; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload2710; CHECK-FP16-GI-NEXT: cset w8, lo2711; CHECK-FP16-GI-NEXT: cmp x20, #02712; CHECK-FP16-GI-NEXT: cset w9, mi2713; CHECK-FP16-GI-NEXT: csel w8, w8, w9, eq2714; CHECK-FP16-GI-NEXT: cmp x0, x212715; CHECK-FP16-GI-NEXT: cset w9, lo2716; CHECK-FP16-GI-NEXT: cmp x1, #02717; CHECK-FP16-GI-NEXT: cset w10, mi2718; CHECK-FP16-GI-NEXT: csel w9, w9, w10, eq2719; CHECK-FP16-GI-NEXT: tst w8, #0x12720; CHECK-FP16-GI-NEXT: csel x8, x19, x21, ne2721; CHECK-FP16-GI-NEXT: csel x10, x20, xzr, ne2722; CHECK-FP16-GI-NEXT: tst w9, #0x12723; CHECK-FP16-GI-NEXT: csel x9, x0, x21, ne2724; CHECK-FP16-GI-NEXT: csel x11, x1, xzr, ne2725; CHECK-FP16-GI-NEXT: cmp x8, x222726; CHECK-FP16-GI-NEXT: cset w12, hi2727; CHECK-FP16-GI-NEXT: cmp x10, #02728; CHECK-FP16-GI-NEXT: cset w13, pl2729; CHECK-FP16-GI-NEXT: cmn x10, #12730; CHECK-FP16-GI-NEXT: csel w10, w12, w13, eq2731; CHECK-FP16-GI-NEXT: cmp x9, x222732; CHECK-FP16-GI-NEXT: cset w12, hi2733; CHECK-FP16-GI-NEXT: cmp x11, #02734; CHECK-FP16-GI-NEXT: cset w13, pl2735; CHECK-FP16-GI-NEXT: cmn x11, #12736; CHECK-FP16-GI-NEXT: csel w11, w12, w13, eq2737; CHECK-FP16-GI-NEXT: tst w10, #0x12738; CHECK-FP16-GI-NEXT: csel x8, x8, x22, ne2739; CHECK-FP16-GI-NEXT: tst w11, #0x12740; CHECK-FP16-GI-NEXT: fmov d0, x82741; CHECK-FP16-GI-NEXT: csel x9, x9, x22, ne2742; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload2743; CHECK-FP16-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload2744; CHECK-FP16-GI-NEXT: mov v0.d[1], x92745; CHECK-FP16-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload2746; CHECK-FP16-GI-NEXT: ret2747entry:2748 %conv = fptosi <2 x double> %x to <2 x i128>2749 %spec.store.select = call <2 x i128> @llvm.smin.v2i128(<2 x i128> %conv, <2 x i128> <i128 9223372036854775807, i128 9223372036854775807>)2750 %spec.store.select7 = call <2 x i128> @llvm.smax.v2i128(<2 x i128> %spec.store.select, <2 x i128> <i128 -9223372036854775808, i128 -9223372036854775808>)2751 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>2752 ret <2 x i64> %conv62753}2754 2755define <2 x i64> @utest_f64i64_mm(<2 x double> %x) {2756; CHECK-CVT-SD-LABEL: utest_f64i64_mm:2757; CHECK-CVT-SD: // %bb.0: // %entry2758; CHECK-CVT-SD-NEXT: sub sp, sp, #482759; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill2760; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill2761; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 482762; CHECK-CVT-SD-NEXT: .cfi_offset w19, -82763; CHECK-CVT-SD-NEXT: .cfi_offset w20, -162764; CHECK-CVT-SD-NEXT: .cfi_offset w30, -322765; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill2766; CHECK-CVT-SD-NEXT: mov d0, v0.d[1]2767; CHECK-CVT-SD-NEXT: bl __fixunsdfti2768; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload2769; CHECK-CVT-SD-NEXT: mov x19, x02770; CHECK-CVT-SD-NEXT: mov x20, x12771; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 killed $q02772; CHECK-CVT-SD-NEXT: bl __fixunsdfti2773; CHECK-CVT-SD-NEXT: cmp x1, #02774; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload2775; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, eq2776; CHECK-CVT-SD-NEXT: cmp x20, #02777; CHECK-CVT-SD-NEXT: csel x9, x19, xzr, eq2778; CHECK-CVT-SD-NEXT: fmov d0, x82779; CHECK-CVT-SD-NEXT: fmov d1, x92780; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload2781; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]2782; CHECK-CVT-SD-NEXT: add sp, sp, #482783; CHECK-CVT-SD-NEXT: ret2784;2785; CHECK-FP16-SD-LABEL: utest_f64i64_mm:2786; CHECK-FP16-SD: // %bb.0: // %entry2787; CHECK-FP16-SD-NEXT: sub sp, sp, #482788; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill2789; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill2790; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 482791; CHECK-FP16-SD-NEXT: .cfi_offset w19, -82792; CHECK-FP16-SD-NEXT: .cfi_offset w20, -162793; CHECK-FP16-SD-NEXT: .cfi_offset w30, -322794; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill2795; CHECK-FP16-SD-NEXT: mov d0, v0.d[1]2796; CHECK-FP16-SD-NEXT: bl __fixunsdfti2797; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload2798; CHECK-FP16-SD-NEXT: mov x19, x02799; CHECK-FP16-SD-NEXT: mov x20, x12800; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q02801; CHECK-FP16-SD-NEXT: bl __fixunsdfti2802; CHECK-FP16-SD-NEXT: cmp x1, #02803; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload2804; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, eq2805; CHECK-FP16-SD-NEXT: cmp x20, #02806; CHECK-FP16-SD-NEXT: csel x9, x19, xzr, eq2807; CHECK-FP16-SD-NEXT: fmov d0, x82808; CHECK-FP16-SD-NEXT: fmov d1, x92809; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload2810; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]2811; CHECK-FP16-SD-NEXT: add sp, sp, #482812; CHECK-FP16-SD-NEXT: ret2813;2814; CHECK-CVT-GI-LABEL: utest_f64i64_mm:2815; CHECK-CVT-GI: // %bb.0: // %entry2816; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill2817; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill2818; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill2819; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 322820; CHECK-CVT-GI-NEXT: .cfi_offset w19, -82821; CHECK-CVT-GI-NEXT: .cfi_offset w20, -162822; CHECK-CVT-GI-NEXT: .cfi_offset w30, -242823; CHECK-CVT-GI-NEXT: .cfi_offset b8, -322824; CHECK-CVT-GI-NEXT: mov d8, v0.d[1]2825; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 killed $q02826; CHECK-CVT-GI-NEXT: bl __fixunsdfti2827; CHECK-CVT-GI-NEXT: fmov d0, d82828; CHECK-CVT-GI-NEXT: mov x19, x02829; CHECK-CVT-GI-NEXT: mov x20, x12830; CHECK-CVT-GI-NEXT: bl __fixunsdfti2831; CHECK-CVT-GI-NEXT: cmp x20, #12832; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload2833; CHECK-CVT-GI-NEXT: cset w8, lo2834; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq2835; CHECK-CVT-GI-NEXT: cmp x1, #12836; CHECK-CVT-GI-NEXT: cset w9, lo2837; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq2838; CHECK-CVT-GI-NEXT: tst w8, #0x12839; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne2840; CHECK-CVT-GI-NEXT: tst w9, #0x12841; CHECK-CVT-GI-NEXT: fmov d0, x82842; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload2843; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne2844; CHECK-CVT-GI-NEXT: mov v0.d[1], x92845; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload2846; CHECK-CVT-GI-NEXT: ret2847;2848; CHECK-FP16-GI-LABEL: utest_f64i64_mm:2849; CHECK-FP16-GI: // %bb.0: // %entry2850; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill2851; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill2852; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill2853; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 322854; CHECK-FP16-GI-NEXT: .cfi_offset w19, -82855; CHECK-FP16-GI-NEXT: .cfi_offset w20, -162856; CHECK-FP16-GI-NEXT: .cfi_offset w30, -242857; CHECK-FP16-GI-NEXT: .cfi_offset b8, -322858; CHECK-FP16-GI-NEXT: mov d8, v0.d[1]2859; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q02860; CHECK-FP16-GI-NEXT: bl __fixunsdfti2861; CHECK-FP16-GI-NEXT: fmov d0, d82862; CHECK-FP16-GI-NEXT: mov x19, x02863; CHECK-FP16-GI-NEXT: mov x20, x12864; CHECK-FP16-GI-NEXT: bl __fixunsdfti2865; CHECK-FP16-GI-NEXT: cmp x20, #12866; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload2867; CHECK-FP16-GI-NEXT: cset w8, lo2868; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq2869; CHECK-FP16-GI-NEXT: cmp x1, #12870; CHECK-FP16-GI-NEXT: cset w9, lo2871; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq2872; CHECK-FP16-GI-NEXT: tst w8, #0x12873; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne2874; CHECK-FP16-GI-NEXT: tst w9, #0x12875; CHECK-FP16-GI-NEXT: fmov d0, x82876; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload2877; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne2878; CHECK-FP16-GI-NEXT: mov v0.d[1], x92879; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload2880; CHECK-FP16-GI-NEXT: ret2881entry:2882 %conv = fptoui <2 x double> %x to <2 x i128>2883 %spec.store.select = call <2 x i128> @llvm.umin.v2i128(<2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>)2884 %conv6 = trunc <2 x i128> %spec.store.select to <2 x i64>2885 ret <2 x i64> %conv62886}2887 2888define <2 x i64> @ustest_f64i64_mm(<2 x double> %x) {2889; CHECK-CVT-SD-LABEL: ustest_f64i64_mm:2890; CHECK-CVT-SD: // %bb.0: // %entry2891; CHECK-CVT-SD-NEXT: sub sp, sp, #482892; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill2893; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill2894; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 482895; CHECK-CVT-SD-NEXT: .cfi_offset w19, -82896; CHECK-CVT-SD-NEXT: .cfi_offset w20, -162897; CHECK-CVT-SD-NEXT: .cfi_offset w30, -322898; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill2899; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 killed $q02900; CHECK-CVT-SD-NEXT: bl __fixdfti2901; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload2902; CHECK-CVT-SD-NEXT: mov x19, x02903; CHECK-CVT-SD-NEXT: mov x20, x12904; CHECK-CVT-SD-NEXT: mov d0, v0.d[1]2905; CHECK-CVT-SD-NEXT: bl __fixdfti2906; CHECK-CVT-SD-NEXT: cmp x1, #12907; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload2908; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, lt2909; CHECK-CVT-SD-NEXT: csinc x9, x1, xzr, lt2910; CHECK-CVT-SD-NEXT: cmp x20, #12911; CHECK-CVT-SD-NEXT: csinc x10, x20, xzr, lt2912; CHECK-CVT-SD-NEXT: csel x11, x19, xzr, lt2913; CHECK-CVT-SD-NEXT: cmp x10, #02914; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload2915; CHECK-CVT-SD-NEXT: csel x10, xzr, x11, mi2916; CHECK-CVT-SD-NEXT: cmp x9, #02917; CHECK-CVT-SD-NEXT: csel x8, xzr, x8, mi2918; CHECK-CVT-SD-NEXT: fmov d0, x102919; CHECK-CVT-SD-NEXT: fmov d1, x82920; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]2921; CHECK-CVT-SD-NEXT: add sp, sp, #482922; CHECK-CVT-SD-NEXT: ret2923;2924; CHECK-FP16-SD-LABEL: ustest_f64i64_mm:2925; CHECK-FP16-SD: // %bb.0: // %entry2926; CHECK-FP16-SD-NEXT: sub sp, sp, #482927; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill2928; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill2929; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 482930; CHECK-FP16-SD-NEXT: .cfi_offset w19, -82931; CHECK-FP16-SD-NEXT: .cfi_offset w20, -162932; CHECK-FP16-SD-NEXT: .cfi_offset w30, -322933; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill2934; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q02935; CHECK-FP16-SD-NEXT: bl __fixdfti2936; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload2937; CHECK-FP16-SD-NEXT: mov x19, x02938; CHECK-FP16-SD-NEXT: mov x20, x12939; CHECK-FP16-SD-NEXT: mov d0, v0.d[1]2940; CHECK-FP16-SD-NEXT: bl __fixdfti2941; CHECK-FP16-SD-NEXT: cmp x1, #12942; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload2943; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, lt2944; CHECK-FP16-SD-NEXT: csinc x9, x1, xzr, lt2945; CHECK-FP16-SD-NEXT: cmp x20, #12946; CHECK-FP16-SD-NEXT: csinc x10, x20, xzr, lt2947; CHECK-FP16-SD-NEXT: csel x11, x19, xzr, lt2948; CHECK-FP16-SD-NEXT: cmp x10, #02949; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload2950; CHECK-FP16-SD-NEXT: csel x10, xzr, x11, mi2951; CHECK-FP16-SD-NEXT: cmp x9, #02952; CHECK-FP16-SD-NEXT: csel x8, xzr, x8, mi2953; CHECK-FP16-SD-NEXT: fmov d0, x102954; CHECK-FP16-SD-NEXT: fmov d1, x82955; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]2956; CHECK-FP16-SD-NEXT: add sp, sp, #482957; CHECK-FP16-SD-NEXT: ret2958;2959; CHECK-CVT-GI-LABEL: ustest_f64i64_mm:2960; CHECK-CVT-GI: // %bb.0: // %entry2961; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill2962; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill2963; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill2964; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 322965; CHECK-CVT-GI-NEXT: .cfi_offset w19, -82966; CHECK-CVT-GI-NEXT: .cfi_offset w20, -162967; CHECK-CVT-GI-NEXT: .cfi_offset w30, -242968; CHECK-CVT-GI-NEXT: .cfi_offset b8, -322969; CHECK-CVT-GI-NEXT: mov d8, v0.d[1]2970; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 killed $q02971; CHECK-CVT-GI-NEXT: bl __fixdfti2972; CHECK-CVT-GI-NEXT: fmov d0, d82973; CHECK-CVT-GI-NEXT: mov x19, x02974; CHECK-CVT-GI-NEXT: mov x20, x12975; CHECK-CVT-GI-NEXT: bl __fixdfti2976; CHECK-CVT-GI-NEXT: cmp x20, #12977; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload2978; CHECK-CVT-GI-NEXT: cset w8, lt2979; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq2980; CHECK-CVT-GI-NEXT: cmp x1, #12981; CHECK-CVT-GI-NEXT: cset w9, lt2982; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq2983; CHECK-CVT-GI-NEXT: tst w8, #0x12984; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne2985; CHECK-CVT-GI-NEXT: csinc x10, x20, xzr, ne2986; CHECK-CVT-GI-NEXT: tst w9, #0x12987; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne2988; CHECK-CVT-GI-NEXT: csinc x11, x1, xzr, ne2989; CHECK-CVT-GI-NEXT: cmp x8, #02990; CHECK-CVT-GI-NEXT: cset w12, hi2991; CHECK-CVT-GI-NEXT: cmp x10, #02992; CHECK-CVT-GI-NEXT: cset w10, gt2993; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload2994; CHECK-CVT-GI-NEXT: csel w10, w12, w10, eq2995; CHECK-CVT-GI-NEXT: cmp x9, #02996; CHECK-CVT-GI-NEXT: cset w12, hi2997; CHECK-CVT-GI-NEXT: cmp x11, #02998; CHECK-CVT-GI-NEXT: cset w11, gt2999; CHECK-CVT-GI-NEXT: csel w11, w12, w11, eq3000; CHECK-CVT-GI-NEXT: tst w10, #0x13001; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne3002; CHECK-CVT-GI-NEXT: tst w11, #0x13003; CHECK-CVT-GI-NEXT: fmov d0, x83004; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne3005; CHECK-CVT-GI-NEXT: mov v0.d[1], x93006; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload3007; CHECK-CVT-GI-NEXT: ret3008;3009; CHECK-FP16-GI-LABEL: ustest_f64i64_mm:3010; CHECK-FP16-GI: // %bb.0: // %entry3011; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill3012; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3013; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill3014; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 323015; CHECK-FP16-GI-NEXT: .cfi_offset w19, -83016; CHECK-FP16-GI-NEXT: .cfi_offset w20, -163017; CHECK-FP16-GI-NEXT: .cfi_offset w30, -243018; CHECK-FP16-GI-NEXT: .cfi_offset b8, -323019; CHECK-FP16-GI-NEXT: mov d8, v0.d[1]3020; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q03021; CHECK-FP16-GI-NEXT: bl __fixdfti3022; CHECK-FP16-GI-NEXT: fmov d0, d83023; CHECK-FP16-GI-NEXT: mov x19, x03024; CHECK-FP16-GI-NEXT: mov x20, x13025; CHECK-FP16-GI-NEXT: bl __fixdfti3026; CHECK-FP16-GI-NEXT: cmp x20, #13027; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3028; CHECK-FP16-GI-NEXT: cset w8, lt3029; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq3030; CHECK-FP16-GI-NEXT: cmp x1, #13031; CHECK-FP16-GI-NEXT: cset w9, lt3032; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq3033; CHECK-FP16-GI-NEXT: tst w8, #0x13034; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne3035; CHECK-FP16-GI-NEXT: csinc x10, x20, xzr, ne3036; CHECK-FP16-GI-NEXT: tst w9, #0x13037; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne3038; CHECK-FP16-GI-NEXT: csinc x11, x1, xzr, ne3039; CHECK-FP16-GI-NEXT: cmp x8, #03040; CHECK-FP16-GI-NEXT: cset w12, hi3041; CHECK-FP16-GI-NEXT: cmp x10, #03042; CHECK-FP16-GI-NEXT: cset w10, gt3043; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload3044; CHECK-FP16-GI-NEXT: csel w10, w12, w10, eq3045; CHECK-FP16-GI-NEXT: cmp x9, #03046; CHECK-FP16-GI-NEXT: cset w12, hi3047; CHECK-FP16-GI-NEXT: cmp x11, #03048; CHECK-FP16-GI-NEXT: cset w11, gt3049; CHECK-FP16-GI-NEXT: csel w11, w12, w11, eq3050; CHECK-FP16-GI-NEXT: tst w10, #0x13051; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne3052; CHECK-FP16-GI-NEXT: tst w11, #0x13053; CHECK-FP16-GI-NEXT: fmov d0, x83054; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne3055; CHECK-FP16-GI-NEXT: mov v0.d[1], x93056; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload3057; CHECK-FP16-GI-NEXT: ret3058entry:3059 %conv = fptosi <2 x double> %x to <2 x i128>3060 %spec.store.select = call <2 x i128> @llvm.smin.v2i128(<2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>)3061 %spec.store.select7 = call <2 x i128> @llvm.smax.v2i128(<2 x i128> %spec.store.select, <2 x i128> zeroinitializer)3062 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>3063 ret <2 x i64> %conv63064}3065 3066define <2 x i64> @stest_f32i64_mm(<2 x float> %x) {3067; CHECK-CVT-SD-LABEL: stest_f32i64_mm:3068; CHECK-CVT-SD: // %bb.0: // %entry3069; CHECK-CVT-SD-NEXT: fcvtl v0.2d, v0.2s3070; CHECK-CVT-SD-NEXT: fcvtzs v0.2d, v0.2d3071; CHECK-CVT-SD-NEXT: ret3072;3073; CHECK-FP16-SD-LABEL: stest_f32i64_mm:3074; CHECK-FP16-SD: // %bb.0: // %entry3075; CHECK-FP16-SD-NEXT: fcvtl v0.2d, v0.2s3076; CHECK-FP16-SD-NEXT: fcvtzs v0.2d, v0.2d3077; CHECK-FP16-SD-NEXT: ret3078;3079; CHECK-CVT-GI-LABEL: stest_f32i64_mm:3080; CHECK-CVT-GI: // %bb.0: // %entry3081; CHECK-CVT-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill3082; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3083; CHECK-CVT-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3084; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3085; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 483086; CHECK-CVT-GI-NEXT: .cfi_offset w19, -83087; CHECK-CVT-GI-NEXT: .cfi_offset w20, -163088; CHECK-CVT-GI-NEXT: .cfi_offset w21, -243089; CHECK-CVT-GI-NEXT: .cfi_offset w22, -323090; CHECK-CVT-GI-NEXT: .cfi_offset w30, -403091; CHECK-CVT-GI-NEXT: .cfi_offset b8, -483092; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q03093; CHECK-CVT-GI-NEXT: mov s8, v0.s[1]3094; CHECK-CVT-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff3095; CHECK-CVT-GI-NEXT: mov x22, #-9223372036854775808 // =0x80000000000000003096; CHECK-CVT-GI-NEXT: // kill: def $s0 killed $s0 killed $q03097; CHECK-CVT-GI-NEXT: bl __fixsfti3098; CHECK-CVT-GI-NEXT: fmov s0, s83099; CHECK-CVT-GI-NEXT: mov x19, x03100; CHECK-CVT-GI-NEXT: mov x20, x13101; CHECK-CVT-GI-NEXT: bl __fixsfti3102; CHECK-CVT-GI-NEXT: cmp x19, x213103; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3104; CHECK-CVT-GI-NEXT: cset w8, lo3105; CHECK-CVT-GI-NEXT: cmp x20, #03106; CHECK-CVT-GI-NEXT: cset w9, mi3107; CHECK-CVT-GI-NEXT: csel w8, w8, w9, eq3108; CHECK-CVT-GI-NEXT: cmp x0, x213109; CHECK-CVT-GI-NEXT: cset w9, lo3110; CHECK-CVT-GI-NEXT: cmp x1, #03111; CHECK-CVT-GI-NEXT: cset w10, mi3112; CHECK-CVT-GI-NEXT: csel w9, w9, w10, eq3113; CHECK-CVT-GI-NEXT: tst w8, #0x13114; CHECK-CVT-GI-NEXT: csel x8, x19, x21, ne3115; CHECK-CVT-GI-NEXT: csel x10, x20, xzr, ne3116; CHECK-CVT-GI-NEXT: tst w9, #0x13117; CHECK-CVT-GI-NEXT: csel x9, x0, x21, ne3118; CHECK-CVT-GI-NEXT: csel x11, x1, xzr, ne3119; CHECK-CVT-GI-NEXT: cmp x8, x223120; CHECK-CVT-GI-NEXT: cset w12, hi3121; CHECK-CVT-GI-NEXT: cmp x10, #03122; CHECK-CVT-GI-NEXT: cset w13, pl3123; CHECK-CVT-GI-NEXT: cmn x10, #13124; CHECK-CVT-GI-NEXT: csel w10, w12, w13, eq3125; CHECK-CVT-GI-NEXT: cmp x9, x223126; CHECK-CVT-GI-NEXT: cset w12, hi3127; CHECK-CVT-GI-NEXT: cmp x11, #03128; CHECK-CVT-GI-NEXT: cset w13, pl3129; CHECK-CVT-GI-NEXT: cmn x11, #13130; CHECK-CVT-GI-NEXT: csel w11, w12, w13, eq3131; CHECK-CVT-GI-NEXT: tst w10, #0x13132; CHECK-CVT-GI-NEXT: csel x8, x8, x22, ne3133; CHECK-CVT-GI-NEXT: tst w11, #0x13134; CHECK-CVT-GI-NEXT: fmov d0, x83135; CHECK-CVT-GI-NEXT: csel x9, x9, x22, ne3136; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3137; CHECK-CVT-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3138; CHECK-CVT-GI-NEXT: mov v0.d[1], x93139; CHECK-CVT-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload3140; CHECK-CVT-GI-NEXT: ret3141;3142; CHECK-FP16-GI-LABEL: stest_f32i64_mm:3143; CHECK-FP16-GI: // %bb.0: // %entry3144; CHECK-FP16-GI-NEXT: str d8, [sp, #-48]! // 8-byte Folded Spill3145; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3146; CHECK-FP16-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3147; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3148; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 483149; CHECK-FP16-GI-NEXT: .cfi_offset w19, -83150; CHECK-FP16-GI-NEXT: .cfi_offset w20, -163151; CHECK-FP16-GI-NEXT: .cfi_offset w21, -243152; CHECK-FP16-GI-NEXT: .cfi_offset w22, -323153; CHECK-FP16-GI-NEXT: .cfi_offset w30, -403154; CHECK-FP16-GI-NEXT: .cfi_offset b8, -483155; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q03156; CHECK-FP16-GI-NEXT: mov s8, v0.s[1]3157; CHECK-FP16-GI-NEXT: mov x21, #9223372036854775807 // =0x7fffffffffffffff3158; CHECK-FP16-GI-NEXT: mov x22, #-9223372036854775808 // =0x80000000000000003159; CHECK-FP16-GI-NEXT: // kill: def $s0 killed $s0 killed $q03160; CHECK-FP16-GI-NEXT: bl __fixsfti3161; CHECK-FP16-GI-NEXT: fmov s0, s83162; CHECK-FP16-GI-NEXT: mov x19, x03163; CHECK-FP16-GI-NEXT: mov x20, x13164; CHECK-FP16-GI-NEXT: bl __fixsfti3165; CHECK-FP16-GI-NEXT: cmp x19, x213166; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3167; CHECK-FP16-GI-NEXT: cset w8, lo3168; CHECK-FP16-GI-NEXT: cmp x20, #03169; CHECK-FP16-GI-NEXT: cset w9, mi3170; CHECK-FP16-GI-NEXT: csel w8, w8, w9, eq3171; CHECK-FP16-GI-NEXT: cmp x0, x213172; CHECK-FP16-GI-NEXT: cset w9, lo3173; CHECK-FP16-GI-NEXT: cmp x1, #03174; CHECK-FP16-GI-NEXT: cset w10, mi3175; CHECK-FP16-GI-NEXT: csel w9, w9, w10, eq3176; CHECK-FP16-GI-NEXT: tst w8, #0x13177; CHECK-FP16-GI-NEXT: csel x8, x19, x21, ne3178; CHECK-FP16-GI-NEXT: csel x10, x20, xzr, ne3179; CHECK-FP16-GI-NEXT: tst w9, #0x13180; CHECK-FP16-GI-NEXT: csel x9, x0, x21, ne3181; CHECK-FP16-GI-NEXT: csel x11, x1, xzr, ne3182; CHECK-FP16-GI-NEXT: cmp x8, x223183; CHECK-FP16-GI-NEXT: cset w12, hi3184; CHECK-FP16-GI-NEXT: cmp x10, #03185; CHECK-FP16-GI-NEXT: cset w13, pl3186; CHECK-FP16-GI-NEXT: cmn x10, #13187; CHECK-FP16-GI-NEXT: csel w10, w12, w13, eq3188; CHECK-FP16-GI-NEXT: cmp x9, x223189; CHECK-FP16-GI-NEXT: cset w12, hi3190; CHECK-FP16-GI-NEXT: cmp x11, #03191; CHECK-FP16-GI-NEXT: cset w13, pl3192; CHECK-FP16-GI-NEXT: cmn x11, #13193; CHECK-FP16-GI-NEXT: csel w11, w12, w13, eq3194; CHECK-FP16-GI-NEXT: tst w10, #0x13195; CHECK-FP16-GI-NEXT: csel x8, x8, x22, ne3196; CHECK-FP16-GI-NEXT: tst w11, #0x13197; CHECK-FP16-GI-NEXT: fmov d0, x83198; CHECK-FP16-GI-NEXT: csel x9, x9, x22, ne3199; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3200; CHECK-FP16-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3201; CHECK-FP16-GI-NEXT: mov v0.d[1], x93202; CHECK-FP16-GI-NEXT: ldr d8, [sp], #48 // 8-byte Folded Reload3203; CHECK-FP16-GI-NEXT: ret3204entry:3205 %conv = fptosi <2 x float> %x to <2 x i128>3206 %spec.store.select = call <2 x i128> @llvm.smin.v2i128(<2 x i128> %conv, <2 x i128> <i128 9223372036854775807, i128 9223372036854775807>)3207 %spec.store.select7 = call <2 x i128> @llvm.smax.v2i128(<2 x i128> %spec.store.select, <2 x i128> <i128 -9223372036854775808, i128 -9223372036854775808>)3208 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>3209 ret <2 x i64> %conv63210}3211 3212define <2 x i64> @utest_f32i64_mm(<2 x float> %x) {3213; CHECK-CVT-SD-LABEL: utest_f32i64_mm:3214; CHECK-CVT-SD: // %bb.0: // %entry3215; CHECK-CVT-SD-NEXT: sub sp, sp, #483216; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3217; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3218; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 483219; CHECK-CVT-SD-NEXT: .cfi_offset w19, -83220; CHECK-CVT-SD-NEXT: .cfi_offset w20, -163221; CHECK-CVT-SD-NEXT: .cfi_offset w30, -323222; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q03223; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill3224; CHECK-CVT-SD-NEXT: mov s0, v0.s[1]3225; CHECK-CVT-SD-NEXT: bl __fixunssfti3226; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload3227; CHECK-CVT-SD-NEXT: mov x19, x03228; CHECK-CVT-SD-NEXT: mov x20, x13229; CHECK-CVT-SD-NEXT: // kill: def $s0 killed $s0 killed $q03230; CHECK-CVT-SD-NEXT: bl __fixunssfti3231; CHECK-CVT-SD-NEXT: cmp x1, #03232; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3233; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, eq3234; CHECK-CVT-SD-NEXT: cmp x20, #03235; CHECK-CVT-SD-NEXT: csel x9, x19, xzr, eq3236; CHECK-CVT-SD-NEXT: fmov d0, x83237; CHECK-CVT-SD-NEXT: fmov d1, x93238; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3239; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]3240; CHECK-CVT-SD-NEXT: add sp, sp, #483241; CHECK-CVT-SD-NEXT: ret3242;3243; CHECK-FP16-SD-LABEL: utest_f32i64_mm:3244; CHECK-FP16-SD: // %bb.0: // %entry3245; CHECK-FP16-SD-NEXT: sub sp, sp, #483246; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3247; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3248; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 483249; CHECK-FP16-SD-NEXT: .cfi_offset w19, -83250; CHECK-FP16-SD-NEXT: .cfi_offset w20, -163251; CHECK-FP16-SD-NEXT: .cfi_offset w30, -323252; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q03253; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill3254; CHECK-FP16-SD-NEXT: mov s0, v0.s[1]3255; CHECK-FP16-SD-NEXT: bl __fixunssfti3256; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload3257; CHECK-FP16-SD-NEXT: mov x19, x03258; CHECK-FP16-SD-NEXT: mov x20, x13259; CHECK-FP16-SD-NEXT: // kill: def $s0 killed $s0 killed $q03260; CHECK-FP16-SD-NEXT: bl __fixunssfti3261; CHECK-FP16-SD-NEXT: cmp x1, #03262; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3263; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, eq3264; CHECK-FP16-SD-NEXT: cmp x20, #03265; CHECK-FP16-SD-NEXT: csel x9, x19, xzr, eq3266; CHECK-FP16-SD-NEXT: fmov d0, x83267; CHECK-FP16-SD-NEXT: fmov d1, x93268; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3269; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]3270; CHECK-FP16-SD-NEXT: add sp, sp, #483271; CHECK-FP16-SD-NEXT: ret3272;3273; CHECK-CVT-GI-LABEL: utest_f32i64_mm:3274; CHECK-CVT-GI: // %bb.0: // %entry3275; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill3276; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3277; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill3278; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 323279; CHECK-CVT-GI-NEXT: .cfi_offset w19, -83280; CHECK-CVT-GI-NEXT: .cfi_offset w20, -163281; CHECK-CVT-GI-NEXT: .cfi_offset w30, -243282; CHECK-CVT-GI-NEXT: .cfi_offset b8, -323283; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q03284; CHECK-CVT-GI-NEXT: mov s8, v0.s[1]3285; CHECK-CVT-GI-NEXT: // kill: def $s0 killed $s0 killed $q03286; CHECK-CVT-GI-NEXT: bl __fixunssfti3287; CHECK-CVT-GI-NEXT: fmov s0, s83288; CHECK-CVT-GI-NEXT: mov x19, x03289; CHECK-CVT-GI-NEXT: mov x20, x13290; CHECK-CVT-GI-NEXT: bl __fixunssfti3291; CHECK-CVT-GI-NEXT: cmp x20, #13292; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3293; CHECK-CVT-GI-NEXT: cset w8, lo3294; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq3295; CHECK-CVT-GI-NEXT: cmp x1, #13296; CHECK-CVT-GI-NEXT: cset w9, lo3297; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq3298; CHECK-CVT-GI-NEXT: tst w8, #0x13299; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne3300; CHECK-CVT-GI-NEXT: tst w9, #0x13301; CHECK-CVT-GI-NEXT: fmov d0, x83302; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload3303; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne3304; CHECK-CVT-GI-NEXT: mov v0.d[1], x93305; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload3306; CHECK-CVT-GI-NEXT: ret3307;3308; CHECK-FP16-GI-LABEL: utest_f32i64_mm:3309; CHECK-FP16-GI: // %bb.0: // %entry3310; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill3311; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3312; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill3313; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 323314; CHECK-FP16-GI-NEXT: .cfi_offset w19, -83315; CHECK-FP16-GI-NEXT: .cfi_offset w20, -163316; CHECK-FP16-GI-NEXT: .cfi_offset w30, -243317; CHECK-FP16-GI-NEXT: .cfi_offset b8, -323318; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q03319; CHECK-FP16-GI-NEXT: mov s8, v0.s[1]3320; CHECK-FP16-GI-NEXT: // kill: def $s0 killed $s0 killed $q03321; CHECK-FP16-GI-NEXT: bl __fixunssfti3322; CHECK-FP16-GI-NEXT: fmov s0, s83323; CHECK-FP16-GI-NEXT: mov x19, x03324; CHECK-FP16-GI-NEXT: mov x20, x13325; CHECK-FP16-GI-NEXT: bl __fixunssfti3326; CHECK-FP16-GI-NEXT: cmp x20, #13327; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3328; CHECK-FP16-GI-NEXT: cset w8, lo3329; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq3330; CHECK-FP16-GI-NEXT: cmp x1, #13331; CHECK-FP16-GI-NEXT: cset w9, lo3332; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq3333; CHECK-FP16-GI-NEXT: tst w8, #0x13334; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne3335; CHECK-FP16-GI-NEXT: tst w9, #0x13336; CHECK-FP16-GI-NEXT: fmov d0, x83337; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload3338; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne3339; CHECK-FP16-GI-NEXT: mov v0.d[1], x93340; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload3341; CHECK-FP16-GI-NEXT: ret3342entry:3343 %conv = fptoui <2 x float> %x to <2 x i128>3344 %spec.store.select = call <2 x i128> @llvm.umin.v2i128(<2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>)3345 %conv6 = trunc <2 x i128> %spec.store.select to <2 x i64>3346 ret <2 x i64> %conv63347}3348 3349define <2 x i64> @ustest_f32i64_mm(<2 x float> %x) {3350; CHECK-CVT-SD-LABEL: ustest_f32i64_mm:3351; CHECK-CVT-SD: // %bb.0: // %entry3352; CHECK-CVT-SD-NEXT: sub sp, sp, #483353; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3354; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3355; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 483356; CHECK-CVT-SD-NEXT: .cfi_offset w19, -83357; CHECK-CVT-SD-NEXT: .cfi_offset w20, -163358; CHECK-CVT-SD-NEXT: .cfi_offset w30, -323359; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q03360; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill3361; CHECK-CVT-SD-NEXT: // kill: def $s0 killed $s0 killed $q03362; CHECK-CVT-SD-NEXT: bl __fixsfti3363; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload3364; CHECK-CVT-SD-NEXT: mov x19, x03365; CHECK-CVT-SD-NEXT: mov x20, x13366; CHECK-CVT-SD-NEXT: mov s0, v0.s[1]3367; CHECK-CVT-SD-NEXT: bl __fixsfti3368; CHECK-CVT-SD-NEXT: cmp x1, #13369; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3370; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, lt3371; CHECK-CVT-SD-NEXT: csinc x9, x1, xzr, lt3372; CHECK-CVT-SD-NEXT: cmp x20, #13373; CHECK-CVT-SD-NEXT: csinc x10, x20, xzr, lt3374; CHECK-CVT-SD-NEXT: csel x11, x19, xzr, lt3375; CHECK-CVT-SD-NEXT: cmp x10, #03376; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3377; CHECK-CVT-SD-NEXT: csel x10, xzr, x11, mi3378; CHECK-CVT-SD-NEXT: cmp x9, #03379; CHECK-CVT-SD-NEXT: csel x8, xzr, x8, mi3380; CHECK-CVT-SD-NEXT: fmov d0, x103381; CHECK-CVT-SD-NEXT: fmov d1, x83382; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]3383; CHECK-CVT-SD-NEXT: add sp, sp, #483384; CHECK-CVT-SD-NEXT: ret3385;3386; CHECK-FP16-SD-LABEL: ustest_f32i64_mm:3387; CHECK-FP16-SD: // %bb.0: // %entry3388; CHECK-FP16-SD-NEXT: sub sp, sp, #483389; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3390; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3391; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 483392; CHECK-FP16-SD-NEXT: .cfi_offset w19, -83393; CHECK-FP16-SD-NEXT: .cfi_offset w20, -163394; CHECK-FP16-SD-NEXT: .cfi_offset w30, -323395; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q03396; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill3397; CHECK-FP16-SD-NEXT: // kill: def $s0 killed $s0 killed $q03398; CHECK-FP16-SD-NEXT: bl __fixsfti3399; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload3400; CHECK-FP16-SD-NEXT: mov x19, x03401; CHECK-FP16-SD-NEXT: mov x20, x13402; CHECK-FP16-SD-NEXT: mov s0, v0.s[1]3403; CHECK-FP16-SD-NEXT: bl __fixsfti3404; CHECK-FP16-SD-NEXT: cmp x1, #13405; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3406; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, lt3407; CHECK-FP16-SD-NEXT: csinc x9, x1, xzr, lt3408; CHECK-FP16-SD-NEXT: cmp x20, #13409; CHECK-FP16-SD-NEXT: csinc x10, x20, xzr, lt3410; CHECK-FP16-SD-NEXT: csel x11, x19, xzr, lt3411; CHECK-FP16-SD-NEXT: cmp x10, #03412; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3413; CHECK-FP16-SD-NEXT: csel x10, xzr, x11, mi3414; CHECK-FP16-SD-NEXT: cmp x9, #03415; CHECK-FP16-SD-NEXT: csel x8, xzr, x8, mi3416; CHECK-FP16-SD-NEXT: fmov d0, x103417; CHECK-FP16-SD-NEXT: fmov d1, x83418; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]3419; CHECK-FP16-SD-NEXT: add sp, sp, #483420; CHECK-FP16-SD-NEXT: ret3421;3422; CHECK-CVT-GI-LABEL: ustest_f32i64_mm:3423; CHECK-CVT-GI: // %bb.0: // %entry3424; CHECK-CVT-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill3425; CHECK-CVT-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3426; CHECK-CVT-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill3427; CHECK-CVT-GI-NEXT: .cfi_def_cfa_offset 323428; CHECK-CVT-GI-NEXT: .cfi_offset w19, -83429; CHECK-CVT-GI-NEXT: .cfi_offset w20, -163430; CHECK-CVT-GI-NEXT: .cfi_offset w30, -243431; CHECK-CVT-GI-NEXT: .cfi_offset b8, -323432; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q03433; CHECK-CVT-GI-NEXT: mov s8, v0.s[1]3434; CHECK-CVT-GI-NEXT: // kill: def $s0 killed $s0 killed $q03435; CHECK-CVT-GI-NEXT: bl __fixsfti3436; CHECK-CVT-GI-NEXT: fmov s0, s83437; CHECK-CVT-GI-NEXT: mov x19, x03438; CHECK-CVT-GI-NEXT: mov x20, x13439; CHECK-CVT-GI-NEXT: bl __fixsfti3440; CHECK-CVT-GI-NEXT: cmp x20, #13441; CHECK-CVT-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3442; CHECK-CVT-GI-NEXT: cset w8, lt3443; CHECK-CVT-GI-NEXT: csel w8, wzr, w8, eq3444; CHECK-CVT-GI-NEXT: cmp x1, #13445; CHECK-CVT-GI-NEXT: cset w9, lt3446; CHECK-CVT-GI-NEXT: csel w9, wzr, w9, eq3447; CHECK-CVT-GI-NEXT: tst w8, #0x13448; CHECK-CVT-GI-NEXT: csel x8, x19, xzr, ne3449; CHECK-CVT-GI-NEXT: csinc x10, x20, xzr, ne3450; CHECK-CVT-GI-NEXT: tst w9, #0x13451; CHECK-CVT-GI-NEXT: csel x9, x0, xzr, ne3452; CHECK-CVT-GI-NEXT: csinc x11, x1, xzr, ne3453; CHECK-CVT-GI-NEXT: cmp x8, #03454; CHECK-CVT-GI-NEXT: cset w12, hi3455; CHECK-CVT-GI-NEXT: cmp x10, #03456; CHECK-CVT-GI-NEXT: cset w10, gt3457; CHECK-CVT-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload3458; CHECK-CVT-GI-NEXT: csel w10, w12, w10, eq3459; CHECK-CVT-GI-NEXT: cmp x9, #03460; CHECK-CVT-GI-NEXT: cset w12, hi3461; CHECK-CVT-GI-NEXT: cmp x11, #03462; CHECK-CVT-GI-NEXT: cset w11, gt3463; CHECK-CVT-GI-NEXT: csel w11, w12, w11, eq3464; CHECK-CVT-GI-NEXT: tst w10, #0x13465; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne3466; CHECK-CVT-GI-NEXT: tst w11, #0x13467; CHECK-CVT-GI-NEXT: fmov d0, x83468; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne3469; CHECK-CVT-GI-NEXT: mov v0.d[1], x93470; CHECK-CVT-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload3471; CHECK-CVT-GI-NEXT: ret3472;3473; CHECK-FP16-GI-LABEL: ustest_f32i64_mm:3474; CHECK-FP16-GI: // %bb.0: // %entry3475; CHECK-FP16-GI-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill3476; CHECK-FP16-GI-NEXT: str x30, [sp, #8] // 8-byte Spill3477; CHECK-FP16-GI-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill3478; CHECK-FP16-GI-NEXT: .cfi_def_cfa_offset 323479; CHECK-FP16-GI-NEXT: .cfi_offset w19, -83480; CHECK-FP16-GI-NEXT: .cfi_offset w20, -163481; CHECK-FP16-GI-NEXT: .cfi_offset w30, -243482; CHECK-FP16-GI-NEXT: .cfi_offset b8, -323483; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q03484; CHECK-FP16-GI-NEXT: mov s8, v0.s[1]3485; CHECK-FP16-GI-NEXT: // kill: def $s0 killed $s0 killed $q03486; CHECK-FP16-GI-NEXT: bl __fixsfti3487; CHECK-FP16-GI-NEXT: fmov s0, s83488; CHECK-FP16-GI-NEXT: mov x19, x03489; CHECK-FP16-GI-NEXT: mov x20, x13490; CHECK-FP16-GI-NEXT: bl __fixsfti3491; CHECK-FP16-GI-NEXT: cmp x20, #13492; CHECK-FP16-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload3493; CHECK-FP16-GI-NEXT: cset w8, lt3494; CHECK-FP16-GI-NEXT: csel w8, wzr, w8, eq3495; CHECK-FP16-GI-NEXT: cmp x1, #13496; CHECK-FP16-GI-NEXT: cset w9, lt3497; CHECK-FP16-GI-NEXT: csel w9, wzr, w9, eq3498; CHECK-FP16-GI-NEXT: tst w8, #0x13499; CHECK-FP16-GI-NEXT: csel x8, x19, xzr, ne3500; CHECK-FP16-GI-NEXT: csinc x10, x20, xzr, ne3501; CHECK-FP16-GI-NEXT: tst w9, #0x13502; CHECK-FP16-GI-NEXT: csel x9, x0, xzr, ne3503; CHECK-FP16-GI-NEXT: csinc x11, x1, xzr, ne3504; CHECK-FP16-GI-NEXT: cmp x8, #03505; CHECK-FP16-GI-NEXT: cset w12, hi3506; CHECK-FP16-GI-NEXT: cmp x10, #03507; CHECK-FP16-GI-NEXT: cset w10, gt3508; CHECK-FP16-GI-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload3509; CHECK-FP16-GI-NEXT: csel w10, w12, w10, eq3510; CHECK-FP16-GI-NEXT: cmp x9, #03511; CHECK-FP16-GI-NEXT: cset w12, hi3512; CHECK-FP16-GI-NEXT: cmp x11, #03513; CHECK-FP16-GI-NEXT: cset w11, gt3514; CHECK-FP16-GI-NEXT: csel w11, w12, w11, eq3515; CHECK-FP16-GI-NEXT: tst w10, #0x13516; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne3517; CHECK-FP16-GI-NEXT: tst w11, #0x13518; CHECK-FP16-GI-NEXT: fmov d0, x83519; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne3520; CHECK-FP16-GI-NEXT: mov v0.d[1], x93521; CHECK-FP16-GI-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload3522; CHECK-FP16-GI-NEXT: ret3523entry:3524 %conv = fptosi <2 x float> %x to <2 x i128>3525 %spec.store.select = call <2 x i128> @llvm.smin.v2i128(<2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>)3526 %spec.store.select7 = call <2 x i128> @llvm.smax.v2i128(<2 x i128> %spec.store.select, <2 x i128> zeroinitializer)3527 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>3528 ret <2 x i64> %conv63529}3530 3531define <2 x i64> @stest_f16i64_mm(<2 x half> %x) {3532; CHECK-CVT-SD-LABEL: stest_f16i64_mm:3533; CHECK-CVT-SD: // %bb.0: // %entry3534; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q03535; CHECK-CVT-SD-NEXT: mov h1, v0.h[1]3536; CHECK-CVT-SD-NEXT: fcvt s0, h03537; CHECK-CVT-SD-NEXT: fcvt s1, h13538; CHECK-CVT-SD-NEXT: fcvtzs x8, s03539; CHECK-CVT-SD-NEXT: fcvtzs x9, s13540; CHECK-CVT-SD-NEXT: fmov d0, x83541; CHECK-CVT-SD-NEXT: mov v0.d[1], x93542; CHECK-CVT-SD-NEXT: ret3543;3544; CHECK-FP16-SD-LABEL: stest_f16i64_mm:3545; CHECK-FP16-SD: // %bb.0: // %entry3546; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q03547; CHECK-FP16-SD-NEXT: mov h1, v0.h[1]3548; CHECK-FP16-SD-NEXT: fcvtzs x8, h03549; CHECK-FP16-SD-NEXT: fcvtzs x9, h13550; CHECK-FP16-SD-NEXT: fmov d0, x83551; CHECK-FP16-SD-NEXT: mov v0.d[1], x93552; CHECK-FP16-SD-NEXT: ret3553;3554; CHECK-CVT-GI-LABEL: stest_f16i64_mm:3555; CHECK-CVT-GI: // %bb.0: // %entry3556; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q03557; CHECK-CVT-GI-NEXT: mov h1, v0.h[1]3558; CHECK-CVT-GI-NEXT: mov x8, #9223372036854775807 // =0x7fffffffffffffff3559; CHECK-CVT-GI-NEXT: mov x16, #-9223372036854775808 // =0x80000000000000003560; CHECK-CVT-GI-NEXT: fcvt s0, h03561; CHECK-CVT-GI-NEXT: fcvt s1, h13562; CHECK-CVT-GI-NEXT: fcvtzs x9, s03563; CHECK-CVT-GI-NEXT: fcvtzs x10, s13564; CHECK-CVT-GI-NEXT: asr x11, x9, #633565; CHECK-CVT-GI-NEXT: cmp x9, x83566; CHECK-CVT-GI-NEXT: cset w12, lo3567; CHECK-CVT-GI-NEXT: cmp x11, #03568; CHECK-CVT-GI-NEXT: asr x13, x10, #633569; CHECK-CVT-GI-NEXT: cset w14, mi3570; CHECK-CVT-GI-NEXT: csel w12, w12, w14, eq3571; CHECK-CVT-GI-NEXT: cmp x10, x83572; CHECK-CVT-GI-NEXT: cset w14, lo3573; CHECK-CVT-GI-NEXT: cmp x13, #03574; CHECK-CVT-GI-NEXT: cset w15, mi3575; CHECK-CVT-GI-NEXT: csel w14, w14, w15, eq3576; CHECK-CVT-GI-NEXT: tst w12, #0x13577; CHECK-CVT-GI-NEXT: csel x9, x9, x8, ne3578; CHECK-CVT-GI-NEXT: csel x11, x11, xzr, ne3579; CHECK-CVT-GI-NEXT: tst w14, #0x13580; CHECK-CVT-GI-NEXT: csel x8, x10, x8, ne3581; CHECK-CVT-GI-NEXT: csel x10, x13, xzr, ne3582; CHECK-CVT-GI-NEXT: cmp x9, x163583; CHECK-CVT-GI-NEXT: cset w12, hi3584; CHECK-CVT-GI-NEXT: cmp x11, #03585; CHECK-CVT-GI-NEXT: cset w13, pl3586; CHECK-CVT-GI-NEXT: cmn x11, #13587; CHECK-CVT-GI-NEXT: csel w11, w12, w13, eq3588; CHECK-CVT-GI-NEXT: cmp x8, x163589; CHECK-CVT-GI-NEXT: cset w12, hi3590; CHECK-CVT-GI-NEXT: cmp x10, #03591; CHECK-CVT-GI-NEXT: cset w13, pl3592; CHECK-CVT-GI-NEXT: cmn x10, #13593; CHECK-CVT-GI-NEXT: csel w10, w12, w13, eq3594; CHECK-CVT-GI-NEXT: tst w11, #0x13595; CHECK-CVT-GI-NEXT: csel x9, x9, x16, ne3596; CHECK-CVT-GI-NEXT: tst w10, #0x13597; CHECK-CVT-GI-NEXT: fmov d0, x93598; CHECK-CVT-GI-NEXT: csel x8, x8, x16, ne3599; CHECK-CVT-GI-NEXT: mov v0.d[1], x83600; CHECK-CVT-GI-NEXT: ret3601;3602; CHECK-FP16-GI-LABEL: stest_f16i64_mm:3603; CHECK-FP16-GI: // %bb.0: // %entry3604; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q03605; CHECK-FP16-GI-NEXT: mov h1, v0.h[1]3606; CHECK-FP16-GI-NEXT: fcvtzs x9, h03607; CHECK-FP16-GI-NEXT: mov x8, #9223372036854775807 // =0x7fffffffffffffff3608; CHECK-FP16-GI-NEXT: mov x16, #-9223372036854775808 // =0x80000000000000003609; CHECK-FP16-GI-NEXT: fcvtzs x10, h13610; CHECK-FP16-GI-NEXT: asr x11, x9, #633611; CHECK-FP16-GI-NEXT: cmp x9, x83612; CHECK-FP16-GI-NEXT: cset w12, lo3613; CHECK-FP16-GI-NEXT: cmp x11, #03614; CHECK-FP16-GI-NEXT: cset w14, mi3615; CHECK-FP16-GI-NEXT: asr x13, x10, #633616; CHECK-FP16-GI-NEXT: csel w12, w12, w14, eq3617; CHECK-FP16-GI-NEXT: cmp x10, x83618; CHECK-FP16-GI-NEXT: cset w14, lo3619; CHECK-FP16-GI-NEXT: cmp x13, #03620; CHECK-FP16-GI-NEXT: cset w15, mi3621; CHECK-FP16-GI-NEXT: csel w14, w14, w15, eq3622; CHECK-FP16-GI-NEXT: tst w12, #0x13623; CHECK-FP16-GI-NEXT: csel x9, x9, x8, ne3624; CHECK-FP16-GI-NEXT: csel x11, x11, xzr, ne3625; CHECK-FP16-GI-NEXT: tst w14, #0x13626; CHECK-FP16-GI-NEXT: csel x8, x10, x8, ne3627; CHECK-FP16-GI-NEXT: csel x10, x13, xzr, ne3628; CHECK-FP16-GI-NEXT: cmp x9, x163629; CHECK-FP16-GI-NEXT: cset w12, hi3630; CHECK-FP16-GI-NEXT: cmp x11, #03631; CHECK-FP16-GI-NEXT: cset w13, pl3632; CHECK-FP16-GI-NEXT: cmn x11, #13633; CHECK-FP16-GI-NEXT: csel w11, w12, w13, eq3634; CHECK-FP16-GI-NEXT: cmp x8, x163635; CHECK-FP16-GI-NEXT: cset w12, hi3636; CHECK-FP16-GI-NEXT: cmp x10, #03637; CHECK-FP16-GI-NEXT: cset w13, pl3638; CHECK-FP16-GI-NEXT: cmn x10, #13639; CHECK-FP16-GI-NEXT: csel w10, w12, w13, eq3640; CHECK-FP16-GI-NEXT: tst w11, #0x13641; CHECK-FP16-GI-NEXT: csel x9, x9, x16, ne3642; CHECK-FP16-GI-NEXT: tst w10, #0x13643; CHECK-FP16-GI-NEXT: fmov d0, x93644; CHECK-FP16-GI-NEXT: csel x8, x8, x16, ne3645; CHECK-FP16-GI-NEXT: mov v0.d[1], x83646; CHECK-FP16-GI-NEXT: ret3647entry:3648 %conv = fptosi <2 x half> %x to <2 x i128>3649 %spec.store.select = call <2 x i128> @llvm.smin.v2i128(<2 x i128> %conv, <2 x i128> <i128 9223372036854775807, i128 9223372036854775807>)3650 %spec.store.select7 = call <2 x i128> @llvm.smax.v2i128(<2 x i128> %spec.store.select, <2 x i128> <i128 -9223372036854775808, i128 -9223372036854775808>)3651 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>3652 ret <2 x i64> %conv63653}3654 3655define <2 x i64> @utest_f16i64_mm(<2 x half> %x) {3656; CHECK-CVT-SD-LABEL: utest_f16i64_mm:3657; CHECK-CVT-SD: // %bb.0: // %entry3658; CHECK-CVT-SD-NEXT: sub sp, sp, #483659; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3660; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3661; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 483662; CHECK-CVT-SD-NEXT: .cfi_offset w19, -83663; CHECK-CVT-SD-NEXT: .cfi_offset w20, -163664; CHECK-CVT-SD-NEXT: .cfi_offset w30, -323665; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q03666; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill3667; CHECK-CVT-SD-NEXT: mov h0, v0.h[1]3668; CHECK-CVT-SD-NEXT: bl __fixunshfti3669; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload3670; CHECK-CVT-SD-NEXT: mov x19, x03671; CHECK-CVT-SD-NEXT: mov x20, x13672; CHECK-CVT-SD-NEXT: // kill: def $h0 killed $h0 killed $q03673; CHECK-CVT-SD-NEXT: bl __fixunshfti3674; CHECK-CVT-SD-NEXT: cmp x1, #03675; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3676; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, eq3677; CHECK-CVT-SD-NEXT: cmp x20, #03678; CHECK-CVT-SD-NEXT: csel x9, x19, xzr, eq3679; CHECK-CVT-SD-NEXT: fmov d0, x83680; CHECK-CVT-SD-NEXT: fmov d1, x93681; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3682; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]3683; CHECK-CVT-SD-NEXT: add sp, sp, #483684; CHECK-CVT-SD-NEXT: ret3685;3686; CHECK-FP16-SD-LABEL: utest_f16i64_mm:3687; CHECK-FP16-SD: // %bb.0: // %entry3688; CHECK-FP16-SD-NEXT: sub sp, sp, #483689; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3690; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3691; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 483692; CHECK-FP16-SD-NEXT: .cfi_offset w19, -83693; CHECK-FP16-SD-NEXT: .cfi_offset w20, -163694; CHECK-FP16-SD-NEXT: .cfi_offset w30, -323695; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q03696; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill3697; CHECK-FP16-SD-NEXT: mov h0, v0.h[1]3698; CHECK-FP16-SD-NEXT: bl __fixunshfti3699; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload3700; CHECK-FP16-SD-NEXT: mov x19, x03701; CHECK-FP16-SD-NEXT: mov x20, x13702; CHECK-FP16-SD-NEXT: // kill: def $h0 killed $h0 killed $q03703; CHECK-FP16-SD-NEXT: bl __fixunshfti3704; CHECK-FP16-SD-NEXT: cmp x1, #03705; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3706; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, eq3707; CHECK-FP16-SD-NEXT: cmp x20, #03708; CHECK-FP16-SD-NEXT: csel x9, x19, xzr, eq3709; CHECK-FP16-SD-NEXT: fmov d0, x83710; CHECK-FP16-SD-NEXT: fmov d1, x93711; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3712; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]3713; CHECK-FP16-SD-NEXT: add sp, sp, #483714; CHECK-FP16-SD-NEXT: ret3715;3716; CHECK-CVT-GI-LABEL: utest_f16i64_mm:3717; CHECK-CVT-GI: // %bb.0: // %entry3718; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q03719; CHECK-CVT-GI-NEXT: mov h1, v0.h[1]3720; CHECK-CVT-GI-NEXT: fcvt s0, h03721; CHECK-CVT-GI-NEXT: fcvt s1, h13722; CHECK-CVT-GI-NEXT: fcvtzu x8, s03723; CHECK-CVT-GI-NEXT: fcvtzu x9, s13724; CHECK-CVT-GI-NEXT: fmov d0, x83725; CHECK-CVT-GI-NEXT: mov v0.d[1], x93726; CHECK-CVT-GI-NEXT: ret3727;3728; CHECK-FP16-GI-LABEL: utest_f16i64_mm:3729; CHECK-FP16-GI: // %bb.0: // %entry3730; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q03731; CHECK-FP16-GI-NEXT: mov h1, v0.h[1]3732; CHECK-FP16-GI-NEXT: fcvtzu x8, h03733; CHECK-FP16-GI-NEXT: fcvtzu x9, h13734; CHECK-FP16-GI-NEXT: fmov d0, x83735; CHECK-FP16-GI-NEXT: mov v0.d[1], x93736; CHECK-FP16-GI-NEXT: ret3737entry:3738 %conv = fptoui <2 x half> %x to <2 x i128>3739 %spec.store.select = call <2 x i128> @llvm.umin.v2i128(<2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>)3740 %conv6 = trunc <2 x i128> %spec.store.select to <2 x i64>3741 ret <2 x i64> %conv63742}3743 3744define <2 x i64> @ustest_f16i64_mm(<2 x half> %x) {3745; CHECK-CVT-SD-LABEL: ustest_f16i64_mm:3746; CHECK-CVT-SD: // %bb.0: // %entry3747; CHECK-CVT-SD-NEXT: sub sp, sp, #483748; CHECK-CVT-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3749; CHECK-CVT-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3750; CHECK-CVT-SD-NEXT: .cfi_def_cfa_offset 483751; CHECK-CVT-SD-NEXT: .cfi_offset w19, -83752; CHECK-CVT-SD-NEXT: .cfi_offset w20, -163753; CHECK-CVT-SD-NEXT: .cfi_offset w30, -323754; CHECK-CVT-SD-NEXT: // kill: def $d0 killed $d0 def $q03755; CHECK-CVT-SD-NEXT: str q0, [sp] // 16-byte Spill3756; CHECK-CVT-SD-NEXT: // kill: def $h0 killed $h0 killed $q03757; CHECK-CVT-SD-NEXT: bl __fixhfti3758; CHECK-CVT-SD-NEXT: ldr q0, [sp] // 16-byte Reload3759; CHECK-CVT-SD-NEXT: mov x19, x03760; CHECK-CVT-SD-NEXT: mov x20, x13761; CHECK-CVT-SD-NEXT: mov h0, v0.h[1]3762; CHECK-CVT-SD-NEXT: bl __fixhfti3763; CHECK-CVT-SD-NEXT: cmp x1, #13764; CHECK-CVT-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3765; CHECK-CVT-SD-NEXT: csel x8, x0, xzr, lt3766; CHECK-CVT-SD-NEXT: csinc x9, x1, xzr, lt3767; CHECK-CVT-SD-NEXT: cmp x20, #13768; CHECK-CVT-SD-NEXT: csinc x10, x20, xzr, lt3769; CHECK-CVT-SD-NEXT: csel x11, x19, xzr, lt3770; CHECK-CVT-SD-NEXT: cmp x10, #03771; CHECK-CVT-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3772; CHECK-CVT-SD-NEXT: csel x10, xzr, x11, mi3773; CHECK-CVT-SD-NEXT: cmp x9, #03774; CHECK-CVT-SD-NEXT: csel x8, xzr, x8, mi3775; CHECK-CVT-SD-NEXT: fmov d0, x103776; CHECK-CVT-SD-NEXT: fmov d1, x83777; CHECK-CVT-SD-NEXT: mov v0.d[1], v1.d[0]3778; CHECK-CVT-SD-NEXT: add sp, sp, #483779; CHECK-CVT-SD-NEXT: ret3780;3781; CHECK-FP16-SD-LABEL: ustest_f16i64_mm:3782; CHECK-FP16-SD: // %bb.0: // %entry3783; CHECK-FP16-SD-NEXT: sub sp, sp, #483784; CHECK-FP16-SD-NEXT: str x30, [sp, #16] // 8-byte Spill3785; CHECK-FP16-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3786; CHECK-FP16-SD-NEXT: .cfi_def_cfa_offset 483787; CHECK-FP16-SD-NEXT: .cfi_offset w19, -83788; CHECK-FP16-SD-NEXT: .cfi_offset w20, -163789; CHECK-FP16-SD-NEXT: .cfi_offset w30, -323790; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q03791; CHECK-FP16-SD-NEXT: str q0, [sp] // 16-byte Spill3792; CHECK-FP16-SD-NEXT: // kill: def $h0 killed $h0 killed $q03793; CHECK-FP16-SD-NEXT: bl __fixhfti3794; CHECK-FP16-SD-NEXT: ldr q0, [sp] // 16-byte Reload3795; CHECK-FP16-SD-NEXT: mov x19, x03796; CHECK-FP16-SD-NEXT: mov x20, x13797; CHECK-FP16-SD-NEXT: mov h0, v0.h[1]3798; CHECK-FP16-SD-NEXT: bl __fixhfti3799; CHECK-FP16-SD-NEXT: cmp x1, #13800; CHECK-FP16-SD-NEXT: ldr x30, [sp, #16] // 8-byte Reload3801; CHECK-FP16-SD-NEXT: csel x8, x0, xzr, lt3802; CHECK-FP16-SD-NEXT: csinc x9, x1, xzr, lt3803; CHECK-FP16-SD-NEXT: cmp x20, #13804; CHECK-FP16-SD-NEXT: csinc x10, x20, xzr, lt3805; CHECK-FP16-SD-NEXT: csel x11, x19, xzr, lt3806; CHECK-FP16-SD-NEXT: cmp x10, #03807; CHECK-FP16-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3808; CHECK-FP16-SD-NEXT: csel x10, xzr, x11, mi3809; CHECK-FP16-SD-NEXT: cmp x9, #03810; CHECK-FP16-SD-NEXT: csel x8, xzr, x8, mi3811; CHECK-FP16-SD-NEXT: fmov d0, x103812; CHECK-FP16-SD-NEXT: fmov d1, x83813; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]3814; CHECK-FP16-SD-NEXT: add sp, sp, #483815; CHECK-FP16-SD-NEXT: ret3816;3817; CHECK-CVT-GI-LABEL: ustest_f16i64_mm:3818; CHECK-CVT-GI: // %bb.0: // %entry3819; CHECK-CVT-GI-NEXT: // kill: def $d0 killed $d0 def $q03820; CHECK-CVT-GI-NEXT: mov h1, v0.h[1]3821; CHECK-CVT-GI-NEXT: fcvt s0, h03822; CHECK-CVT-GI-NEXT: fcvt s1, h13823; CHECK-CVT-GI-NEXT: fcvtzs x8, s03824; CHECK-CVT-GI-NEXT: fcvtzs x9, s13825; CHECK-CVT-GI-NEXT: asr x10, x8, #633826; CHECK-CVT-GI-NEXT: cmp x10, #13827; CHECK-CVT-GI-NEXT: asr x11, x9, #633828; CHECK-CVT-GI-NEXT: cset w12, lt3829; CHECK-CVT-GI-NEXT: csel w12, wzr, w12, eq3830; CHECK-CVT-GI-NEXT: cmp x11, #13831; CHECK-CVT-GI-NEXT: cset w13, lt3832; CHECK-CVT-GI-NEXT: csel w13, wzr, w13, eq3833; CHECK-CVT-GI-NEXT: tst w12, #0x13834; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne3835; CHECK-CVT-GI-NEXT: csinc x10, x10, xzr, ne3836; CHECK-CVT-GI-NEXT: tst w13, #0x13837; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne3838; CHECK-CVT-GI-NEXT: csinc x11, x11, xzr, ne3839; CHECK-CVT-GI-NEXT: cmp x8, #03840; CHECK-CVT-GI-NEXT: cset w12, hi3841; CHECK-CVT-GI-NEXT: cmp x10, #03842; CHECK-CVT-GI-NEXT: cset w10, gt3843; CHECK-CVT-GI-NEXT: csel w10, w12, w10, eq3844; CHECK-CVT-GI-NEXT: cmp x9, #03845; CHECK-CVT-GI-NEXT: cset w12, hi3846; CHECK-CVT-GI-NEXT: cmp x11, #03847; CHECK-CVT-GI-NEXT: cset w11, gt3848; CHECK-CVT-GI-NEXT: csel w11, w12, w11, eq3849; CHECK-CVT-GI-NEXT: tst w10, #0x13850; CHECK-CVT-GI-NEXT: csel x8, x8, xzr, ne3851; CHECK-CVT-GI-NEXT: tst w11, #0x13852; CHECK-CVT-GI-NEXT: fmov d0, x83853; CHECK-CVT-GI-NEXT: csel x9, x9, xzr, ne3854; CHECK-CVT-GI-NEXT: mov v0.d[1], x93855; CHECK-CVT-GI-NEXT: ret3856;3857; CHECK-FP16-GI-LABEL: ustest_f16i64_mm:3858; CHECK-FP16-GI: // %bb.0: // %entry3859; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q03860; CHECK-FP16-GI-NEXT: mov h1, v0.h[1]3861; CHECK-FP16-GI-NEXT: fcvtzs x8, h03862; CHECK-FP16-GI-NEXT: fcvtzs x9, h13863; CHECK-FP16-GI-NEXT: asr x10, x8, #633864; CHECK-FP16-GI-NEXT: cmp x10, #13865; CHECK-FP16-GI-NEXT: cset w12, lt3866; CHECK-FP16-GI-NEXT: asr x11, x9, #633867; CHECK-FP16-GI-NEXT: csel w12, wzr, w12, eq3868; CHECK-FP16-GI-NEXT: cmp x11, #13869; CHECK-FP16-GI-NEXT: cset w13, lt3870; CHECK-FP16-GI-NEXT: csel w13, wzr, w13, eq3871; CHECK-FP16-GI-NEXT: tst w12, #0x13872; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne3873; CHECK-FP16-GI-NEXT: csinc x10, x10, xzr, ne3874; CHECK-FP16-GI-NEXT: tst w13, #0x13875; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne3876; CHECK-FP16-GI-NEXT: csinc x11, x11, xzr, ne3877; CHECK-FP16-GI-NEXT: cmp x8, #03878; CHECK-FP16-GI-NEXT: cset w12, hi3879; CHECK-FP16-GI-NEXT: cmp x10, #03880; CHECK-FP16-GI-NEXT: cset w10, gt3881; CHECK-FP16-GI-NEXT: csel w10, w12, w10, eq3882; CHECK-FP16-GI-NEXT: cmp x9, #03883; CHECK-FP16-GI-NEXT: cset w12, hi3884; CHECK-FP16-GI-NEXT: cmp x11, #03885; CHECK-FP16-GI-NEXT: cset w11, gt3886; CHECK-FP16-GI-NEXT: csel w11, w12, w11, eq3887; CHECK-FP16-GI-NEXT: tst w10, #0x13888; CHECK-FP16-GI-NEXT: csel x8, x8, xzr, ne3889; CHECK-FP16-GI-NEXT: tst w11, #0x13890; CHECK-FP16-GI-NEXT: fmov d0, x83891; CHECK-FP16-GI-NEXT: csel x9, x9, xzr, ne3892; CHECK-FP16-GI-NEXT: mov v0.d[1], x93893; CHECK-FP16-GI-NEXT: ret3894entry:3895 %conv = fptosi <2 x half> %x to <2 x i128>3896 %spec.store.select = call <2 x i128> @llvm.smin.v2i128(<2 x i128> %conv, <2 x i128> <i128 18446744073709551616, i128 18446744073709551616>)3897 %spec.store.select7 = call <2 x i128> @llvm.smax.v2i128(<2 x i128> %spec.store.select, <2 x i128> zeroinitializer)3898 %conv6 = trunc <2 x i128> %spec.store.select7 to <2 x i64>3899 ret <2 x i64> %conv63900}3901 3902; i32 non saturate3903 3904define <4 x i32> @ustest_f16i32_nsat(<4 x half> %x) {3905; CHECK-CVT-SD-LABEL: ustest_f16i32_nsat:3906; CHECK-CVT-SD: // %bb.0: // %entry3907; CHECK-CVT-SD-NEXT: fcvtl v0.4s, v0.4h3908; CHECK-CVT-SD-NEXT: movi v1.2d, #00000000000000003909; CHECK-CVT-SD-NEXT: fcvtzs v0.4s, v0.4s3910; CHECK-CVT-SD-NEXT: smin v0.4s, v0.4s, v1.4s3911; CHECK-CVT-SD-NEXT: smax v0.4s, v0.4s, v1.4s3912; CHECK-CVT-SD-NEXT: ret3913;3914; CHECK-FP16-SD-LABEL: ustest_f16i32_nsat:3915; CHECK-FP16-SD: // %bb.0: // %entry3916; CHECK-FP16-SD-NEXT: fcvtl v0.4s, v0.4h3917; CHECK-FP16-SD-NEXT: movi v1.2d, #00000000000000003918; CHECK-FP16-SD-NEXT: fcvtzs v0.4s, v0.4s3919; CHECK-FP16-SD-NEXT: smin v0.4s, v0.4s, v1.4s3920; CHECK-FP16-SD-NEXT: smax v0.4s, v0.4s, v1.4s3921; CHECK-FP16-SD-NEXT: ret3922;3923; CHECK-CVT-GI-LABEL: ustest_f16i32_nsat:3924; CHECK-CVT-GI: // %bb.0: // %entry3925; CHECK-CVT-GI-NEXT: fcvtl v0.4s, v0.4h3926; CHECK-CVT-GI-NEXT: movi v1.2d, #00000000000000003927; CHECK-CVT-GI-NEXT: fcvtzs v0.4s, v0.4s3928; CHECK-CVT-GI-NEXT: smin v0.4s, v1.4s, v0.4s3929; CHECK-CVT-GI-NEXT: smax v0.4s, v0.4s, v1.4s3930; CHECK-CVT-GI-NEXT: ret3931;3932; CHECK-FP16-GI-LABEL: ustest_f16i32_nsat:3933; CHECK-FP16-GI: // %bb.0: // %entry3934; CHECK-FP16-GI-NEXT: fcvtl v0.4s, v0.4h3935; CHECK-FP16-GI-NEXT: movi v1.2d, #00000000000000003936; CHECK-FP16-GI-NEXT: fcvtzs v0.4s, v0.4s3937; CHECK-FP16-GI-NEXT: smin v0.4s, v1.4s, v0.4s3938; CHECK-FP16-GI-NEXT: smax v0.4s, v0.4s, v1.4s3939; CHECK-FP16-GI-NEXT: ret3940entry:3941 %conv = fptosi <4 x half> %x to <4 x i32>3942 %spec.store.select = call <4 x i32> @llvm.smin.v4i32(<4 x i32> zeroinitializer, <4 x i32> %conv)3943 %spec.store.select7 = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %spec.store.select, <4 x i32> zeroinitializer)3944 ret <4 x i32> %spec.store.select73945}3946 3947declare <2 x i32> @llvm.smin.v2i32(<2 x i32>, <2 x i32>)3948declare <2 x i32> @llvm.smax.v2i32(<2 x i32>, <2 x i32>)3949declare <2 x i32> @llvm.umin.v2i32(<2 x i32>, <2 x i32>)3950declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>)3951declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>)3952declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>)3953declare <8 x i32> @llvm.smin.v8i32(<8 x i32>, <8 x i32>)3954declare <8 x i32> @llvm.smax.v8i32(<8 x i32>, <8 x i32>)3955declare <8 x i32> @llvm.umin.v8i32(<8 x i32>, <8 x i32>)3956declare <2 x i64> @llvm.smin.v2i64(<2 x i64>, <2 x i64>)3957declare <2 x i64> @llvm.smax.v2i64(<2 x i64>, <2 x i64>)3958declare <2 x i64> @llvm.umin.v2i64(<2 x i64>, <2 x i64>)3959declare <4 x i64> @llvm.smin.v4i64(<4 x i64>, <4 x i64>)3960declare <4 x i64> @llvm.smax.v4i64(<4 x i64>, <4 x i64>)3961declare <4 x i64> @llvm.umin.v4i64(<4 x i64>, <4 x i64>)3962declare <2 x i128> @llvm.smin.v2i128(<2 x i128>, <2 x i128>)3963declare <2 x i128> @llvm.smax.v2i128(<2 x i128>, <2 x i128>)3964declare <2 x i128> @llvm.umin.v2i128(<2 x i128>, <2 x i128>)3965;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3966; CHECK-FP16: {{.*}}3967