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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-CVT3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP164; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-CVT5; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP166 7;8; 32-bit float to signed integer9;10 11declare i1 @llvm.fptosi.sat.i1.f32 (float)12declare i8 @llvm.fptosi.sat.i8.f32 (float)13declare i13 @llvm.fptosi.sat.i13.f32 (float)14declare i16 @llvm.fptosi.sat.i16.f32 (float)15declare i19 @llvm.fptosi.sat.i19.f32 (float)16declare i32 @llvm.fptosi.sat.i32.f32 (float)17declare i50 @llvm.fptosi.sat.i50.f32 (float)18declare i64 @llvm.fptosi.sat.i64.f32 (float)19declare i100 @llvm.fptosi.sat.i100.f32(float)20declare i128 @llvm.fptosi.sat.i128.f32(float)21 22define i1 @test_signed_i1_f32(float %f) nounwind {23; CHECK-SD-LABEL: test_signed_i1_f32:24; CHECK-SD: // %bb.0:25; CHECK-SD-NEXT: fcvtzs w8, s026; CHECK-SD-NEXT: ands w8, w8, w8, asr #3127; CHECK-SD-NEXT: csinv w8, w8, wzr, pl28; CHECK-SD-NEXT: and w0, w8, #0x129; CHECK-SD-NEXT: ret30;31; CHECK-GI-LABEL: test_signed_i1_f32:32; CHECK-GI: // %bb.0:33; CHECK-GI-NEXT: fcvtzs w8, s034; CHECK-GI-NEXT: cmp w8, #035; CHECK-GI-NEXT: csel w8, w8, wzr, mi36; CHECK-GI-NEXT: cmp w8, #037; CHECK-GI-NEXT: csinv w8, w8, wzr, pl38; CHECK-GI-NEXT: and w0, w8, #0x139; CHECK-GI-NEXT: ret40 %x = call i1 @llvm.fptosi.sat.i1.f32(float %f)41 ret i1 %x42}43 44define i8 @test_signed_i8_f32(float %f) nounwind {45; CHECK-LABEL: test_signed_i8_f32:46; CHECK: // %bb.0:47; CHECK-NEXT: fcvtzs w9, s048; CHECK-NEXT: mov w8, #127 // =0x7f49; CHECK-NEXT: cmp w9, #12750; CHECK-NEXT: csel w8, w9, w8, lt51; CHECK-NEXT: mov w9, #-128 // =0xffffff8052; CHECK-NEXT: cmn w8, #12853; CHECK-NEXT: csel w0, w8, w9, gt54; CHECK-NEXT: ret55 %x = call i8 @llvm.fptosi.sat.i8.f32(float %f)56 ret i8 %x57}58 59define i13 @test_signed_i13_f32(float %f) nounwind {60; CHECK-LABEL: test_signed_i13_f32:61; CHECK: // %bb.0:62; CHECK-NEXT: fcvtzs w9, s063; CHECK-NEXT: mov w8, #4095 // =0xfff64; CHECK-NEXT: cmp w9, #409565; CHECK-NEXT: csel w8, w9, w8, lt66; CHECK-NEXT: mov w9, #-4096 // =0xfffff00067; CHECK-NEXT: cmn w8, #1, lsl #12 // =409668; CHECK-NEXT: csel w0, w8, w9, gt69; CHECK-NEXT: ret70 %x = call i13 @llvm.fptosi.sat.i13.f32(float %f)71 ret i13 %x72}73 74define i16 @test_signed_i16_f32(float %f) nounwind {75; CHECK-LABEL: test_signed_i16_f32:76; CHECK: // %bb.0:77; CHECK-NEXT: fcvtzs w8, s078; CHECK-NEXT: mov w9, #32767 // =0x7fff79; CHECK-NEXT: cmp w8, w980; CHECK-NEXT: csel w8, w8, w9, lt81; CHECK-NEXT: mov w9, #-32768 // =0xffff800082; CHECK-NEXT: cmn w8, #8, lsl #12 // =3276883; CHECK-NEXT: csel w0, w8, w9, gt84; CHECK-NEXT: ret85 %x = call i16 @llvm.fptosi.sat.i16.f32(float %f)86 ret i16 %x87}88 89define i19 @test_signed_i19_f32(float %f) nounwind {90; CHECK-LABEL: test_signed_i19_f32:91; CHECK: // %bb.0:92; CHECK-NEXT: fcvtzs w8, s093; CHECK-NEXT: mov w9, #262143 // =0x3ffff94; CHECK-NEXT: cmp w8, w995; CHECK-NEXT: csel w8, w8, w9, lt96; CHECK-NEXT: mov w9, #-262144 // =0xfffc000097; CHECK-NEXT: cmn w8, #64, lsl #12 // =26214498; CHECK-NEXT: csel w0, w8, w9, gt99; CHECK-NEXT: ret100 %x = call i19 @llvm.fptosi.sat.i19.f32(float %f)101 ret i19 %x102}103 104define i32 @test_signed_i32_f32(float %f) nounwind {105; CHECK-LABEL: test_signed_i32_f32:106; CHECK: // %bb.0:107; CHECK-NEXT: fcvtzs w0, s0108; CHECK-NEXT: ret109 %x = call i32 @llvm.fptosi.sat.i32.f32(float %f)110 ret i32 %x111}112 113define i50 @test_signed_i50_f32(float %f) nounwind {114; CHECK-SD-LABEL: test_signed_i50_f32:115; CHECK-SD: // %bb.0:116; CHECK-SD-NEXT: fcvtzs x8, s0117; CHECK-SD-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff118; CHECK-SD-NEXT: cmp x8, x9119; CHECK-SD-NEXT: csel x8, x8, x9, lt120; CHECK-SD-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000121; CHECK-SD-NEXT: cmp x8, x9122; CHECK-SD-NEXT: csel x0, x8, x9, gt123; CHECK-SD-NEXT: ret124;125; CHECK-GI-LABEL: test_signed_i50_f32:126; CHECK-GI: // %bb.0:127; CHECK-GI-NEXT: fcvtzs x8, s0128; CHECK-GI-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff129; CHECK-GI-NEXT: mov x10, #-562949953421312 // =0xfffe000000000000130; CHECK-GI-NEXT: cmp x8, x9131; CHECK-GI-NEXT: csel x8, x8, x9, lt132; CHECK-GI-NEXT: cmp x8, x10133; CHECK-GI-NEXT: csel x0, x8, x10, gt134; CHECK-GI-NEXT: ret135 %x = call i50 @llvm.fptosi.sat.i50.f32(float %f)136 ret i50 %x137}138 139define i64 @test_signed_i64_f32(float %f) nounwind {140; CHECK-LABEL: test_signed_i64_f32:141; CHECK: // %bb.0:142; CHECK-NEXT: fcvtzs x0, s0143; CHECK-NEXT: ret144 %x = call i64 @llvm.fptosi.sat.i64.f32(float %f)145 ret i64 %x146}147 148define i100 @test_signed_i100_f32(float %f) nounwind {149; CHECK-SD-LABEL: test_signed_i100_f32:150; CHECK-SD: // %bb.0:151; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill152; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill153; CHECK-SD-NEXT: fmov s8, s0154; CHECK-SD-NEXT: bl __fixsfti155; CHECK-SD-NEXT: movi v0.2s, #241, lsl #24156; CHECK-SD-NEXT: mov w8, #1895825407 // =0x70ffffff157; CHECK-SD-NEXT: mov x10, #34359738367 // =0x7ffffffff158; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload159; CHECK-SD-NEXT: fcmp s8, s0160; CHECK-SD-NEXT: fmov s0, w8161; CHECK-SD-NEXT: mov x8, #-34359738368 // =0xfffffff800000000162; CHECK-SD-NEXT: csel x9, xzr, x0, lt163; CHECK-SD-NEXT: csel x8, x8, x1, lt164; CHECK-SD-NEXT: fcmp s8, s0165; CHECK-SD-NEXT: csel x8, x10, x8, gt166; CHECK-SD-NEXT: csinv x9, x9, xzr, le167; CHECK-SD-NEXT: fcmp s8, s8168; CHECK-SD-NEXT: csel x0, xzr, x9, vs169; CHECK-SD-NEXT: csel x1, xzr, x8, vs170; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload171; CHECK-SD-NEXT: ret172;173; CHECK-GI-LABEL: test_signed_i100_f32:174; CHECK-GI: // %bb.0:175; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill176; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill177; CHECK-GI-NEXT: fmov s8, s0178; CHECK-GI-NEXT: bl __fixsfti179; CHECK-GI-NEXT: movi v0.2s, #241, lsl #24180; CHECK-GI-NEXT: mov w8, #1895825407 // =0x70ffffff181; CHECK-GI-NEXT: mov x10, #34359738367 // =0x7ffffffff182; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload183; CHECK-GI-NEXT: fcmp s8, s0184; CHECK-GI-NEXT: fmov s0, w8185; CHECK-GI-NEXT: mov x8, #34359738368 // =0x800000000186; CHECK-GI-NEXT: csel x9, xzr, x0, lt187; CHECK-GI-NEXT: csel x8, x8, x1, lt188; CHECK-GI-NEXT: fcmp s8, s0189; CHECK-GI-NEXT: csinv x9, x9, xzr, le190; CHECK-GI-NEXT: csel x8, x10, x8, gt191; CHECK-GI-NEXT: fcmp s8, s8192; CHECK-GI-NEXT: csel x0, xzr, x9, vs193; CHECK-GI-NEXT: csel x1, xzr, x8, vs194; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload195; CHECK-GI-NEXT: ret196 %x = call i100 @llvm.fptosi.sat.i100.f32(float %f)197 ret i100 %x198}199 200define i128 @test_signed_i128_f32(float %f) nounwind {201; CHECK-SD-LABEL: test_signed_i128_f32:202; CHECK-SD: // %bb.0:203; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill204; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill205; CHECK-SD-NEXT: fmov s8, s0206; CHECK-SD-NEXT: bl __fixsfti207; CHECK-SD-NEXT: movi v0.2s, #255, lsl #24208; CHECK-SD-NEXT: mov w8, #2130706431 // =0x7effffff209; CHECK-SD-NEXT: mov x10, #9223372036854775807 // =0x7fffffffffffffff210; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload211; CHECK-SD-NEXT: fcmp s8, s0212; CHECK-SD-NEXT: fmov s0, w8213; CHECK-SD-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000214; CHECK-SD-NEXT: csel x9, xzr, x0, lt215; CHECK-SD-NEXT: csel x8, x8, x1, lt216; CHECK-SD-NEXT: fcmp s8, s0217; CHECK-SD-NEXT: csel x8, x10, x8, gt218; CHECK-SD-NEXT: csinv x9, x9, xzr, le219; CHECK-SD-NEXT: fcmp s8, s8220; CHECK-SD-NEXT: csel x0, xzr, x9, vs221; CHECK-SD-NEXT: csel x1, xzr, x8, vs222; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload223; CHECK-SD-NEXT: ret224;225; CHECK-GI-LABEL: test_signed_i128_f32:226; CHECK-GI: // %bb.0:227; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill228; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill229; CHECK-GI-NEXT: fmov s8, s0230; CHECK-GI-NEXT: bl __fixsfti231; CHECK-GI-NEXT: movi v0.2s, #255, lsl #24232; CHECK-GI-NEXT: mov w8, #2130706431 // =0x7effffff233; CHECK-GI-NEXT: mov x10, #9223372036854775807 // =0x7fffffffffffffff234; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload235; CHECK-GI-NEXT: fcmp s8, s0236; CHECK-GI-NEXT: fmov s0, w8237; CHECK-GI-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000238; CHECK-GI-NEXT: csel x9, xzr, x0, lt239; CHECK-GI-NEXT: csel x8, x8, x1, lt240; CHECK-GI-NEXT: fcmp s8, s0241; CHECK-GI-NEXT: csinv x9, x9, xzr, le242; CHECK-GI-NEXT: csel x8, x10, x8, gt243; CHECK-GI-NEXT: fcmp s8, s8244; CHECK-GI-NEXT: csel x0, xzr, x9, vs245; CHECK-GI-NEXT: csel x1, xzr, x8, vs246; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload247; CHECK-GI-NEXT: ret248 %x = call i128 @llvm.fptosi.sat.i128.f32(float %f)249 ret i128 %x250}251 252;253; 64-bit float to signed integer254;255 256declare i1 @llvm.fptosi.sat.i1.f64 (double)257declare i8 @llvm.fptosi.sat.i8.f64 (double)258declare i13 @llvm.fptosi.sat.i13.f64 (double)259declare i16 @llvm.fptosi.sat.i16.f64 (double)260declare i19 @llvm.fptosi.sat.i19.f64 (double)261declare i32 @llvm.fptosi.sat.i32.f64 (double)262declare i50 @llvm.fptosi.sat.i50.f64 (double)263declare i64 @llvm.fptosi.sat.i64.f64 (double)264declare i100 @llvm.fptosi.sat.i100.f64(double)265declare i128 @llvm.fptosi.sat.i128.f64(double)266 267define i1 @test_signed_i1_f64(double %f) nounwind {268; CHECK-SD-LABEL: test_signed_i1_f64:269; CHECK-SD: // %bb.0:270; CHECK-SD-NEXT: fcvtzs w8, d0271; CHECK-SD-NEXT: ands w8, w8, w8, asr #31272; CHECK-SD-NEXT: csinv w8, w8, wzr, pl273; CHECK-SD-NEXT: and w0, w8, #0x1274; CHECK-SD-NEXT: ret275;276; CHECK-GI-LABEL: test_signed_i1_f64:277; CHECK-GI: // %bb.0:278; CHECK-GI-NEXT: fcvtzs w8, d0279; CHECK-GI-NEXT: cmp w8, #0280; CHECK-GI-NEXT: csel w8, w8, wzr, mi281; CHECK-GI-NEXT: cmp w8, #0282; CHECK-GI-NEXT: csinv w8, w8, wzr, pl283; CHECK-GI-NEXT: and w0, w8, #0x1284; CHECK-GI-NEXT: ret285 %x = call i1 @llvm.fptosi.sat.i1.f64(double %f)286 ret i1 %x287}288 289define i8 @test_signed_i8_f64(double %f) nounwind {290; CHECK-LABEL: test_signed_i8_f64:291; CHECK: // %bb.0:292; CHECK-NEXT: fcvtzs w9, d0293; CHECK-NEXT: mov w8, #127 // =0x7f294; CHECK-NEXT: cmp w9, #127295; CHECK-NEXT: csel w8, w9, w8, lt296; CHECK-NEXT: mov w9, #-128 // =0xffffff80297; CHECK-NEXT: cmn w8, #128298; CHECK-NEXT: csel w0, w8, w9, gt299; CHECK-NEXT: ret300 %x = call i8 @llvm.fptosi.sat.i8.f64(double %f)301 ret i8 %x302}303 304define i13 @test_signed_i13_f64(double %f) nounwind {305; CHECK-LABEL: test_signed_i13_f64:306; CHECK: // %bb.0:307; CHECK-NEXT: fcvtzs w9, d0308; CHECK-NEXT: mov w8, #4095 // =0xfff309; CHECK-NEXT: cmp w9, #4095310; CHECK-NEXT: csel w8, w9, w8, lt311; CHECK-NEXT: mov w9, #-4096 // =0xfffff000312; CHECK-NEXT: cmn w8, #1, lsl #12 // =4096313; CHECK-NEXT: csel w0, w8, w9, gt314; CHECK-NEXT: ret315 %x = call i13 @llvm.fptosi.sat.i13.f64(double %f)316 ret i13 %x317}318 319define i16 @test_signed_i16_f64(double %f) nounwind {320; CHECK-LABEL: test_signed_i16_f64:321; CHECK: // %bb.0:322; CHECK-NEXT: fcvtzs w8, d0323; CHECK-NEXT: mov w9, #32767 // =0x7fff324; CHECK-NEXT: cmp w8, w9325; CHECK-NEXT: csel w8, w8, w9, lt326; CHECK-NEXT: mov w9, #-32768 // =0xffff8000327; CHECK-NEXT: cmn w8, #8, lsl #12 // =32768328; CHECK-NEXT: csel w0, w8, w9, gt329; CHECK-NEXT: ret330 %x = call i16 @llvm.fptosi.sat.i16.f64(double %f)331 ret i16 %x332}333 334define i19 @test_signed_i19_f64(double %f) nounwind {335; CHECK-LABEL: test_signed_i19_f64:336; CHECK: // %bb.0:337; CHECK-NEXT: fcvtzs w8, d0338; CHECK-NEXT: mov w9, #262143 // =0x3ffff339; CHECK-NEXT: cmp w8, w9340; CHECK-NEXT: csel w8, w8, w9, lt341; CHECK-NEXT: mov w9, #-262144 // =0xfffc0000342; CHECK-NEXT: cmn w8, #64, lsl #12 // =262144343; CHECK-NEXT: csel w0, w8, w9, gt344; CHECK-NEXT: ret345 %x = call i19 @llvm.fptosi.sat.i19.f64(double %f)346 ret i19 %x347}348 349define i32 @test_signed_i32_f64(double %f) nounwind {350; CHECK-LABEL: test_signed_i32_f64:351; CHECK: // %bb.0:352; CHECK-NEXT: fcvtzs w0, d0353; CHECK-NEXT: ret354 %x = call i32 @llvm.fptosi.sat.i32.f64(double %f)355 ret i32 %x356}357 358define i50 @test_signed_i50_f64(double %f) nounwind {359; CHECK-SD-LABEL: test_signed_i50_f64:360; CHECK-SD: // %bb.0:361; CHECK-SD-NEXT: fcvtzs x8, d0362; CHECK-SD-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff363; CHECK-SD-NEXT: cmp x8, x9364; CHECK-SD-NEXT: csel x8, x8, x9, lt365; CHECK-SD-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000366; CHECK-SD-NEXT: cmp x8, x9367; CHECK-SD-NEXT: csel x0, x8, x9, gt368; CHECK-SD-NEXT: ret369;370; CHECK-GI-LABEL: test_signed_i50_f64:371; CHECK-GI: // %bb.0:372; CHECK-GI-NEXT: fcvtzs x8, d0373; CHECK-GI-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff374; CHECK-GI-NEXT: mov x10, #-562949953421312 // =0xfffe000000000000375; CHECK-GI-NEXT: cmp x8, x9376; CHECK-GI-NEXT: csel x8, x8, x9, lt377; CHECK-GI-NEXT: cmp x8, x10378; CHECK-GI-NEXT: csel x0, x8, x10, gt379; CHECK-GI-NEXT: ret380 %x = call i50 @llvm.fptosi.sat.i50.f64(double %f)381 ret i50 %x382}383 384define i64 @test_signed_i64_f64(double %f) nounwind {385; CHECK-LABEL: test_signed_i64_f64:386; CHECK: // %bb.0:387; CHECK-NEXT: fcvtzs x0, d0388; CHECK-NEXT: ret389 %x = call i64 @llvm.fptosi.sat.i64.f64(double %f)390 ret i64 %x391}392 393define i100 @test_signed_i100_f64(double %f) nounwind {394; CHECK-SD-LABEL: test_signed_i100_f64:395; CHECK-SD: // %bb.0:396; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill397; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill398; CHECK-SD-NEXT: fmov d8, d0399; CHECK-SD-NEXT: bl __fixdfti400; CHECK-SD-NEXT: mov x8, #-4170333254945079296 // =0xc620000000000000401; CHECK-SD-NEXT: mov x10, #34359738367 // =0x7ffffffff402; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload403; CHECK-SD-NEXT: fmov d0, x8404; CHECK-SD-NEXT: mov x8, #5053038781909696511 // =0x461fffffffffffff405; CHECK-SD-NEXT: fcmp d8, d0406; CHECK-SD-NEXT: fmov d0, x8407; CHECK-SD-NEXT: mov x8, #-34359738368 // =0xfffffff800000000408; CHECK-SD-NEXT: csel x9, xzr, x0, lt409; CHECK-SD-NEXT: csel x8, x8, x1, lt410; CHECK-SD-NEXT: fcmp d8, d0411; CHECK-SD-NEXT: csel x8, x10, x8, gt412; CHECK-SD-NEXT: csinv x9, x9, xzr, le413; CHECK-SD-NEXT: fcmp d8, d8414; CHECK-SD-NEXT: csel x0, xzr, x9, vs415; CHECK-SD-NEXT: csel x1, xzr, x8, vs416; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload417; CHECK-SD-NEXT: ret418;419; CHECK-GI-LABEL: test_signed_i100_f64:420; CHECK-GI: // %bb.0:421; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill422; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill423; CHECK-GI-NEXT: fmov d8, d0424; CHECK-GI-NEXT: bl __fixdfti425; CHECK-GI-NEXT: mov x8, #-4170333254945079296 // =0xc620000000000000426; CHECK-GI-NEXT: mov x10, #34359738367 // =0x7ffffffff427; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload428; CHECK-GI-NEXT: fmov d0, x8429; CHECK-GI-NEXT: mov x8, #5053038781909696511 // =0x461fffffffffffff430; CHECK-GI-NEXT: fcmp d8, d0431; CHECK-GI-NEXT: fmov d0, x8432; CHECK-GI-NEXT: mov x8, #34359738368 // =0x800000000433; CHECK-GI-NEXT: csel x9, xzr, x0, lt434; CHECK-GI-NEXT: csel x8, x8, x1, lt435; CHECK-GI-NEXT: fcmp d8, d0436; CHECK-GI-NEXT: csinv x9, x9, xzr, le437; CHECK-GI-NEXT: csel x8, x10, x8, gt438; CHECK-GI-NEXT: fcmp d8, d8439; CHECK-GI-NEXT: csel x0, xzr, x9, vs440; CHECK-GI-NEXT: csel x1, xzr, x8, vs441; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload442; CHECK-GI-NEXT: ret443 %x = call i100 @llvm.fptosi.sat.i100.f64(double %f)444 ret i100 %x445}446 447define i128 @test_signed_i128_f64(double %f) nounwind {448; CHECK-SD-LABEL: test_signed_i128_f64:449; CHECK-SD: // %bb.0:450; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill451; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill452; CHECK-SD-NEXT: fmov d8, d0453; CHECK-SD-NEXT: bl __fixdfti454; CHECK-SD-NEXT: mov x8, #-4044232465378705408 // =0xc7e0000000000000455; CHECK-SD-NEXT: mov x10, #9223372036854775807 // =0x7fffffffffffffff456; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload457; CHECK-SD-NEXT: fmov d0, x8458; CHECK-SD-NEXT: mov x8, #5179139571476070399 // =0x47dfffffffffffff459; CHECK-SD-NEXT: fcmp d8, d0460; CHECK-SD-NEXT: fmov d0, x8461; CHECK-SD-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000462; CHECK-SD-NEXT: csel x9, xzr, x0, lt463; CHECK-SD-NEXT: csel x8, x8, x1, lt464; CHECK-SD-NEXT: fcmp d8, d0465; CHECK-SD-NEXT: csel x8, x10, x8, gt466; CHECK-SD-NEXT: csinv x9, x9, xzr, le467; CHECK-SD-NEXT: fcmp d8, d8468; CHECK-SD-NEXT: csel x0, xzr, x9, vs469; CHECK-SD-NEXT: csel x1, xzr, x8, vs470; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload471; CHECK-SD-NEXT: ret472;473; CHECK-GI-LABEL: test_signed_i128_f64:474; CHECK-GI: // %bb.0:475; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill476; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill477; CHECK-GI-NEXT: fmov d8, d0478; CHECK-GI-NEXT: bl __fixdfti479; CHECK-GI-NEXT: mov x8, #-4044232465378705408 // =0xc7e0000000000000480; CHECK-GI-NEXT: mov x10, #9223372036854775807 // =0x7fffffffffffffff481; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload482; CHECK-GI-NEXT: fmov d0, x8483; CHECK-GI-NEXT: mov x8, #5179139571476070399 // =0x47dfffffffffffff484; CHECK-GI-NEXT: fcmp d8, d0485; CHECK-GI-NEXT: fmov d0, x8486; CHECK-GI-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000487; CHECK-GI-NEXT: csel x9, xzr, x0, lt488; CHECK-GI-NEXT: csel x8, x8, x1, lt489; CHECK-GI-NEXT: fcmp d8, d0490; CHECK-GI-NEXT: csinv x9, x9, xzr, le491; CHECK-GI-NEXT: csel x8, x10, x8, gt492; CHECK-GI-NEXT: fcmp d8, d8493; CHECK-GI-NEXT: csel x0, xzr, x9, vs494; CHECK-GI-NEXT: csel x1, xzr, x8, vs495; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload496; CHECK-GI-NEXT: ret497 %x = call i128 @llvm.fptosi.sat.i128.f64(double %f)498 ret i128 %x499}500 501;502; 16-bit float to signed integer503;504 505declare i1 @llvm.fptosi.sat.i1.f16 (half)506declare i8 @llvm.fptosi.sat.i8.f16 (half)507declare i13 @llvm.fptosi.sat.i13.f16 (half)508declare i16 @llvm.fptosi.sat.i16.f16 (half)509declare i19 @llvm.fptosi.sat.i19.f16 (half)510declare i32 @llvm.fptosi.sat.i32.f16 (half)511declare i50 @llvm.fptosi.sat.i50.f16 (half)512declare i64 @llvm.fptosi.sat.i64.f16 (half)513declare i100 @llvm.fptosi.sat.i100.f16(half)514declare i128 @llvm.fptosi.sat.i128.f16(half)515 516define i1 @test_signed_i1_f16(half %f) nounwind {517; CHECK-SD-CVT-LABEL: test_signed_i1_f16:518; CHECK-SD-CVT: // %bb.0:519; CHECK-SD-CVT-NEXT: fcvt s0, h0520; CHECK-SD-CVT-NEXT: fcvtzs w8, s0521; CHECK-SD-CVT-NEXT: ands w8, w8, w8, asr #31522; CHECK-SD-CVT-NEXT: csinv w8, w8, wzr, pl523; CHECK-SD-CVT-NEXT: and w0, w8, #0x1524; CHECK-SD-CVT-NEXT: ret525;526; CHECK-SD-FP16-LABEL: test_signed_i1_f16:527; CHECK-SD-FP16: // %bb.0:528; CHECK-SD-FP16-NEXT: fcvtzs w8, h0529; CHECK-SD-FP16-NEXT: ands w8, w8, w8, asr #31530; CHECK-SD-FP16-NEXT: csinv w8, w8, wzr, pl531; CHECK-SD-FP16-NEXT: and w0, w8, #0x1532; CHECK-SD-FP16-NEXT: ret533;534; CHECK-GI-CVT-LABEL: test_signed_i1_f16:535; CHECK-GI-CVT: // %bb.0:536; CHECK-GI-CVT-NEXT: fcvt s0, h0537; CHECK-GI-CVT-NEXT: fcvtzs w8, s0538; CHECK-GI-CVT-NEXT: cmp w8, #0539; CHECK-GI-CVT-NEXT: csel w8, w8, wzr, mi540; CHECK-GI-CVT-NEXT: cmp w8, #0541; CHECK-GI-CVT-NEXT: csinv w8, w8, wzr, pl542; CHECK-GI-CVT-NEXT: and w0, w8, #0x1543; CHECK-GI-CVT-NEXT: ret544;545; CHECK-GI-FP16-LABEL: test_signed_i1_f16:546; CHECK-GI-FP16: // %bb.0:547; CHECK-GI-FP16-NEXT: fcvtzs w8, h0548; CHECK-GI-FP16-NEXT: cmp w8, #0549; CHECK-GI-FP16-NEXT: csel w8, w8, wzr, mi550; CHECK-GI-FP16-NEXT: cmp w8, #0551; CHECK-GI-FP16-NEXT: csinv w8, w8, wzr, pl552; CHECK-GI-FP16-NEXT: and w0, w8, #0x1553; CHECK-GI-FP16-NEXT: ret554 %x = call i1 @llvm.fptosi.sat.i1.f16(half %f)555 ret i1 %x556}557 558define i8 @test_signed_i8_f16(half %f) nounwind {559; CHECK-SD-CVT-LABEL: test_signed_i8_f16:560; CHECK-SD-CVT: // %bb.0:561; CHECK-SD-CVT-NEXT: fcvt s0, h0562; CHECK-SD-CVT-NEXT: mov w8, #127 // =0x7f563; CHECK-SD-CVT-NEXT: fcvtzs w9, s0564; CHECK-SD-CVT-NEXT: cmp w9, #127565; CHECK-SD-CVT-NEXT: csel w8, w9, w8, lt566; CHECK-SD-CVT-NEXT: mov w9, #-128 // =0xffffff80567; CHECK-SD-CVT-NEXT: cmn w8, #128568; CHECK-SD-CVT-NEXT: csel w0, w8, w9, gt569; CHECK-SD-CVT-NEXT: ret570;571; CHECK-SD-FP16-LABEL: test_signed_i8_f16:572; CHECK-SD-FP16: // %bb.0:573; CHECK-SD-FP16-NEXT: fcvtzs w9, h0574; CHECK-SD-FP16-NEXT: mov w8, #127 // =0x7f575; CHECK-SD-FP16-NEXT: cmp w9, #127576; CHECK-SD-FP16-NEXT: csel w8, w9, w8, lt577; CHECK-SD-FP16-NEXT: mov w9, #-128 // =0xffffff80578; CHECK-SD-FP16-NEXT: cmn w8, #128579; CHECK-SD-FP16-NEXT: csel w0, w8, w9, gt580; CHECK-SD-FP16-NEXT: ret581;582; CHECK-GI-CVT-LABEL: test_signed_i8_f16:583; CHECK-GI-CVT: // %bb.0:584; CHECK-GI-CVT-NEXT: fcvt s0, h0585; CHECK-GI-CVT-NEXT: mov w8, #127 // =0x7f586; CHECK-GI-CVT-NEXT: fcvtzs w9, s0587; CHECK-GI-CVT-NEXT: cmp w9, #127588; CHECK-GI-CVT-NEXT: csel w8, w9, w8, lt589; CHECK-GI-CVT-NEXT: mov w9, #-128 // =0xffffff80590; CHECK-GI-CVT-NEXT: cmn w8, #128591; CHECK-GI-CVT-NEXT: csel w0, w8, w9, gt592; CHECK-GI-CVT-NEXT: ret593;594; CHECK-GI-FP16-LABEL: test_signed_i8_f16:595; CHECK-GI-FP16: // %bb.0:596; CHECK-GI-FP16-NEXT: fcvtzs w9, h0597; CHECK-GI-FP16-NEXT: mov w8, #127 // =0x7f598; CHECK-GI-FP16-NEXT: cmp w9, #127599; CHECK-GI-FP16-NEXT: csel w8, w9, w8, lt600; CHECK-GI-FP16-NEXT: mov w9, #-128 // =0xffffff80601; CHECK-GI-FP16-NEXT: cmn w8, #128602; CHECK-GI-FP16-NEXT: csel w0, w8, w9, gt603; CHECK-GI-FP16-NEXT: ret604 %x = call i8 @llvm.fptosi.sat.i8.f16(half %f)605 ret i8 %x606}607 608define i13 @test_signed_i13_f16(half %f) nounwind {609; CHECK-SD-CVT-LABEL: test_signed_i13_f16:610; CHECK-SD-CVT: // %bb.0:611; CHECK-SD-CVT-NEXT: fcvt s0, h0612; CHECK-SD-CVT-NEXT: mov w8, #4095 // =0xfff613; CHECK-SD-CVT-NEXT: fcvtzs w9, s0614; CHECK-SD-CVT-NEXT: cmp w9, #4095615; CHECK-SD-CVT-NEXT: csel w8, w9, w8, lt616; CHECK-SD-CVT-NEXT: mov w9, #-4096 // =0xfffff000617; CHECK-SD-CVT-NEXT: cmn w8, #1, lsl #12 // =4096618; CHECK-SD-CVT-NEXT: csel w0, w8, w9, gt619; CHECK-SD-CVT-NEXT: ret620;621; CHECK-SD-FP16-LABEL: test_signed_i13_f16:622; CHECK-SD-FP16: // %bb.0:623; CHECK-SD-FP16-NEXT: fcvtzs w9, h0624; CHECK-SD-FP16-NEXT: mov w8, #4095 // =0xfff625; CHECK-SD-FP16-NEXT: cmp w9, #4095626; CHECK-SD-FP16-NEXT: csel w8, w9, w8, lt627; CHECK-SD-FP16-NEXT: mov w9, #-4096 // =0xfffff000628; CHECK-SD-FP16-NEXT: cmn w8, #1, lsl #12 // =4096629; CHECK-SD-FP16-NEXT: csel w0, w8, w9, gt630; CHECK-SD-FP16-NEXT: ret631;632; CHECK-GI-CVT-LABEL: test_signed_i13_f16:633; CHECK-GI-CVT: // %bb.0:634; CHECK-GI-CVT-NEXT: fcvt s0, h0635; CHECK-GI-CVT-NEXT: mov w8, #4095 // =0xfff636; CHECK-GI-CVT-NEXT: fcvtzs w9, s0637; CHECK-GI-CVT-NEXT: cmp w9, #4095638; CHECK-GI-CVT-NEXT: csel w8, w9, w8, lt639; CHECK-GI-CVT-NEXT: mov w9, #-4096 // =0xfffff000640; CHECK-GI-CVT-NEXT: cmn w8, #1, lsl #12 // =4096641; CHECK-GI-CVT-NEXT: csel w0, w8, w9, gt642; CHECK-GI-CVT-NEXT: ret643;644; CHECK-GI-FP16-LABEL: test_signed_i13_f16:645; CHECK-GI-FP16: // %bb.0:646; CHECK-GI-FP16-NEXT: fcvtzs w9, h0647; CHECK-GI-FP16-NEXT: mov w8, #4095 // =0xfff648; CHECK-GI-FP16-NEXT: cmp w9, #4095649; CHECK-GI-FP16-NEXT: csel w8, w9, w8, lt650; CHECK-GI-FP16-NEXT: mov w9, #-4096 // =0xfffff000651; CHECK-GI-FP16-NEXT: cmn w8, #1, lsl #12 // =4096652; CHECK-GI-FP16-NEXT: csel w0, w8, w9, gt653; CHECK-GI-FP16-NEXT: ret654 %x = call i13 @llvm.fptosi.sat.i13.f16(half %f)655 ret i13 %x656}657 658define i16 @test_signed_i16_f16(half %f) nounwind {659; CHECK-SD-CVT-LABEL: test_signed_i16_f16:660; CHECK-SD-CVT: // %bb.0:661; CHECK-SD-CVT-NEXT: fcvt s0, h0662; CHECK-SD-CVT-NEXT: mov w9, #32767 // =0x7fff663; CHECK-SD-CVT-NEXT: fcvtzs w8, s0664; CHECK-SD-CVT-NEXT: cmp w8, w9665; CHECK-SD-CVT-NEXT: csel w8, w8, w9, lt666; CHECK-SD-CVT-NEXT: mov w9, #-32768 // =0xffff8000667; CHECK-SD-CVT-NEXT: cmn w8, #8, lsl #12 // =32768668; CHECK-SD-CVT-NEXT: csel w0, w8, w9, gt669; CHECK-SD-CVT-NEXT: ret670;671; CHECK-SD-FP16-LABEL: test_signed_i16_f16:672; CHECK-SD-FP16: // %bb.0:673; CHECK-SD-FP16-NEXT: fcvtzs h0, h0674; CHECK-SD-FP16-NEXT: fmov w8, s0675; CHECK-SD-FP16-NEXT: sxth w0, w8676; CHECK-SD-FP16-NEXT: ret677;678; CHECK-GI-CVT-LABEL: test_signed_i16_f16:679; CHECK-GI-CVT: // %bb.0:680; CHECK-GI-CVT-NEXT: fcvt s0, h0681; CHECK-GI-CVT-NEXT: mov w9, #32767 // =0x7fff682; CHECK-GI-CVT-NEXT: fcvtzs w8, s0683; CHECK-GI-CVT-NEXT: cmp w8, w9684; CHECK-GI-CVT-NEXT: csel w8, w8, w9, lt685; CHECK-GI-CVT-NEXT: mov w9, #-32768 // =0xffff8000686; CHECK-GI-CVT-NEXT: cmn w8, #8, lsl #12 // =32768687; CHECK-GI-CVT-NEXT: csel w0, w8, w9, gt688; CHECK-GI-CVT-NEXT: ret689;690; CHECK-GI-FP16-LABEL: test_signed_i16_f16:691; CHECK-GI-FP16: // %bb.0:692; CHECK-GI-FP16-NEXT: fcvtzs h0, h0693; CHECK-GI-FP16-NEXT: fmov w0, s0694; CHECK-GI-FP16-NEXT: ret695 %x = call i16 @llvm.fptosi.sat.i16.f16(half %f)696 ret i16 %x697}698 699define i19 @test_signed_i19_f16(half %f) nounwind {700; CHECK-SD-CVT-LABEL: test_signed_i19_f16:701; CHECK-SD-CVT: // %bb.0:702; CHECK-SD-CVT-NEXT: fcvt s0, h0703; CHECK-SD-CVT-NEXT: mov w9, #262143 // =0x3ffff704; CHECK-SD-CVT-NEXT: fcvtzs w8, s0705; CHECK-SD-CVT-NEXT: cmp w8, w9706; CHECK-SD-CVT-NEXT: csel w8, w8, w9, lt707; CHECK-SD-CVT-NEXT: mov w9, #-262144 // =0xfffc0000708; CHECK-SD-CVT-NEXT: cmn w8, #64, lsl #12 // =262144709; CHECK-SD-CVT-NEXT: csel w0, w8, w9, gt710; CHECK-SD-CVT-NEXT: ret711;712; CHECK-SD-FP16-LABEL: test_signed_i19_f16:713; CHECK-SD-FP16: // %bb.0:714; CHECK-SD-FP16-NEXT: fcvtzs w8, h0715; CHECK-SD-FP16-NEXT: mov w9, #262143 // =0x3ffff716; CHECK-SD-FP16-NEXT: cmp w8, w9717; CHECK-SD-FP16-NEXT: csel w8, w8, w9, lt718; CHECK-SD-FP16-NEXT: mov w9, #-262144 // =0xfffc0000719; CHECK-SD-FP16-NEXT: cmn w8, #64, lsl #12 // =262144720; CHECK-SD-FP16-NEXT: csel w0, w8, w9, gt721; CHECK-SD-FP16-NEXT: ret722;723; CHECK-GI-CVT-LABEL: test_signed_i19_f16:724; CHECK-GI-CVT: // %bb.0:725; CHECK-GI-CVT-NEXT: fcvt s0, h0726; CHECK-GI-CVT-NEXT: mov w9, #262143 // =0x3ffff727; CHECK-GI-CVT-NEXT: fcvtzs w8, s0728; CHECK-GI-CVT-NEXT: cmp w8, w9729; CHECK-GI-CVT-NEXT: csel w8, w8, w9, lt730; CHECK-GI-CVT-NEXT: mov w9, #-262144 // =0xfffc0000731; CHECK-GI-CVT-NEXT: cmn w8, #64, lsl #12 // =262144732; CHECK-GI-CVT-NEXT: csel w0, w8, w9, gt733; CHECK-GI-CVT-NEXT: ret734;735; CHECK-GI-FP16-LABEL: test_signed_i19_f16:736; CHECK-GI-FP16: // %bb.0:737; CHECK-GI-FP16-NEXT: fcvtzs w8, h0738; CHECK-GI-FP16-NEXT: mov w9, #262143 // =0x3ffff739; CHECK-GI-FP16-NEXT: cmp w8, w9740; CHECK-GI-FP16-NEXT: csel w8, w8, w9, lt741; CHECK-GI-FP16-NEXT: mov w9, #-262144 // =0xfffc0000742; CHECK-GI-FP16-NEXT: cmn w8, #64, lsl #12 // =262144743; CHECK-GI-FP16-NEXT: csel w0, w8, w9, gt744; CHECK-GI-FP16-NEXT: ret745 %x = call i19 @llvm.fptosi.sat.i19.f16(half %f)746 ret i19 %x747}748 749define i32 @test_signed_i32_f16(half %f) nounwind {750; CHECK-SD-CVT-LABEL: test_signed_i32_f16:751; CHECK-SD-CVT: // %bb.0:752; CHECK-SD-CVT-NEXT: fcvt s0, h0753; CHECK-SD-CVT-NEXT: fcvtzs w0, s0754; CHECK-SD-CVT-NEXT: ret755;756; CHECK-SD-FP16-LABEL: test_signed_i32_f16:757; CHECK-SD-FP16: // %bb.0:758; CHECK-SD-FP16-NEXT: fcvtzs w0, h0759; CHECK-SD-FP16-NEXT: ret760;761; CHECK-GI-CVT-LABEL: test_signed_i32_f16:762; CHECK-GI-CVT: // %bb.0:763; CHECK-GI-CVT-NEXT: fcvt s0, h0764; CHECK-GI-CVT-NEXT: fcvtzs w0, s0765; CHECK-GI-CVT-NEXT: ret766;767; CHECK-GI-FP16-LABEL: test_signed_i32_f16:768; CHECK-GI-FP16: // %bb.0:769; CHECK-GI-FP16-NEXT: fcvtzs w0, h0770; CHECK-GI-FP16-NEXT: ret771 %x = call i32 @llvm.fptosi.sat.i32.f16(half %f)772 ret i32 %x773}774 775define i50 @test_signed_i50_f16(half %f) nounwind {776; CHECK-SD-CVT-LABEL: test_signed_i50_f16:777; CHECK-SD-CVT: // %bb.0:778; CHECK-SD-CVT-NEXT: fcvt s0, h0779; CHECK-SD-CVT-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff780; CHECK-SD-CVT-NEXT: fcvtzs x8, s0781; CHECK-SD-CVT-NEXT: cmp x8, x9782; CHECK-SD-CVT-NEXT: csel x8, x8, x9, lt783; CHECK-SD-CVT-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000784; CHECK-SD-CVT-NEXT: cmp x8, x9785; CHECK-SD-CVT-NEXT: csel x0, x8, x9, gt786; CHECK-SD-CVT-NEXT: ret787;788; CHECK-SD-FP16-LABEL: test_signed_i50_f16:789; CHECK-SD-FP16: // %bb.0:790; CHECK-SD-FP16-NEXT: fcvtzs x8, h0791; CHECK-SD-FP16-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff792; CHECK-SD-FP16-NEXT: cmp x8, x9793; CHECK-SD-FP16-NEXT: csel x8, x8, x9, lt794; CHECK-SD-FP16-NEXT: mov x9, #-562949953421312 // =0xfffe000000000000795; CHECK-SD-FP16-NEXT: cmp x8, x9796; CHECK-SD-FP16-NEXT: csel x0, x8, x9, gt797; CHECK-SD-FP16-NEXT: ret798;799; CHECK-GI-CVT-LABEL: test_signed_i50_f16:800; CHECK-GI-CVT: // %bb.0:801; CHECK-GI-CVT-NEXT: fcvt s0, h0802; CHECK-GI-CVT-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff803; CHECK-GI-CVT-NEXT: mov x10, #-562949953421312 // =0xfffe000000000000804; CHECK-GI-CVT-NEXT: fcvtzs x8, s0805; CHECK-GI-CVT-NEXT: cmp x8, x9806; CHECK-GI-CVT-NEXT: csel x8, x8, x9, lt807; CHECK-GI-CVT-NEXT: cmp x8, x10808; CHECK-GI-CVT-NEXT: csel x0, x8, x10, gt809; CHECK-GI-CVT-NEXT: ret810;811; CHECK-GI-FP16-LABEL: test_signed_i50_f16:812; CHECK-GI-FP16: // %bb.0:813; CHECK-GI-FP16-NEXT: fcvtzs x8, h0814; CHECK-GI-FP16-NEXT: mov x9, #562949953421311 // =0x1ffffffffffff815; CHECK-GI-FP16-NEXT: mov x10, #-562949953421312 // =0xfffe000000000000816; CHECK-GI-FP16-NEXT: cmp x8, x9817; CHECK-GI-FP16-NEXT: csel x8, x8, x9, lt818; CHECK-GI-FP16-NEXT: cmp x8, x10819; CHECK-GI-FP16-NEXT: csel x0, x8, x10, gt820; CHECK-GI-FP16-NEXT: ret821 %x = call i50 @llvm.fptosi.sat.i50.f16(half %f)822 ret i50 %x823}824 825define i64 @test_signed_i64_f16(half %f) nounwind {826; CHECK-SD-CVT-LABEL: test_signed_i64_f16:827; CHECK-SD-CVT: // %bb.0:828; CHECK-SD-CVT-NEXT: fcvt s0, h0829; CHECK-SD-CVT-NEXT: fcvtzs x0, s0830; CHECK-SD-CVT-NEXT: ret831;832; CHECK-SD-FP16-LABEL: test_signed_i64_f16:833; CHECK-SD-FP16: // %bb.0:834; CHECK-SD-FP16-NEXT: fcvtzs x0, h0835; CHECK-SD-FP16-NEXT: ret836;837; CHECK-GI-CVT-LABEL: test_signed_i64_f16:838; CHECK-GI-CVT: // %bb.0:839; CHECK-GI-CVT-NEXT: fcvt s0, h0840; CHECK-GI-CVT-NEXT: fcvtzs x0, s0841; CHECK-GI-CVT-NEXT: ret842;843; CHECK-GI-FP16-LABEL: test_signed_i64_f16:844; CHECK-GI-FP16: // %bb.0:845; CHECK-GI-FP16-NEXT: fcvtzs x0, h0846; CHECK-GI-FP16-NEXT: ret847 %x = call i64 @llvm.fptosi.sat.i64.f16(half %f)848 ret i64 %x849}850 851define i100 @test_signed_i100_f16(half %f) nounwind {852; CHECK-SD-LABEL: test_signed_i100_f16:853; CHECK-SD: // %bb.0:854; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill855; CHECK-SD-NEXT: fcvt s8, h0856; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill857; CHECK-SD-NEXT: fmov s0, s8858; CHECK-SD-NEXT: bl __fixsfti859; CHECK-SD-NEXT: movi v0.2s, #241, lsl #24860; CHECK-SD-NEXT: mov w8, #1895825407 // =0x70ffffff861; CHECK-SD-NEXT: mov x10, #34359738367 // =0x7ffffffff862; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload863; CHECK-SD-NEXT: fcmp s8, s0864; CHECK-SD-NEXT: fmov s0, w8865; CHECK-SD-NEXT: mov x8, #-34359738368 // =0xfffffff800000000866; CHECK-SD-NEXT: csel x9, xzr, x0, lt867; CHECK-SD-NEXT: csel x8, x8, x1, lt868; CHECK-SD-NEXT: fcmp s8, s0869; CHECK-SD-NEXT: csel x8, x10, x8, gt870; CHECK-SD-NEXT: csinv x9, x9, xzr, le871; CHECK-SD-NEXT: fcmp s8, s8872; CHECK-SD-NEXT: csel x0, xzr, x9, vs873; CHECK-SD-NEXT: csel x1, xzr, x8, vs874; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload875; CHECK-SD-NEXT: ret876;877; CHECK-GI-CVT-LABEL: test_signed_i100_f16:878; CHECK-GI-CVT: // %bb.0:879; CHECK-GI-CVT-NEXT: fcvt s0, h0880; CHECK-GI-CVT-NEXT: mov x1, xzr881; CHECK-GI-CVT-NEXT: fcvtzs x0, s0882; CHECK-GI-CVT-NEXT: ret883;884; CHECK-GI-FP16-LABEL: test_signed_i100_f16:885; CHECK-GI-FP16: // %bb.0:886; CHECK-GI-FP16-NEXT: fcvtzs x0, h0887; CHECK-GI-FP16-NEXT: mov x1, xzr888; CHECK-GI-FP16-NEXT: ret889 %x = call i100 @llvm.fptosi.sat.i100.f16(half %f)890 ret i100 %x891}892 893define i128 @test_signed_i128_f16(half %f) nounwind {894; CHECK-SD-LABEL: test_signed_i128_f16:895; CHECK-SD: // %bb.0:896; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill897; CHECK-SD-NEXT: fcvt s8, h0898; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill899; CHECK-SD-NEXT: fmov s0, s8900; CHECK-SD-NEXT: bl __fixsfti901; CHECK-SD-NEXT: movi v0.2s, #255, lsl #24902; CHECK-SD-NEXT: mov w8, #2130706431 // =0x7effffff903; CHECK-SD-NEXT: mov x10, #9223372036854775807 // =0x7fffffffffffffff904; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload905; CHECK-SD-NEXT: fcmp s8, s0906; CHECK-SD-NEXT: fmov s0, w8907; CHECK-SD-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000908; CHECK-SD-NEXT: csel x9, xzr, x0, lt909; CHECK-SD-NEXT: csel x8, x8, x1, lt910; CHECK-SD-NEXT: fcmp s8, s0911; CHECK-SD-NEXT: csel x8, x10, x8, gt912; CHECK-SD-NEXT: csinv x9, x9, xzr, le913; CHECK-SD-NEXT: fcmp s8, s8914; CHECK-SD-NEXT: csel x0, xzr, x9, vs915; CHECK-SD-NEXT: csel x1, xzr, x8, vs916; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload917; CHECK-SD-NEXT: ret918;919; CHECK-GI-CVT-LABEL: test_signed_i128_f16:920; CHECK-GI-CVT: // %bb.0:921; CHECK-GI-CVT-NEXT: fcvt s0, h0922; CHECK-GI-CVT-NEXT: mov x1, xzr923; CHECK-GI-CVT-NEXT: fcvtzs x0, s0924; CHECK-GI-CVT-NEXT: ret925;926; CHECK-GI-FP16-LABEL: test_signed_i128_f16:927; CHECK-GI-FP16: // %bb.0:928; CHECK-GI-FP16-NEXT: fcvtzs x0, h0929; CHECK-GI-FP16-NEXT: mov x1, xzr930; CHECK-GI-FP16-NEXT: ret931 %x = call i128 @llvm.fptosi.sat.i128.f16(half %f)932 ret i128 %x933}934 935define i32 @test_signed_f128_i32(fp128 %f) {936; CHECK-SD-LABEL: test_signed_f128_i32:937; CHECK-SD: // %bb.0:938; CHECK-SD-NEXT: sub sp, sp, #32939; CHECK-SD-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill940; CHECK-SD-NEXT: .cfi_def_cfa_offset 32941; CHECK-SD-NEXT: .cfi_offset w19, -8942; CHECK-SD-NEXT: .cfi_offset w30, -16943; CHECK-SD-NEXT: adrp x8, .LCPI30_0944; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill945; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI30_0]946; CHECK-SD-NEXT: bl __getf2947; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload948; CHECK-SD-NEXT: mov w19, w0949; CHECK-SD-NEXT: bl __fixtfsi950; CHECK-SD-NEXT: cmp w19, #0951; CHECK-SD-NEXT: mov w8, #-2147483648 // =0x80000000952; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload953; CHECK-SD-NEXT: csel w19, w8, w0, mi954; CHECK-SD-NEXT: adrp x8, .LCPI30_1955; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI30_1]956; CHECK-SD-NEXT: bl __gttf2957; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload958; CHECK-SD-NEXT: mov w8, #2147483647 // =0x7fffffff959; CHECK-SD-NEXT: cmp w0, #0960; CHECK-SD-NEXT: csel w19, w8, w19, gt961; CHECK-SD-NEXT: mov v1.16b, v0.16b962; CHECK-SD-NEXT: bl __unordtf2963; CHECK-SD-NEXT: cmp w0, #0964; CHECK-SD-NEXT: csel w0, wzr, w19, ne965; CHECK-SD-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload966; CHECK-SD-NEXT: add sp, sp, #32967; CHECK-SD-NEXT: ret968;969; CHECK-GI-LABEL: test_signed_f128_i32:970; CHECK-GI: // %bb.0:971; CHECK-GI-NEXT: sub sp, sp, #48972; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill973; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill974; CHECK-GI-NEXT: .cfi_def_cfa_offset 48975; CHECK-GI-NEXT: .cfi_offset w19, -8976; CHECK-GI-NEXT: .cfi_offset w20, -16977; CHECK-GI-NEXT: .cfi_offset w30, -32978; CHECK-GI-NEXT: adrp x8, .LCPI30_1979; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill980; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_1]981; CHECK-GI-NEXT: bl __gttf2982; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload983; CHECK-GI-NEXT: cmp w0, #0984; CHECK-GI-NEXT: mov x9, #-4603241769126068224 // =0xc01e000000000000985; CHECK-GI-NEXT: fmov x8, d0986; CHECK-GI-NEXT: csel x19, x8, xzr, gt987; CHECK-GI-NEXT: mov x8, v0.d[1]988; CHECK-GI-NEXT: mov v0.d[0], x19989; CHECK-GI-NEXT: csel x20, x8, x9, gt990; CHECK-GI-NEXT: adrp x8, .LCPI30_0991; CHECK-GI-NEXT: mov v0.d[1], x20992; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_0]993; CHECK-GI-NEXT: bl __lttf2994; CHECK-GI-NEXT: cmp w0, #0995; CHECK-GI-NEXT: csel x8, x19, xzr, mi996; CHECK-GI-NEXT: mov v0.d[0], x8997; CHECK-GI-NEXT: mov x8, #281474976448512 // =0xfffffffc0000998; CHECK-GI-NEXT: movk x8, #16413, lsl #48999; CHECK-GI-NEXT: csel x8, x20, x8, mi1000; CHECK-GI-NEXT: mov v0.d[1], x81001; CHECK-GI-NEXT: bl __fixtfsi1002; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload1003; CHECK-GI-NEXT: mov w19, w01004; CHECK-GI-NEXT: mov v1.16b, v0.16b1005; CHECK-GI-NEXT: bl __unordtf21006; CHECK-GI-NEXT: cmp w0, #01007; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload1008; CHECK-GI-NEXT: csel w0, wzr, w19, ne1009; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload1010; CHECK-GI-NEXT: add sp, sp, #481011; CHECK-GI-NEXT: ret1012 %x = call i32 @llvm.fptosi.sat.i32.f128(fp128 %f)1013 ret i32 %x1014}1015