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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-CVT3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP164; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-CVT5; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP166 7;8; 32-bit float to unsigned integer9;10 11declare i1 @llvm.fptoui.sat.i1.f32 (float)12declare i8 @llvm.fptoui.sat.i8.f32 (float)13declare i13 @llvm.fptoui.sat.i13.f32 (float)14declare i16 @llvm.fptoui.sat.i16.f32 (float)15declare i19 @llvm.fptoui.sat.i19.f32 (float)16declare i32 @llvm.fptoui.sat.i32.f32 (float)17declare i50 @llvm.fptoui.sat.i50.f32 (float)18declare i64 @llvm.fptoui.sat.i64.f32 (float)19declare i100 @llvm.fptoui.sat.i100.f32(float)20declare i128 @llvm.fptoui.sat.i128.f32(float)21 22define i1 @test_unsigned_i1_f32(float %f) nounwind {23; CHECK-SD-LABEL: test_unsigned_i1_f32:24; CHECK-SD: // %bb.0:25; CHECK-SD-NEXT: fcvtzu w8, s026; CHECK-SD-NEXT: cmp w8, #127; CHECK-SD-NEXT: csinc w0, w8, wzr, lo28; CHECK-SD-NEXT: ret29;30; CHECK-GI-LABEL: test_unsigned_i1_f32:31; CHECK-GI: // %bb.0:32; CHECK-GI-NEXT: fcvtzu w8, s033; CHECK-GI-NEXT: cmp w8, #134; CHECK-GI-NEXT: csinc w8, w8, wzr, lo35; CHECK-GI-NEXT: and w0, w8, #0x136; CHECK-GI-NEXT: ret37 %x = call i1 @llvm.fptoui.sat.i1.f32(float %f)38 ret i1 %x39}40 41define i8 @test_unsigned_i8_f32(float %f) nounwind {42; CHECK-LABEL: test_unsigned_i8_f32:43; CHECK: // %bb.0:44; CHECK-NEXT: fcvtzu w9, s045; CHECK-NEXT: mov w8, #255 // =0xff46; CHECK-NEXT: cmp w9, #25547; CHECK-NEXT: csel w0, w9, w8, lo48; CHECK-NEXT: ret49 %x = call i8 @llvm.fptoui.sat.i8.f32(float %f)50 ret i8 %x51}52 53define i13 @test_unsigned_i13_f32(float %f) nounwind {54; CHECK-LABEL: test_unsigned_i13_f32:55; CHECK: // %bb.0:56; CHECK-NEXT: fcvtzu w8, s057; CHECK-NEXT: mov w9, #8191 // =0x1fff58; CHECK-NEXT: cmp w8, w959; CHECK-NEXT: csel w0, w8, w9, lo60; CHECK-NEXT: ret61 %x = call i13 @llvm.fptoui.sat.i13.f32(float %f)62 ret i13 %x63}64 65define i16 @test_unsigned_i16_f32(float %f) nounwind {66; CHECK-LABEL: test_unsigned_i16_f32:67; CHECK: // %bb.0:68; CHECK-NEXT: fcvtzu w8, s069; CHECK-NEXT: mov w9, #65535 // =0xffff70; CHECK-NEXT: cmp w8, w971; CHECK-NEXT: csel w0, w8, w9, lo72; CHECK-NEXT: ret73 %x = call i16 @llvm.fptoui.sat.i16.f32(float %f)74 ret i16 %x75}76 77define i19 @test_unsigned_i19_f32(float %f) nounwind {78; CHECK-LABEL: test_unsigned_i19_f32:79; CHECK: // %bb.0:80; CHECK-NEXT: fcvtzu w8, s081; CHECK-NEXT: mov w9, #524287 // =0x7ffff82; CHECK-NEXT: cmp w8, w983; CHECK-NEXT: csel w0, w8, w9, lo84; CHECK-NEXT: ret85 %x = call i19 @llvm.fptoui.sat.i19.f32(float %f)86 ret i19 %x87}88 89define i32 @test_unsigned_i32_f32(float %f) nounwind {90; CHECK-LABEL: test_unsigned_i32_f32:91; CHECK: // %bb.0:92; CHECK-NEXT: fcvtzu w0, s093; CHECK-NEXT: ret94 %x = call i32 @llvm.fptoui.sat.i32.f32(float %f)95 ret i32 %x96}97 98define i50 @test_unsigned_i50_f32(float %f) nounwind {99; CHECK-LABEL: test_unsigned_i50_f32:100; CHECK: // %bb.0:101; CHECK-NEXT: fcvtzu x8, s0102; CHECK-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff103; CHECK-NEXT: cmp x8, x9104; CHECK-NEXT: csel x0, x8, x9, lo105; CHECK-NEXT: ret106 %x = call i50 @llvm.fptoui.sat.i50.f32(float %f)107 ret i50 %x108}109 110define i64 @test_unsigned_i64_f32(float %f) nounwind {111; CHECK-LABEL: test_unsigned_i64_f32:112; CHECK: // %bb.0:113; CHECK-NEXT: fcvtzu x0, s0114; CHECK-NEXT: ret115 %x = call i64 @llvm.fptoui.sat.i64.f32(float %f)116 ret i64 %x117}118 119define i100 @test_unsigned_i100_f32(float %f) nounwind {120; CHECK-SD-LABEL: test_unsigned_i100_f32:121; CHECK-SD: // %bb.0:122; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill123; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill124; CHECK-SD-NEXT: fmov s8, s0125; CHECK-SD-NEXT: bl __fixunssfti126; CHECK-SD-NEXT: mov w8, #1904214015 // =0x717fffff127; CHECK-SD-NEXT: fcmp s8, #0.0128; CHECK-SD-NEXT: mov x10, #68719476735 // =0xfffffffff129; CHECK-SD-NEXT: fmov s0, w8130; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload131; CHECK-SD-NEXT: csel x8, xzr, x0, lt132; CHECK-SD-NEXT: csel x9, xzr, x1, lt133; CHECK-SD-NEXT: fcmp s8, s0134; CHECK-SD-NEXT: csel x1, x10, x9, gt135; CHECK-SD-NEXT: csinv x0, x8, xzr, le136; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload137; CHECK-SD-NEXT: ret138;139; CHECK-GI-LABEL: test_unsigned_i100_f32:140; CHECK-GI: // %bb.0:141; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill142; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill143; CHECK-GI-NEXT: fmov s8, s0144; CHECK-GI-NEXT: bl __fixunssfti145; CHECK-GI-NEXT: mov w8, #1904214015 // =0x717fffff146; CHECK-GI-NEXT: fcmp s8, #0.0147; CHECK-GI-NEXT: mov x10, #68719476735 // =0xfffffffff148; CHECK-GI-NEXT: fmov s0, w8149; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload150; CHECK-GI-NEXT: csel x8, xzr, x0, lt151; CHECK-GI-NEXT: csel x9, xzr, x1, lt152; CHECK-GI-NEXT: fcmp s8, s0153; CHECK-GI-NEXT: csinv x0, x8, xzr, le154; CHECK-GI-NEXT: csel x1, x10, x9, gt155; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload156; CHECK-GI-NEXT: ret157 %x = call i100 @llvm.fptoui.sat.i100.f32(float %f)158 ret i100 %x159}160 161define i128 @test_unsigned_i128_f32(float %f) nounwind {162; CHECK-SD-LABEL: test_unsigned_i128_f32:163; CHECK-SD: // %bb.0:164; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill165; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill166; CHECK-SD-NEXT: fmov s8, s0167; CHECK-SD-NEXT: bl __fixunssfti168; CHECK-SD-NEXT: mov w8, #2139095039 // =0x7f7fffff169; CHECK-SD-NEXT: fcmp s8, #0.0170; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload171; CHECK-SD-NEXT: fmov s0, w8172; CHECK-SD-NEXT: csel x8, xzr, x1, lt173; CHECK-SD-NEXT: csel x9, xzr, x0, lt174; CHECK-SD-NEXT: fcmp s8, s0175; CHECK-SD-NEXT: csinv x0, x9, xzr, le176; CHECK-SD-NEXT: csinv x1, x8, xzr, le177; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload178; CHECK-SD-NEXT: ret179;180; CHECK-GI-LABEL: test_unsigned_i128_f32:181; CHECK-GI: // %bb.0:182; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill183; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill184; CHECK-GI-NEXT: fmov s8, s0185; CHECK-GI-NEXT: bl __fixunssfti186; CHECK-GI-NEXT: mov w8, #2139095039 // =0x7f7fffff187; CHECK-GI-NEXT: fcmp s8, #0.0188; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload189; CHECK-GI-NEXT: fmov s0, w8190; CHECK-GI-NEXT: csel x8, xzr, x0, lt191; CHECK-GI-NEXT: csel x9, xzr, x1, lt192; CHECK-GI-NEXT: fcmp s8, s0193; CHECK-GI-NEXT: csinv x0, x8, xzr, le194; CHECK-GI-NEXT: csinv x1, x9, xzr, le195; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload196; CHECK-GI-NEXT: ret197 %x = call i128 @llvm.fptoui.sat.i128.f32(float %f)198 ret i128 %x199}200 201;202; 64-bit float to unsigned integer203;204 205declare i1 @llvm.fptoui.sat.i1.f64 (double)206declare i8 @llvm.fptoui.sat.i8.f64 (double)207declare i13 @llvm.fptoui.sat.i13.f64 (double)208declare i16 @llvm.fptoui.sat.i16.f64 (double)209declare i19 @llvm.fptoui.sat.i19.f64 (double)210declare i32 @llvm.fptoui.sat.i32.f64 (double)211declare i50 @llvm.fptoui.sat.i50.f64 (double)212declare i64 @llvm.fptoui.sat.i64.f64 (double)213declare i100 @llvm.fptoui.sat.i100.f64(double)214declare i128 @llvm.fptoui.sat.i128.f64(double)215 216define i1 @test_unsigned_i1_f64(double %f) nounwind {217; CHECK-SD-LABEL: test_unsigned_i1_f64:218; CHECK-SD: // %bb.0:219; CHECK-SD-NEXT: fcvtzu w8, d0220; CHECK-SD-NEXT: cmp w8, #1221; CHECK-SD-NEXT: csinc w0, w8, wzr, lo222; CHECK-SD-NEXT: ret223;224; CHECK-GI-LABEL: test_unsigned_i1_f64:225; CHECK-GI: // %bb.0:226; CHECK-GI-NEXT: fcvtzu w8, d0227; CHECK-GI-NEXT: cmp w8, #1228; CHECK-GI-NEXT: csinc w8, w8, wzr, lo229; CHECK-GI-NEXT: and w0, w8, #0x1230; CHECK-GI-NEXT: ret231 %x = call i1 @llvm.fptoui.sat.i1.f64(double %f)232 ret i1 %x233}234 235define i8 @test_unsigned_i8_f64(double %f) nounwind {236; CHECK-LABEL: test_unsigned_i8_f64:237; CHECK: // %bb.0:238; CHECK-NEXT: fcvtzu w9, d0239; CHECK-NEXT: mov w8, #255 // =0xff240; CHECK-NEXT: cmp w9, #255241; CHECK-NEXT: csel w0, w9, w8, lo242; CHECK-NEXT: ret243 %x = call i8 @llvm.fptoui.sat.i8.f64(double %f)244 ret i8 %x245}246 247define i13 @test_unsigned_i13_f64(double %f) nounwind {248; CHECK-LABEL: test_unsigned_i13_f64:249; CHECK: // %bb.0:250; CHECK-NEXT: fcvtzu w8, d0251; CHECK-NEXT: mov w9, #8191 // =0x1fff252; CHECK-NEXT: cmp w8, w9253; CHECK-NEXT: csel w0, w8, w9, lo254; CHECK-NEXT: ret255 %x = call i13 @llvm.fptoui.sat.i13.f64(double %f)256 ret i13 %x257}258 259define i16 @test_unsigned_i16_f64(double %f) nounwind {260; CHECK-LABEL: test_unsigned_i16_f64:261; CHECK: // %bb.0:262; CHECK-NEXT: fcvtzu w8, d0263; CHECK-NEXT: mov w9, #65535 // =0xffff264; CHECK-NEXT: cmp w8, w9265; CHECK-NEXT: csel w0, w8, w9, lo266; CHECK-NEXT: ret267 %x = call i16 @llvm.fptoui.sat.i16.f64(double %f)268 ret i16 %x269}270 271define i19 @test_unsigned_i19_f64(double %f) nounwind {272; CHECK-LABEL: test_unsigned_i19_f64:273; CHECK: // %bb.0:274; CHECK-NEXT: fcvtzu w8, d0275; CHECK-NEXT: mov w9, #524287 // =0x7ffff276; CHECK-NEXT: cmp w8, w9277; CHECK-NEXT: csel w0, w8, w9, lo278; CHECK-NEXT: ret279 %x = call i19 @llvm.fptoui.sat.i19.f64(double %f)280 ret i19 %x281}282 283define i32 @test_unsigned_i32_f64(double %f) nounwind {284; CHECK-LABEL: test_unsigned_i32_f64:285; CHECK: // %bb.0:286; CHECK-NEXT: fcvtzu w0, d0287; CHECK-NEXT: ret288 %x = call i32 @llvm.fptoui.sat.i32.f64(double %f)289 ret i32 %x290}291 292define i50 @test_unsigned_i50_f64(double %f) nounwind {293; CHECK-LABEL: test_unsigned_i50_f64:294; CHECK: // %bb.0:295; CHECK-NEXT: fcvtzu x8, d0296; CHECK-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff297; CHECK-NEXT: cmp x8, x9298; CHECK-NEXT: csel x0, x8, x9, lo299; CHECK-NEXT: ret300 %x = call i50 @llvm.fptoui.sat.i50.f64(double %f)301 ret i50 %x302}303 304define i64 @test_unsigned_i64_f64(double %f) nounwind {305; CHECK-LABEL: test_unsigned_i64_f64:306; CHECK: // %bb.0:307; CHECK-NEXT: fcvtzu x0, d0308; CHECK-NEXT: ret309 %x = call i64 @llvm.fptoui.sat.i64.f64(double %f)310 ret i64 %x311}312 313define i100 @test_unsigned_i100_f64(double %f) nounwind {314; CHECK-SD-LABEL: test_unsigned_i100_f64:315; CHECK-SD: // %bb.0:316; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill317; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill318; CHECK-SD-NEXT: fmov d8, d0319; CHECK-SD-NEXT: bl __fixunsdfti320; CHECK-SD-NEXT: mov x8, #5057542381537067007 // =0x462fffffffffffff321; CHECK-SD-NEXT: fcmp d8, #0.0322; CHECK-SD-NEXT: mov x10, #68719476735 // =0xfffffffff323; CHECK-SD-NEXT: fmov d0, x8324; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload325; CHECK-SD-NEXT: csel x8, xzr, x0, lt326; CHECK-SD-NEXT: csel x9, xzr, x1, lt327; CHECK-SD-NEXT: fcmp d8, d0328; CHECK-SD-NEXT: csel x1, x10, x9, gt329; CHECK-SD-NEXT: csinv x0, x8, xzr, le330; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload331; CHECK-SD-NEXT: ret332;333; CHECK-GI-LABEL: test_unsigned_i100_f64:334; CHECK-GI: // %bb.0:335; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill336; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill337; CHECK-GI-NEXT: fmov d8, d0338; CHECK-GI-NEXT: bl __fixunsdfti339; CHECK-GI-NEXT: mov x8, #5057542381537067007 // =0x462fffffffffffff340; CHECK-GI-NEXT: fcmp d8, #0.0341; CHECK-GI-NEXT: mov x10, #68719476735 // =0xfffffffff342; CHECK-GI-NEXT: fmov d0, x8343; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload344; CHECK-GI-NEXT: csel x8, xzr, x0, lt345; CHECK-GI-NEXT: csel x9, xzr, x1, lt346; CHECK-GI-NEXT: fcmp d8, d0347; CHECK-GI-NEXT: csinv x0, x8, xzr, le348; CHECK-GI-NEXT: csel x1, x10, x9, gt349; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload350; CHECK-GI-NEXT: ret351 %x = call i100 @llvm.fptoui.sat.i100.f64(double %f)352 ret i100 %x353}354 355define i128 @test_unsigned_i128_f64(double %f) nounwind {356; CHECK-SD-LABEL: test_unsigned_i128_f64:357; CHECK-SD: // %bb.0:358; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill359; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill360; CHECK-SD-NEXT: fmov d8, d0361; CHECK-SD-NEXT: bl __fixunsdfti362; CHECK-SD-NEXT: mov x8, #5183643171103440895 // =0x47efffffffffffff363; CHECK-SD-NEXT: fcmp d8, #0.0364; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload365; CHECK-SD-NEXT: fmov d0, x8366; CHECK-SD-NEXT: csel x8, xzr, x1, lt367; CHECK-SD-NEXT: csel x9, xzr, x0, lt368; CHECK-SD-NEXT: fcmp d8, d0369; CHECK-SD-NEXT: csinv x0, x9, xzr, le370; CHECK-SD-NEXT: csinv x1, x8, xzr, le371; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload372; CHECK-SD-NEXT: ret373;374; CHECK-GI-LABEL: test_unsigned_i128_f64:375; CHECK-GI: // %bb.0:376; CHECK-GI-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill377; CHECK-GI-NEXT: str x30, [sp, #8] // 8-byte Spill378; CHECK-GI-NEXT: fmov d8, d0379; CHECK-GI-NEXT: bl __fixunsdfti380; CHECK-GI-NEXT: mov x8, #5183643171103440895 // =0x47efffffffffffff381; CHECK-GI-NEXT: fcmp d8, #0.0382; CHECK-GI-NEXT: ldr x30, [sp, #8] // 8-byte Reload383; CHECK-GI-NEXT: fmov d0, x8384; CHECK-GI-NEXT: csel x8, xzr, x0, lt385; CHECK-GI-NEXT: csel x9, xzr, x1, lt386; CHECK-GI-NEXT: fcmp d8, d0387; CHECK-GI-NEXT: csinv x0, x8, xzr, le388; CHECK-GI-NEXT: csinv x1, x9, xzr, le389; CHECK-GI-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload390; CHECK-GI-NEXT: ret391 %x = call i128 @llvm.fptoui.sat.i128.f64(double %f)392 ret i128 %x393}394 395;396; 16-bit float to unsigned integer397;398 399declare i1 @llvm.fptoui.sat.i1.f16 (half)400declare i8 @llvm.fptoui.sat.i8.f16 (half)401declare i13 @llvm.fptoui.sat.i13.f16 (half)402declare i16 @llvm.fptoui.sat.i16.f16 (half)403declare i19 @llvm.fptoui.sat.i19.f16 (half)404declare i32 @llvm.fptoui.sat.i32.f16 (half)405declare i50 @llvm.fptoui.sat.i50.f16 (half)406declare i64 @llvm.fptoui.sat.i64.f16 (half)407declare i100 @llvm.fptoui.sat.i100.f16(half)408declare i128 @llvm.fptoui.sat.i128.f16(half)409 410define i1 @test_unsigned_i1_f16(half %f) nounwind {411; CHECK-SD-CVT-LABEL: test_unsigned_i1_f16:412; CHECK-SD-CVT: // %bb.0:413; CHECK-SD-CVT-NEXT: fcvt s0, h0414; CHECK-SD-CVT-NEXT: fcvtzu w8, s0415; CHECK-SD-CVT-NEXT: cmp w8, #1416; CHECK-SD-CVT-NEXT: csinc w0, w8, wzr, lo417; CHECK-SD-CVT-NEXT: ret418;419; CHECK-SD-FP16-LABEL: test_unsigned_i1_f16:420; CHECK-SD-FP16: // %bb.0:421; CHECK-SD-FP16-NEXT: fcvtzu w8, h0422; CHECK-SD-FP16-NEXT: cmp w8, #1423; CHECK-SD-FP16-NEXT: csinc w0, w8, wzr, lo424; CHECK-SD-FP16-NEXT: ret425;426; CHECK-GI-CVT-LABEL: test_unsigned_i1_f16:427; CHECK-GI-CVT: // %bb.0:428; CHECK-GI-CVT-NEXT: fcvt s0, h0429; CHECK-GI-CVT-NEXT: fcvtzu w8, s0430; CHECK-GI-CVT-NEXT: cmp w8, #1431; CHECK-GI-CVT-NEXT: csinc w8, w8, wzr, lo432; CHECK-GI-CVT-NEXT: and w0, w8, #0x1433; CHECK-GI-CVT-NEXT: ret434;435; CHECK-GI-FP16-LABEL: test_unsigned_i1_f16:436; CHECK-GI-FP16: // %bb.0:437; CHECK-GI-FP16-NEXT: fcvtzu w8, h0438; CHECK-GI-FP16-NEXT: cmp w8, #1439; CHECK-GI-FP16-NEXT: csinc w8, w8, wzr, lo440; CHECK-GI-FP16-NEXT: and w0, w8, #0x1441; CHECK-GI-FP16-NEXT: ret442 %x = call i1 @llvm.fptoui.sat.i1.f16(half %f)443 ret i1 %x444}445 446define i8 @test_unsigned_i8_f16(half %f) nounwind {447; CHECK-SD-CVT-LABEL: test_unsigned_i8_f16:448; CHECK-SD-CVT: // %bb.0:449; CHECK-SD-CVT-NEXT: fcvt s0, h0450; CHECK-SD-CVT-NEXT: mov w8, #255 // =0xff451; CHECK-SD-CVT-NEXT: fcvtzu w9, s0452; CHECK-SD-CVT-NEXT: cmp w9, #255453; CHECK-SD-CVT-NEXT: csel w0, w9, w8, lo454; CHECK-SD-CVT-NEXT: ret455;456; CHECK-SD-FP16-LABEL: test_unsigned_i8_f16:457; CHECK-SD-FP16: // %bb.0:458; CHECK-SD-FP16-NEXT: fcvtzu w9, h0459; CHECK-SD-FP16-NEXT: mov w8, #255 // =0xff460; CHECK-SD-FP16-NEXT: cmp w9, #255461; CHECK-SD-FP16-NEXT: csel w0, w9, w8, lo462; CHECK-SD-FP16-NEXT: ret463;464; CHECK-GI-CVT-LABEL: test_unsigned_i8_f16:465; CHECK-GI-CVT: // %bb.0:466; CHECK-GI-CVT-NEXT: fcvt s0, h0467; CHECK-GI-CVT-NEXT: mov w8, #255 // =0xff468; CHECK-GI-CVT-NEXT: fcvtzu w9, s0469; CHECK-GI-CVT-NEXT: cmp w9, #255470; CHECK-GI-CVT-NEXT: csel w0, w9, w8, lo471; CHECK-GI-CVT-NEXT: ret472;473; CHECK-GI-FP16-LABEL: test_unsigned_i8_f16:474; CHECK-GI-FP16: // %bb.0:475; CHECK-GI-FP16-NEXT: fcvtzu w9, h0476; CHECK-GI-FP16-NEXT: mov w8, #255 // =0xff477; CHECK-GI-FP16-NEXT: cmp w9, #255478; CHECK-GI-FP16-NEXT: csel w0, w9, w8, lo479; CHECK-GI-FP16-NEXT: ret480 %x = call i8 @llvm.fptoui.sat.i8.f16(half %f)481 ret i8 %x482}483 484define i13 @test_unsigned_i13_f16(half %f) nounwind {485; CHECK-SD-CVT-LABEL: test_unsigned_i13_f16:486; CHECK-SD-CVT: // %bb.0:487; CHECK-SD-CVT-NEXT: fcvt s0, h0488; CHECK-SD-CVT-NEXT: mov w9, #8191 // =0x1fff489; CHECK-SD-CVT-NEXT: fcvtzu w8, s0490; CHECK-SD-CVT-NEXT: cmp w8, w9491; CHECK-SD-CVT-NEXT: csel w0, w8, w9, lo492; CHECK-SD-CVT-NEXT: ret493;494; CHECK-SD-FP16-LABEL: test_unsigned_i13_f16:495; CHECK-SD-FP16: // %bb.0:496; CHECK-SD-FP16-NEXT: fcvtzu w8, h0497; CHECK-SD-FP16-NEXT: mov w9, #8191 // =0x1fff498; CHECK-SD-FP16-NEXT: cmp w8, w9499; CHECK-SD-FP16-NEXT: csel w0, w8, w9, lo500; CHECK-SD-FP16-NEXT: ret501;502; CHECK-GI-CVT-LABEL: test_unsigned_i13_f16:503; CHECK-GI-CVT: // %bb.0:504; CHECK-GI-CVT-NEXT: fcvt s0, h0505; CHECK-GI-CVT-NEXT: mov w9, #8191 // =0x1fff506; CHECK-GI-CVT-NEXT: fcvtzu w8, s0507; CHECK-GI-CVT-NEXT: cmp w8, w9508; CHECK-GI-CVT-NEXT: csel w0, w8, w9, lo509; CHECK-GI-CVT-NEXT: ret510;511; CHECK-GI-FP16-LABEL: test_unsigned_i13_f16:512; CHECK-GI-FP16: // %bb.0:513; CHECK-GI-FP16-NEXT: fcvtzu w8, h0514; CHECK-GI-FP16-NEXT: mov w9, #8191 // =0x1fff515; CHECK-GI-FP16-NEXT: cmp w8, w9516; CHECK-GI-FP16-NEXT: csel w0, w8, w9, lo517; CHECK-GI-FP16-NEXT: ret518 %x = call i13 @llvm.fptoui.sat.i13.f16(half %f)519 ret i13 %x520}521 522define i16 @test_unsigned_i16_f16(half %f) nounwind {523; CHECK-SD-CVT-LABEL: test_unsigned_i16_f16:524; CHECK-SD-CVT: // %bb.0:525; CHECK-SD-CVT-NEXT: fcvt s0, h0526; CHECK-SD-CVT-NEXT: mov w9, #65535 // =0xffff527; CHECK-SD-CVT-NEXT: fcvtzu w8, s0528; CHECK-SD-CVT-NEXT: cmp w8, w9529; CHECK-SD-CVT-NEXT: csel w0, w8, w9, lo530; CHECK-SD-CVT-NEXT: ret531;532; CHECK-SD-FP16-LABEL: test_unsigned_i16_f16:533; CHECK-SD-FP16: // %bb.0:534; CHECK-SD-FP16-NEXT: fcvtzu h0, h0535; CHECK-SD-FP16-NEXT: fmov w0, s0536; CHECK-SD-FP16-NEXT: ret537;538; CHECK-GI-CVT-LABEL: test_unsigned_i16_f16:539; CHECK-GI-CVT: // %bb.0:540; CHECK-GI-CVT-NEXT: fcvt s0, h0541; CHECK-GI-CVT-NEXT: mov w9, #65535 // =0xffff542; CHECK-GI-CVT-NEXT: fcvtzu w8, s0543; CHECK-GI-CVT-NEXT: cmp w8, w9544; CHECK-GI-CVT-NEXT: csel w0, w8, w9, lo545; CHECK-GI-CVT-NEXT: ret546;547; CHECK-GI-FP16-LABEL: test_unsigned_i16_f16:548; CHECK-GI-FP16: // %bb.0:549; CHECK-GI-FP16-NEXT: fcvtzu h0, h0550; CHECK-GI-FP16-NEXT: fmov w0, s0551; CHECK-GI-FP16-NEXT: ret552 %x = call i16 @llvm.fptoui.sat.i16.f16(half %f)553 ret i16 %x554}555 556define i19 @test_unsigned_i19_f16(half %f) nounwind {557; CHECK-SD-CVT-LABEL: test_unsigned_i19_f16:558; CHECK-SD-CVT: // %bb.0:559; CHECK-SD-CVT-NEXT: fcvt s0, h0560; CHECK-SD-CVT-NEXT: mov w9, #524287 // =0x7ffff561; CHECK-SD-CVT-NEXT: fcvtzu w8, s0562; CHECK-SD-CVT-NEXT: cmp w8, w9563; CHECK-SD-CVT-NEXT: csel w0, w8, w9, lo564; CHECK-SD-CVT-NEXT: ret565;566; CHECK-SD-FP16-LABEL: test_unsigned_i19_f16:567; CHECK-SD-FP16: // %bb.0:568; CHECK-SD-FP16-NEXT: fcvtzu w8, h0569; CHECK-SD-FP16-NEXT: mov w9, #524287 // =0x7ffff570; CHECK-SD-FP16-NEXT: cmp w8, w9571; CHECK-SD-FP16-NEXT: csel w0, w8, w9, lo572; CHECK-SD-FP16-NEXT: ret573;574; CHECK-GI-CVT-LABEL: test_unsigned_i19_f16:575; CHECK-GI-CVT: // %bb.0:576; CHECK-GI-CVT-NEXT: fcvt s0, h0577; CHECK-GI-CVT-NEXT: mov w9, #524287 // =0x7ffff578; CHECK-GI-CVT-NEXT: fcvtzu w8, s0579; CHECK-GI-CVT-NEXT: cmp w8, w9580; CHECK-GI-CVT-NEXT: csel w0, w8, w9, lo581; CHECK-GI-CVT-NEXT: ret582;583; CHECK-GI-FP16-LABEL: test_unsigned_i19_f16:584; CHECK-GI-FP16: // %bb.0:585; CHECK-GI-FP16-NEXT: fcvtzu w8, h0586; CHECK-GI-FP16-NEXT: mov w9, #524287 // =0x7ffff587; CHECK-GI-FP16-NEXT: cmp w8, w9588; CHECK-GI-FP16-NEXT: csel w0, w8, w9, lo589; CHECK-GI-FP16-NEXT: ret590 %x = call i19 @llvm.fptoui.sat.i19.f16(half %f)591 ret i19 %x592}593 594define i32 @test_unsigned_i32_f16(half %f) nounwind {595; CHECK-SD-CVT-LABEL: test_unsigned_i32_f16:596; CHECK-SD-CVT: // %bb.0:597; CHECK-SD-CVT-NEXT: fcvt s0, h0598; CHECK-SD-CVT-NEXT: fcvtzu w0, s0599; CHECK-SD-CVT-NEXT: ret600;601; CHECK-SD-FP16-LABEL: test_unsigned_i32_f16:602; CHECK-SD-FP16: // %bb.0:603; CHECK-SD-FP16-NEXT: fcvtzu w0, h0604; CHECK-SD-FP16-NEXT: ret605;606; CHECK-GI-CVT-LABEL: test_unsigned_i32_f16:607; CHECK-GI-CVT: // %bb.0:608; CHECK-GI-CVT-NEXT: fcvt s0, h0609; CHECK-GI-CVT-NEXT: fcvtzu w0, s0610; CHECK-GI-CVT-NEXT: ret611;612; CHECK-GI-FP16-LABEL: test_unsigned_i32_f16:613; CHECK-GI-FP16: // %bb.0:614; CHECK-GI-FP16-NEXT: fcvtzu w0, h0615; CHECK-GI-FP16-NEXT: ret616 %x = call i32 @llvm.fptoui.sat.i32.f16(half %f)617 ret i32 %x618}619 620define i50 @test_unsigned_i50_f16(half %f) nounwind {621; CHECK-SD-CVT-LABEL: test_unsigned_i50_f16:622; CHECK-SD-CVT: // %bb.0:623; CHECK-SD-CVT-NEXT: fcvt s0, h0624; CHECK-SD-CVT-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff625; CHECK-SD-CVT-NEXT: fcvtzu x8, s0626; CHECK-SD-CVT-NEXT: cmp x8, x9627; CHECK-SD-CVT-NEXT: csel x0, x8, x9, lo628; CHECK-SD-CVT-NEXT: ret629;630; CHECK-SD-FP16-LABEL: test_unsigned_i50_f16:631; CHECK-SD-FP16: // %bb.0:632; CHECK-SD-FP16-NEXT: fcvtzu x8, h0633; CHECK-SD-FP16-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff634; CHECK-SD-FP16-NEXT: cmp x8, x9635; CHECK-SD-FP16-NEXT: csel x0, x8, x9, lo636; CHECK-SD-FP16-NEXT: ret637;638; CHECK-GI-CVT-LABEL: test_unsigned_i50_f16:639; CHECK-GI-CVT: // %bb.0:640; CHECK-GI-CVT-NEXT: fcvt s0, h0641; CHECK-GI-CVT-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff642; CHECK-GI-CVT-NEXT: fcvtzu x8, s0643; CHECK-GI-CVT-NEXT: cmp x8, x9644; CHECK-GI-CVT-NEXT: csel x0, x8, x9, lo645; CHECK-GI-CVT-NEXT: ret646;647; CHECK-GI-FP16-LABEL: test_unsigned_i50_f16:648; CHECK-GI-FP16: // %bb.0:649; CHECK-GI-FP16-NEXT: fcvtzu x8, h0650; CHECK-GI-FP16-NEXT: mov x9, #1125899906842623 // =0x3ffffffffffff651; CHECK-GI-FP16-NEXT: cmp x8, x9652; CHECK-GI-FP16-NEXT: csel x0, x8, x9, lo653; CHECK-GI-FP16-NEXT: ret654 %x = call i50 @llvm.fptoui.sat.i50.f16(half %f)655 ret i50 %x656}657 658define i64 @test_unsigned_i64_f16(half %f) nounwind {659; CHECK-SD-CVT-LABEL: test_unsigned_i64_f16:660; CHECK-SD-CVT: // %bb.0:661; CHECK-SD-CVT-NEXT: fcvt s0, h0662; CHECK-SD-CVT-NEXT: fcvtzu x0, s0663; CHECK-SD-CVT-NEXT: ret664;665; CHECK-SD-FP16-LABEL: test_unsigned_i64_f16:666; CHECK-SD-FP16: // %bb.0:667; CHECK-SD-FP16-NEXT: fcvtzu x0, h0668; CHECK-SD-FP16-NEXT: ret669;670; CHECK-GI-CVT-LABEL: test_unsigned_i64_f16:671; CHECK-GI-CVT: // %bb.0:672; CHECK-GI-CVT-NEXT: fcvt s0, h0673; CHECK-GI-CVT-NEXT: fcvtzu x0, s0674; CHECK-GI-CVT-NEXT: ret675;676; CHECK-GI-FP16-LABEL: test_unsigned_i64_f16:677; CHECK-GI-FP16: // %bb.0:678; CHECK-GI-FP16-NEXT: fcvtzu x0, h0679; CHECK-GI-FP16-NEXT: ret680 %x = call i64 @llvm.fptoui.sat.i64.f16(half %f)681 ret i64 %x682}683 684define i100 @test_unsigned_i100_f16(half %f) nounwind {685; CHECK-SD-LABEL: test_unsigned_i100_f16:686; CHECK-SD: // %bb.0:687; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill688; CHECK-SD-NEXT: fcvt s8, h0689; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill690; CHECK-SD-NEXT: fmov s0, s8691; CHECK-SD-NEXT: bl __fixunssfti692; CHECK-SD-NEXT: mov w8, #1904214015 // =0x717fffff693; CHECK-SD-NEXT: fcmp s8, #0.0694; CHECK-SD-NEXT: mov x10, #68719476735 // =0xfffffffff695; CHECK-SD-NEXT: fmov s0, w8696; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload697; CHECK-SD-NEXT: csel x8, xzr, x0, lt698; CHECK-SD-NEXT: csel x9, xzr, x1, lt699; CHECK-SD-NEXT: fcmp s8, s0700; CHECK-SD-NEXT: csel x1, x10, x9, gt701; CHECK-SD-NEXT: csinv x0, x8, xzr, le702; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload703; CHECK-SD-NEXT: ret704;705; CHECK-GI-CVT-LABEL: test_unsigned_i100_f16:706; CHECK-GI-CVT: // %bb.0:707; CHECK-GI-CVT-NEXT: fcvt s0, h0708; CHECK-GI-CVT-NEXT: mov x1, xzr709; CHECK-GI-CVT-NEXT: fcvtzu x0, s0710; CHECK-GI-CVT-NEXT: ret711;712; CHECK-GI-FP16-LABEL: test_unsigned_i100_f16:713; CHECK-GI-FP16: // %bb.0:714; CHECK-GI-FP16-NEXT: fcvtzu x0, h0715; CHECK-GI-FP16-NEXT: mov x1, xzr716; CHECK-GI-FP16-NEXT: ret717 %x = call i100 @llvm.fptoui.sat.i100.f16(half %f)718 ret i100 %x719}720 721define i128 @test_unsigned_i128_f16(half %f) nounwind {722; CHECK-SD-LABEL: test_unsigned_i128_f16:723; CHECK-SD: // %bb.0:724; CHECK-SD-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill725; CHECK-SD-NEXT: fcvt s8, h0726; CHECK-SD-NEXT: str x30, [sp, #8] // 8-byte Spill727; CHECK-SD-NEXT: fmov s0, s8728; CHECK-SD-NEXT: bl __fixunssfti729; CHECK-SD-NEXT: mov w8, #2139095039 // =0x7f7fffff730; CHECK-SD-NEXT: fcmp s8, #0.0731; CHECK-SD-NEXT: ldr x30, [sp, #8] // 8-byte Reload732; CHECK-SD-NEXT: fmov s0, w8733; CHECK-SD-NEXT: csel x8, xzr, x1, lt734; CHECK-SD-NEXT: csel x9, xzr, x0, lt735; CHECK-SD-NEXT: fcmp s8, s0736; CHECK-SD-NEXT: csinv x0, x9, xzr, le737; CHECK-SD-NEXT: csinv x1, x8, xzr, le738; CHECK-SD-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload739; CHECK-SD-NEXT: ret740;741; CHECK-GI-CVT-LABEL: test_unsigned_i128_f16:742; CHECK-GI-CVT: // %bb.0:743; CHECK-GI-CVT-NEXT: fcvt s0, h0744; CHECK-GI-CVT-NEXT: mov x1, xzr745; CHECK-GI-CVT-NEXT: fcvtzu x0, s0746; CHECK-GI-CVT-NEXT: ret747;748; CHECK-GI-FP16-LABEL: test_unsigned_i128_f16:749; CHECK-GI-FP16: // %bb.0:750; CHECK-GI-FP16-NEXT: fcvtzu x0, h0751; CHECK-GI-FP16-NEXT: mov x1, xzr752; CHECK-GI-FP16-NEXT: ret753 %x = call i128 @llvm.fptoui.sat.i128.f16(half %f)754 ret i128 %x755}756 757define i32 @test_unsigned_f128_i32(fp128 %f) {758; CHECK-SD-LABEL: test_unsigned_f128_i32:759; CHECK-SD: // %bb.0:760; CHECK-SD-NEXT: sub sp, sp, #32761; CHECK-SD-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill762; CHECK-SD-NEXT: .cfi_def_cfa_offset 32763; CHECK-SD-NEXT: .cfi_offset w19, -8764; CHECK-SD-NEXT: .cfi_offset w30, -16765; CHECK-SD-NEXT: adrp x8, .LCPI30_0766; CHECK-SD-NEXT: str q0, [sp] // 16-byte Spill767; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI30_0]768; CHECK-SD-NEXT: bl __getf2769; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload770; CHECK-SD-NEXT: mov w19, w0771; CHECK-SD-NEXT: bl __fixunstfsi772; CHECK-SD-NEXT: adrp x8, .LCPI30_1773; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Reload774; CHECK-SD-NEXT: cmp w19, #0775; CHECK-SD-NEXT: ldr q1, [x8, :lo12:.LCPI30_1]776; CHECK-SD-NEXT: csel w19, wzr, w0, mi777; CHECK-SD-NEXT: bl __gttf2778; CHECK-SD-NEXT: cmp w0, #0779; CHECK-SD-NEXT: csinv w0, w19, wzr, le780; CHECK-SD-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload781; CHECK-SD-NEXT: add sp, sp, #32782; CHECK-SD-NEXT: ret783;784; CHECK-GI-LABEL: test_unsigned_f128_i32:785; CHECK-GI: // %bb.0:786; CHECK-GI-NEXT: sub sp, sp, #48787; CHECK-GI-NEXT: str x30, [sp, #16] // 8-byte Spill788; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill789; CHECK-GI-NEXT: .cfi_def_cfa_offset 48790; CHECK-GI-NEXT: .cfi_offset w19, -8791; CHECK-GI-NEXT: .cfi_offset w20, -16792; CHECK-GI-NEXT: .cfi_offset w30, -32793; CHECK-GI-NEXT: adrp x8, .LCPI30_1794; CHECK-GI-NEXT: str q0, [sp] // 16-byte Spill795; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_1]796; CHECK-GI-NEXT: bl __gttf2797; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Reload798; CHECK-GI-NEXT: cmp w0, #0799; CHECK-GI-NEXT: fmov x8, d0800; CHECK-GI-NEXT: csel x19, x8, xzr, gt801; CHECK-GI-NEXT: mov x8, v0.d[1]802; CHECK-GI-NEXT: mov v0.d[0], x19803; CHECK-GI-NEXT: csel x20, x8, xzr, gt804; CHECK-GI-NEXT: adrp x8, .LCPI30_0805; CHECK-GI-NEXT: mov v0.d[1], x20806; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI30_0]807; CHECK-GI-NEXT: bl __lttf2808; CHECK-GI-NEXT: cmp w0, #0809; CHECK-GI-NEXT: ldr x30, [sp, #16] // 8-byte Reload810; CHECK-GI-NEXT: csel x8, x19, xzr, mi811; CHECK-GI-NEXT: mov v0.d[0], x8812; CHECK-GI-NEXT: mov x8, #281474976579584 // =0xfffffffe0000813; CHECK-GI-NEXT: movk x8, #16414, lsl #48814; CHECK-GI-NEXT: csel x8, x20, x8, mi815; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload816; CHECK-GI-NEXT: mov v0.d[1], x8817; CHECK-GI-NEXT: add sp, sp, #48818; CHECK-GI-NEXT: b __fixunstfsi819 %x = call i32 @llvm.fptoui.sat.i32.f128(fp128 %f)820 ret i32 %x821}822