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1# RUN: llc -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s2# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -start-before=prologepilog %s -o - | FileCheck %s --check-prefix=ASM3# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -aarch64-stack-hazard-in-non-streaming -aarch64-split-sve-objects -aarch64-streaming-hazard-size=1024 -start-before=prologepilog %s -filetype=obj -o %t4# RUN: llvm-objdump --dwarf=frames %t | FileCheck %s --check-prefix=UNWINDINFO5# RUN: rm -rf %t6#7# Test allocation and deallocation of SVE objects on the stack with8# split-sve-objects (and hazard padding) enabled. This also tests using a9# combination of scalable and non-scalable offsets to access the SVE on the10# stack.11#12# With split-sve-objects (which implies hazard padding) the SVE area is split13# into PPR and ZPR areas with (fixed-size) hazard padding between them. The PPR14# area holds all scalable predicate callee saves and locals, and the ZPR area15# holds all scalable vector callee saves and locals. Additionally, any FPR16# callee save is promoted to a ZPR callee save (to avoid needing additional17# hazard padding in the callee save area).18#19#     +-------------+20#     | stack arg   |21#     +-------------+ <- SP before call22#     | Callee Saves|23#     | Frame record|       (if available)24#     |-------------| <- FP (if available)25#     |  PPR area   |26#     |-------------|27#     |/////////////| hazard padding28#     |-------------|29#     |  ZPR area   |30#     +-------------+31#     |     :       |32#     | Stack objs  |33#     |     :       |34#     +-------------+ <- SP after call and frame-setup35#36--- |37 38  define void @test_allocate_split_sve() uwtable { entry: unreachable }39  define void @test_allocate_split_sve_realigned() uwtable { entry: unreachable }40  define void @test_address_split_sve() uwtable { entry: unreachable }41  define void @test_address_split_sve_fp() uwtable { entry: unreachable }42  define aarch64_sve_vector_pcs void @save_restore_ppr_zpr() uwtable { entry: unreachable }43 44...45---46# +----------+47# |scratchreg|  // x29 is used as scratch reg.48# |----------|49# | %stack.0 |  // scalable predicate of n * 12 bytes, aligned to 16 bytes50# |          |  // to be materialized with 1*ADDVL (<=> n * 16 bytes)51# |----------|52# |//////////|  // hazard padding (1024 bytes) -- part of PPR locals area53# |//////////|  // Note: This is currently not included in the "stackSize"54# +----------+55# | %stack.0 |  // scalable SVE object of n * 18 bytes, aligned to 16 bytes,56# |          |  // to be materialized with 2*ADDVL (<=> 2 * n * 16 bytes)57# +----------+58# |//////////|  // hazard padding (1024 bytes)59# |----------|60# | %stack.1 |  // not scalable61# +----------+ <- SP62 63# CHECK-LABEL: name: test_allocate_split_sve64# CHECK:       stackSize: 105665 66# CHECK:      bb.0.entry:67# CHECK:      liveins: $z0, $p0, $fp68# CHECK:      early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.4)69# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 1670# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -1671# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 2064, 072# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 208073# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -3, implicit $vg74# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x8f, 0xa0, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x2275#76# CHECK-NEXT: $x8 = ADDXri $sp, 1040, 077# CHECK-NEXT: $x8 = ADDPL_XXI $x8, 7, implicit $vg78# CHECK-NEXT: STR_ZXI $z0, killed $x8, 0 :: (store (<vscale x 1 x s128>) into %stack.0)79# CHECK-NEXT: $x8 = ADDXri $sp, 2064, 080# CHECK-NEXT: STR_PXI $p0, killed $x8, 18 :: (store (<vscale x 1 x s16>) into %stack.1)81#82# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 2064, 083# CHECK-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x2284# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 3, implicit $vg85# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $wsp, 1686# CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.4)87# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 088# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w2989# CHECK-NEXT: RET_ReallyLR90 91# ASM-LABEL: test_allocate_split_sve:92# ASM:       str x29, [sp, #-16]!93# ASM-NEXT:  .cfi_def_cfa_offset 1694# ASM-NEXT:  .cfi_offset w29, -1695# ASM-NEXT:  sub sp, sp, #206496# ASM-NEXT:  .cfi_def_cfa_offset 208097# ASM-NEXT:  addvl sp, sp, #-398# ASM-NEXT:  .cfi_escape 0x0f, 0x09, 0x8f, 0xa0, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 2080 + 24 * VG99#100# ASM:	     add sp, sp, #2064101# ASM-NEXT:  .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG102# ASM-NEXT:  addvl   sp, sp, #3103# ASM-NEXT:  .cfi_def_cfa wsp, 16104# ASM-NEXT:  ldr x29, [sp], #16105# ASM-NEXT:  .cfi_def_cfa_offset 0106# ASM-NEXT:  .cfi_restore w29107 108# UNWINDINFO:      DW_CFA_def_cfa_offset: +16109# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16110# UNWINDINFO:      DW_CFA_def_cfa_offset: +2080111# UNWINDINFO:      DW_CFA_def_cfa_expression: DW_OP_breg31 +2080, DW_OP_bregx 0x2e +0, DW_OP_lit24, DW_OP_mul, DW_OP_plus112#113# UNWINDINFO:      DW_CFA_def_cfa_expression: DW_OP_breg31 +16, DW_OP_bregx 0x2e +0, DW_OP_lit24, DW_OP_mul, DW_OP_plus114# UNWINDINFO:      DW_CFA_def_cfa: reg31 +16115# UNWINDINFO:      DW_CFA_def_cfa_offset: +0116# UNWINDINFO-NEXT: DW_CFA_restore: reg29117 118name:            test_allocate_split_sve119stack:120  - { id: 0, stack-id: scalable-vector, size: 18, alignment: 2 }121  - { id: 1, stack-id: scalable-vector, size: 12, alignment: 2 }122  - { id: 2, stack-id: default, size: 16, alignment: 8 }123body:             |124  bb.0.entry:125    liveins: $z0, $p0126    STR_ZXI $z0, %stack.0, 0 :: (store (<vscale x 1 x s128>) into %stack.0)127    STR_PXI $p0, %stack.1, 0 :: (store (<vscale x 1 x s16>) into %stack.1)128    RET_ReallyLR129...130---131 132# Stack realignment is not supported with split-sve-objects, so we fallback to133# the default hazard padding implementation. This does not prevent hazards134# between ZPRs and PPRs (TODO: support this case).135#136# +----------+137# |  lr, fp  |  // frame record138# |----------|139# |//////////|  // hazard padding (1024 bytes)140# |----------|141# | %stack.0 |  // scalable predicate of n * 12 bytes, aligned to 16 bytes142# |          |  // to be materialized with 1*ADDVL (<=> n * 16 bytes)143# +----------+144# | %stack.0 |  // scalable SVE object of n * 18 bytes, aligned to 16 bytes,145# |          |  // to be materialized with 2*ADDVL (<=> 2 * n * 16 bytes)146# +----------+147# |//////////|  // hazard padding (1024 bytes)148# |----------|149# | %stack.1 |  // not scalable150# +----------+ <- SP151 152name:            test_allocate_split_sve_realigned153stack:154  - { id: 0, stack-id: scalable-vector, size: 18, alignment: 2 }155  - { id: 1, stack-id: scalable-vector, size: 12, alignment: 2 }156  - { id: 2, stack-id: default, size: 16, alignment: 32 }157body:             |158  bb.0.entry:159    liveins: $z0, $p0160    STR_ZXI $z0, %stack.0, 0 :: (store (<vscale x 1 x s128>) into %stack.0)161    STR_PXI $p0, %stack.1, 0 :: (store (<vscale x 1 x s16>) into %stack.1)162    RET_ReallyLR163 164# CHECK-LABEL: name: test_allocate_split_sve_realigned165# CHECK:       stackSize: 1056166 167# CHECK:      bb.0.entry:168# CHECK:      liveins: $z0, $p0, $lr169# CHECK:      early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store (s64) into %stack.5), (store (s64) into %stack.4)170# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16171# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0172# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa $w29, 16173# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -8174# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16175# CHECK-NEXT: $[[TMP:x[0-9]+]] = frame-setup SUBXri $sp, 2064, 0176# CHECK-NEXT: $[[TMP]] = frame-setup ADDVL_XXI $x9, -3, implicit $vg177# CHECK-NEXT: $sp = frame-setup ANDXri killed $[[TMP]], 7930178#179# CHECK-NEXT: $x8 = SUBXri $fp, 1024, 0180# CHECK-NEXT: $x8 = ADDPL_XXI $x8, -1, implicit $vg181# CHECK-NEXT: STR_ZXI $z0, killed $x8, -2 :: (store (<vscale x 1 x s128>) into %stack.0)182# CHECK-NEXT: STR_PXI $p0, $fp, -6 :: (store (<vscale x 1 x s16>) into %stack.1)183#184# CHECK-NEXT: $sp = frame-destroy ADDXri $fp, 0, 0185# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $wsp, 16186# CHECK-NEXT: early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2 :: (load (s64) from %stack.5), (load (s64) from %stack.4)187# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0188# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w30189# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w29190# CHECK-NEXT: RET_ReallyLR191 192# ASM-LABEL: test_allocate_split_sve_realigned193# ASM:	     stp	x29, x30, [sp, #-16]!194# ASM-NEXT:  .cfi_def_cfa_offset 16195# ASM-NEXT:  mov	x29, sp196# ASM-NEXT:  .cfi_def_cfa w29, 16197# ASM-NEXT:  .cfi_offset w30, -8198# ASM-NEXT:  .cfi_offset w29, -16199#200# ASM:       mov	sp, x29201# ASM-NEXT:  .cfi_def_cfa wsp, 16202# ASM-NEXT:  ldp	x29, x30, [sp], #16203# ASM-NEXT:  .cfi_def_cfa_offset 0204# ASM-NEXT:  .cfi_restore w30205# ASM-NEXT:  .cfi_restore w29206 207# UNWINDINFO:       DW_CFA_def_cfa_offset: +16208# UNWINDINFO:       DW_CFA_def_cfa: reg29 +16209# UNWINDINFO-NEXT:  DW_CFA_offset: reg30 -8210# UNWINDINFO-NEXT:  DW_CFA_offset: reg29 -16211#212# UNWINDINFO:       DW_CFA_def_cfa: reg31 +16213# UNWINDINFO:       DW_CFA_def_cfa_offset: +0214# UNWINDINFO-NEXT:  DW_CFA_restore: reg30215# UNWINDINFO-NEXT:  DW_CFA_restore: reg29216...217---218 219# +----------+220# |scratchreg|  // x29 is used as scratch reg.221# +----------+222# | %stack.2 |  // scalable predicate @ SP + 2064b + 46 scalable bytes223# |----------|224# |//////////|  // hazard padding (1024 bytes) -- part of PPR locals area225# |//////////|  // Note: This is currently not included in the "stackSize"226# |----------|227# | %stack.0 |  // scalable vector @ SP + 1040b + 16 scalable bytes228# | %stack.1 |  // scalable vector @ SP + 1040b229# +----------+230# |//////////|  // hazard padding (1024 bytes)231# |----------|232# | %stack.3 |  // not scalable233# +----------+ <- SP234 235# CHECK-LABEL: name: test_address_split_sve236# CHECK:       stackSize: 1056237 238# CHECK:      bb.0.entry:239# CHECK-NEXT: liveins:240# CHECK-NEXT: {{  $}}241# CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.5)242# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16243# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16244# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 2064, 0245# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2080246# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -3, implicit $vg247# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x8f, 0xa0, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22248#249# CHECK-NEXT: $[[TMP:x[0-9]+]] = ADDXri $sp, 1040, 0250# CHECK-NEXT: STR_ZXI $z0, killed $[[TMP]], 1251# CHECK-NEXT: $[[TMP:x[0-9]+]] = ADDXri $sp, 1040, 0252# CHECK-NEXT: STR_ZXI $z1, killed $[[TMP]], 0253# CHECK-NEXT: $[[TMP:x[0-9]+]] = ADDXri $sp, 2064, 0254# CHECK-NEXT: STR_PXI $p0, killed $[[TMP]], 23255#256# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 2064, 0257# CHECK-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22258# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 3, implicit $vg259# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $wsp, 16260# CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.5)261# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0262# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w29263# CHECK-NEXT: RET_ReallyLR264 265# ASM-LABEL: test_address_split_sve266# ASM:       str x29, [sp, #-16]!267# ASM-NEXT:  .cfi_def_cfa_offset 16268# ASM-NEXT:  .cfi_offset w29, -16269# ASM-NEXT:  sub sp, sp, #2064270# ASM-NEXT:  .cfi_def_cfa_offset 2080271# ASM-NEXT:  addvl sp, sp, #-3272# ASM-NEXT:  .cfi_escape 0x0f, 0x09, 0x8f, 0xa0, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 2080 + 24 * VG273#274# ASM:       add sp, sp, #2064275# ASM-NEXT:  .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG276# ASM-NEXT:  addvl   sp, sp, #3277# ASM-NEXT:  .cfi_def_cfa wsp, 16278# ASM-NEXT:  ldr x29, [sp], #16279# ASM-NEXT:  .cfi_def_cfa_offset 0280# ASM-NEXT:  .cfi_restore w29281# ASM-NEXT:  ret282 283# UNWINDINFO: DW_CFA_def_cfa_offset: +16284# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16285# UNWINDINFO: DW_CFA_def_cfa_offset: +2080286# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +2080, DW_OP_bregx 0x2e +0, DW_OP_lit24, DW_OP_mul, DW_OP_plus287#288# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +16, DW_OP_bregx 0x2e +0, DW_OP_lit24, DW_OP_mul, DW_OP_plus289# UNWINDINFO: DW_CFA_def_cfa: reg31 +16290# UNWINDINFO: DW_CFA_def_cfa_offset: +0291# UNWINDINFO-NEXT: DW_CFA_restore: reg29292 293name:            test_address_split_sve294frameInfo:295  maxAlignment:  16296stack:297  - { id: 0, stack-id: scalable-vector, size: 16, alignment: 8 }298  - { id: 1, stack-id: scalable-vector, size: 16, alignment: 8 }299  - { id: 2, stack-id: scalable-vector, size:  2, alignment: 2 }300  - { id: 3, stack-id: default, size: 16, alignment: 8 }301body:             |302  bb.0.entry:303    liveins: $z0, $z1, $p0304 305    STR_ZXI $z0, %stack.0, 0 :: (store (<vscale x 1 x s128>) into %stack.0)306    STR_ZXI $z1, %stack.1, 0 :: (store (<vscale x 1 x s128>) into %stack.1)307    STR_PXI $p0, %stack.2, 0 :: (store (<vscale x 1 x s16>) into %stack.2)308 309    RET_ReallyLR310...311---312# +----------+313# |  lr, fp  |  // frame record314# +----------+ <- FP315# | %stack.2 |  // scalable predicate @ FP - 2 scalable bytes316# |----------|317# |//////////|  // hazard padding (1024 bytes) -- part of PPR locals area318# |//////////|  // Note: This is currently not included in the "stackSize"319# |----------|320# | %stack.0 |  // scalable vector @ FP - 1024b - 32 scalable bytes321# | %stack.1 |  // scalable vector @ FP - 1024b - 48 scalable bytes322# +----------+323# |//////////|  // hazard padding (1024 bytes)324# |----------|325# | %stack.3 |  // not scalable326# +----------+ <- SP327 328# CHECK-LABEL: name: test_address_split_sve_fp329# CHECK:       stackSize: 1056330#331# CHECK:      bb.0.entry:332# CHECK-NEXT: liveins:333# CHECK-NEXT: {{  $}}334# CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store (s64) into %stack.6), (store (s64) into %stack.5)335# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16336# CHECK-NEXT: $fp = frame-setup ADDXri $sp, 0, 0337# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa $w29, 16338# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -8339# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16340# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 2064, 0341# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -3, implicit $vg342#343# CHECK-NEXT: $[[TMP:x[0-9]+]] = SUBXri $fp, 1024, 0344# CHECK-NEXT: STR_ZXI $z0, killed $[[TMP]], -2345# CHECK-NEXT: $[[TMP:x[0-9]+]] = SUBXri $fp, 1024, 0346# CHECK-NEXT: STR_ZXI $z1, killed $[[TMP]], -3347# CHECK-NEXT: STR_PXI $p0, $fp, -1348#349# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 2064, 0350# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 3, implicit $vg351# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $wsp, 16352# CHECK-NEXT: early-clobber $sp, $fp, $lr = frame-destroy LDPXpost $sp, 2 :: (load (s64) from %stack.6), (load (s64) from %stack.5)353# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0354# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w30355# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w29356# CHECK-NEXT: RET_ReallyLR357 358# ASM-LABEL: test_address_split_sve_fp359# ASM:       stp x29, x30, [sp, #-16]!360# ASM-NEXT:  .cfi_def_cfa_offset 16361# ASM-NEXT:  mov x29, sp362# ASM-NEXT:  .cfi_def_cfa w29, 16363# ASM-NEXT:  .cfi_offset w30, -8364# ASM-NEXT:  .cfi_offset w29, -16365# ASM-NEXT:  sub sp, sp, #2064366# ASM-NEXT:  addvl sp, sp, #-3367#368# ASM:       add sp, sp, #2064369# ASM-NEXT:  addvl sp, sp, #3370# ASM-NEXT:  .cfi_def_cfa wsp, 16371# ASM-NEXT:  ldp x29, x30, [sp], #16372# ASM-NEXT:  .cfi_def_cfa_offset 0373# ASM-NEXT:  .cfi_restore w30374# ASM-NEXT:  .cfi_restore w29375 376# UNWINDINFO:      DW_CFA_def_cfa_offset: +16377# UNWINDINFO:      DW_CFA_def_cfa: reg29 +16378# UNWINDINFO-NEXT: DW_CFA_offset: reg30 -8379# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16380#381# UNWINDINFO:      DW_CFA_def_cfa: reg31 +16382# UNWINDINFO:      DW_CFA_def_cfa_offset: +0383# UNWINDINFO-NEXT: DW_CFA_restore: reg30384# UNWINDINFO-NEXT: DW_CFA_restore: reg29385 386name:            test_address_split_sve_fp387frameInfo:388  maxAlignment:  16389  isFrameAddressTaken: true390stack:391  - { id: 0, stack-id: scalable-vector, size: 16, alignment: 8 }392  - { id: 1, stack-id: scalable-vector, size: 16, alignment: 8 }393  - { id: 2, stack-id: scalable-vector, size:  2, alignment: 2 }394  - { id: 3, stack-id: default, size: 16, alignment: 8 }395body:             |396  bb.0.entry:397    liveins: $z0, $z1, $p0398 399    STR_ZXI $z0, %stack.0, 0 :: (store (<vscale x 1 x s128>) into %stack.0)400    STR_ZXI $z1, %stack.1, 0 :: (store (<vscale x 1 x s128>) into %stack.1)401    STR_PXI $p0, %stack.2, 0 :: (store (<vscale x 1 x s16>) into %stack.2)402 403    RET_ReallyLR404...405---406# CHECK-LABEL: name: save_restore_ppr_zpr407# CHECK: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.8)408# CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16409# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16410# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -1, implicit $vg411# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22412# CHECK-NEXT: frame-setup STR_PXI killed $p6, $sp, 5 :: (store (s16) into %stack.7)413# CHECK-NEXT: frame-setup STR_PXI killed $p5, $sp, 6 :: (store (s16) into %stack.6)414# CHECK-NEXT: frame-setup STR_PXI killed $p4, $sp, 7 :: (store (s16) into %stack.5)415#416# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 1024, 0417# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x8f, 0x90, 0x08, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22418#419# CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -3, implicit $vg420# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0a, 0x8f, 0x90, 0x08, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22421# CHECK-NEXT: frame-setup STR_ZXI killed $z10, $sp, 0 :: (store (s128) into %stack.4)422# CHECK-NEXT: frame-setup STR_ZXI killed $z9, $sp, 1 :: (store (s128) into %stack.3)423# CHECK-NEXT: frame-setup STR_ZXI killed $z8, $sp, 2 :: (store (s128) into %stack.2)424# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x10, 0x48, 0x0b, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x11, 0xf0, 0x77, 0x22425# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x10, 0x49, 0x0b, 0x92, 0x2e, 0x00, 0x11, 0x68, 0x1e, 0x22, 0x11, 0xf0, 0x77, 0x22426# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x10, 0x4a, 0x0b, 0x92, 0x2e, 0x00, 0x11, 0x60, 0x1e, 0x22, 0x11, 0xf0, 0x77, 0x22427# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 1056, 0428# CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0a, 0x8f, 0xb0, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22429#430#431# CHECK: $sp = frame-destroy ADDXri $sp, 1056, 0432# CHECK-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x0a, 0x8f, 0x90, 0x08, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22433# CHECK-NEXT: $z10 = frame-destroy LDR_ZXI $sp, 0 :: (load (s128) from %stack.4)434# CHECK-NEXT: $z9 = frame-destroy LDR_ZXI $sp, 1 :: (load (s128) from %stack.3)435# CHECK-NEXT: $z8 = frame-destroy LDR_ZXI $sp, 2 :: (load (s128) from %stack.2)436#437# CHECK-NEXT: $sp = frame-destroy ADDXri $sp, 1024, 0438# CHECK-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22439#440# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 3, implicit $vg441# CHECK-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22442# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $z8443# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $z9444# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $z10445# CHECK-NEXT: $p6 = frame-destroy LDR_PXI $sp, 5 :: (load (s16) from %stack.7)446# CHECK-NEXT: $p5 = frame-destroy LDR_PXI $sp, 6 :: (load (s16) from %stack.6)447# CHECK-NEXT: $p4 = frame-destroy LDR_PXI $sp, 7 :: (load (s16) from %stack.5)448# CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 1, implicit $vg449# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $wsp, 16450# CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.8)451# CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0452# CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w29453# CHECK-NEXT: RET_ReallyLR454 455# ASM-LABEL: save_restore_ppr_zpr:456# ASM:       str x29, [sp, #-16]!457# ASM-NEXT:  .cfi_def_cfa_offset 16458# ASM-NEXT:  .cfi_offset w29, -16459# ASM-NEXT:  addvl sp, sp, #-1460# ASM-NEXT:  .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG461# ASM-NEXT:  str p6, [sp, #5, mul vl]462# ASM-NEXT:  str p5, [sp, #6, mul vl]463# ASM-NEXT:  str p4, [sp, #7, mul vl]464# ASM-NEXT:  sub sp, sp, #1024465# ASM-NEXT:  .cfi_escape 0x0f, 0x09, 0x8f, 0x90, 0x08, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 1040 + 8 * VG466# ASM-NEXT:  addvl sp, sp, #-3467# ASM-NEXT:  .cfi_escape 0x0f, 0x0a, 0x8f, 0x90, 0x08, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 1040 + 32 * VG468# ASM-NEXT:  str z10, [sp]469# ASM-NEXT:  str z9, [sp, #1, mul vl]470# ASM-NEXT:  str z8, [sp, #2, mul vl]471# ASM-NEXT:  .cfi_escape 0x10, 0x48, 0x0b, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x11, 0xf0, 0x77, 0x22 // $d8  @ cfa - 16 * VG - 1040472# ASM-NEXT:  .cfi_escape 0x10, 0x49, 0x0b, 0x92, 0x2e, 0x00, 0x11, 0x68, 0x1e, 0x22, 0x11, 0xf0, 0x77, 0x22 // $d9  @ cfa - 24 * VG - 1040473# ASM-NEXT:  .cfi_escape 0x10, 0x4a, 0x0b, 0x92, 0x2e, 0x00, 0x11, 0x60, 0x1e, 0x22, 0x11, 0xf0, 0x77, 0x22 // $d10  @ cfa - 32 * VG - 1040474# ASM-NEXT:  sub sp, sp, #1056475# ASM-NEXT:  .cfi_escape 0x0f, 0x0a, 0x8f, 0xb0, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 2096 + 32 * VG476#477# ASM:       add sp, sp, #1056478# ASM-NEXT:  .cfi_escape 0x0f, 0x0a, 0x8f, 0x90, 0x08, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 1040 + 32 * VG479# ASM-NEXT:  ldr z10, [sp]480# ASM-NEXT:  ldr z9, [sp, #1, mul vl]481# ASM-NEXT:  ldr z8, [sp, #2, mul vl]482# ASM-NEXT:  add sp, sp, #1024483# ASM-NEXT:  .cfi_escape 0x0f, 0x09, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 16 + 32 * VG484# ASM-NEXT:  addvl   sp, sp, #3485# ASM-NEXT:  .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG486# ASM-NEXT:  .cfi_restore z8487# ASM-NEXT:  .cfi_restore z9488# ASM-NEXT:  .cfi_restore z10489# ASM-NEXT:  ldr p6, [sp, #5, mul vl]490# ASM-NEXT:  ldr p5, [sp, #6, mul vl]491# ASM-NEXT:  ldr p4, [sp, #7, mul vl]492# ASM-NEXT:  addvl sp, sp, #1493# ASM-NEXT:  .cfi_def_cfa wsp, 16494# ASM-NEXT:  ldr x29, [sp], #16495# ASM-NEXT:  .cfi_def_cfa_offset 0496# ASM-NEXT:  .cfi_restore w29497 498# UNWINDINFO: DW_CFA_def_cfa_offset: +16499# UNWINDINFO-NEXT: DW_CFA_offset: reg29 -16500# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +16, DW_OP_bregx 0x2e +0, DW_OP_lit8, DW_OP_mul, DW_OP_plus501# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +1040, DW_OP_bregx 0x2e +0, DW_OP_lit8, DW_OP_mul, DW_OP_plus502# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +1040, DW_OP_bregx 0x2e +0, DW_OP_consts +32, DW_OP_mul, DW_OP_plus503# UNWINDINFO: DW_CFA_expression: reg72 DW_OP_bregx 0x2e +0, DW_OP_consts -16, DW_OP_mul, DW_OP_plus, DW_OP_consts -1040, DW_OP_plus504# UNWINDINFO: DW_CFA_expression: reg73 DW_OP_bregx 0x2e +0, DW_OP_consts -24, DW_OP_mul, DW_OP_plus, DW_OP_consts -1040, DW_OP_plus505# UNWINDINFO: DW_CFA_expression: reg74 DW_OP_bregx 0x2e +0, DW_OP_consts -32, DW_OP_mul, DW_OP_plus, DW_OP_consts -1040, DW_OP_plus506# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +2096, DW_OP_bregx 0x2e +0, DW_OP_consts +32, DW_OP_mul, DW_OP_plus507#508# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +1040, DW_OP_bregx 0x2e +0, DW_OP_consts +32, DW_OP_mul, DW_OP_plus509# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +16, DW_OP_bregx 0x2e +0, DW_OP_consts +32, DW_OP_mul, DW_OP_plus510# UNWINDINFO: DW_CFA_def_cfa_expression: DW_OP_breg31 +16, DW_OP_bregx 0x2e +0, DW_OP_lit8, DW_OP_mul, DW_OP_plus511# UNWINDINFO-NEXT: DW_CFA_restore_extended: reg104512# UNWINDINFO-NEXT: DW_CFA_restore_extended: reg105513# UNWINDINFO-NEXT: DW_CFA_restore_extended: reg106514# UNWINDINFO: DW_CFA_def_cfa: reg31 +16515# UNWINDINFO: DW_CFA_def_cfa_offset: +0516# UNWINDINFO-NEXT: DW_CFA_restore: reg29517 518name: save_restore_ppr_zpr519stack:520  - { id: 0, stack-id: default, size: 32, alignment: 16 }521body:             |522  bb.0.entry:523 524    $p4 = IMPLICIT_DEF525    $p5 = IMPLICIT_DEF526    $p6 = IMPLICIT_DEF527    $z8 = IMPLICIT_DEF528    $z9 = IMPLICIT_DEF529    $z10 = IMPLICIT_DEF530 531    RET_ReallyLR532