80 lines · plain
1; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s2 3@var32 = dso_local global [3 x i32] zeroinitializer4@var64 = dso_local global [3 x i64] zeroinitializer5@var32_align64 = dso_local global [3 x i32] zeroinitializer, align 86@alias = dso_local alias [3 x i32], ptr @var32_align647 8define dso_local i64 @test_align32() {9; CHECK-LABEL: test_align32:10 11 ; Since @var32 is only guaranteed to be aligned to 32-bits, it's invalid to12 ; emit an "LDR x0, [x0, #:lo12:var32] instruction to implement this load.13 %val = load i64, ptr @var3214; CHECK: adrp [[HIBITS:x[0-9]+]], var3215; CHECK: add x[[ADDR:[0-9]+]], [[HIBITS]], {{#?}}:lo12:var3216; CHECK: ldr x0, [x[[ADDR]]]17 18 ret i64 %val19}20 21define dso_local i64 @test_align64() {22; CHECK-LABEL: test_align64:23 24 ; However, var64 *is* properly aligned and emitting an adrp/add/ldr would be25 ; inefficient.26 %val = load i64, ptr @var6427; CHECK: adrp x[[HIBITS:[0-9]+]], var6428; CHECK-NOT: add x[[HIBITS]]29; CHECK: ldr x0, [x[[HIBITS]], {{#?}}:lo12:var64]30 31 ret i64 %val32}33 34define dso_local i64 @test_var32_align64() {35; CHECK-LABEL: test_var32_align64:36 37 ; Since @var32 is only guaranteed to be aligned to 32-bits, it's invalid to38 ; emit an "LDR x0, [x0, #:lo12:var32] instruction to implement this load.39 %val = load i64, ptr @var32_align6440; CHECK: adrp x[[HIBITS:[0-9]+]], var32_align6441; CHECK-NOT: add x[[HIBITS]]42; CHECK: ldr x0, [x[[HIBITS]], {{#?}}:lo12:var32_align64]43 44 ret i64 %val45}46 47define dso_local i64 @test_var32_alias() {48; CHECK-LABEL: test_var32_alias:49 50 ; We don't know anything about the alignment of aliases.51 %val = load i64, ptr @alias52; CHECK: adrp x[[HIBITS:[0-9]+]], alias53; CHECK: add x[[ADDR:[0-9]+]], x[[HIBITS]], {{#?}}:lo12:alias54; CHECK: ldr x0, [x[[ADDR]]]55 56 ret i64 %val57}58 59@yet_another_var = external dso_local global {i32, i32}60 61define dso_local i64 @test_yet_another_var() {62; CHECK-LABEL: test_yet_another_var:63 64 ; @yet_another_var has a preferred alignment of 8, but that's not enough if65 ; we're going to be linking against other things. Its ABI alignment is only 466 ; so we can't fold the load.67 %val = load i64, ptr @yet_another_var68; CHECK: adrp [[HIBITS:x[0-9]+]], yet_another_var69; CHECK: add x[[ADDR:[0-9]+]], [[HIBITS]], {{#?}}:lo12:yet_another_var70; CHECK: ldr x0, [x[[ADDR]]]71 ret i64 %val72}73 74define dso_local ptr @test_functions() {75; CHECK-LABEL: test_functions:76 ret ptr @test_yet_another_var77; CHECK: adrp [[HIBITS:x[0-9]+]], test_yet_another_var78; CHECK: add x0, [[HIBITS]], {{#?}}:lo12:test_yet_another_var79}80