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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s3 4define void @test_load_store(ptr %in, ptr %out) {5; CHECK-LABEL: test_load_store:6; CHECK: // %bb.0:7; CHECK-NEXT: ldr h0, [x0]8; CHECK-NEXT: str h0, [x1]9; CHECK-NEXT: ret10 %val = load half, ptr %in11 store half %val, ptr %out12 ret void13}14 15define i16 @test_bitcast_from_half(ptr %addr) {16; CHECK-LABEL: test_bitcast_from_half:17; CHECK: // %bb.0:18; CHECK-NEXT: ldrh w0, [x0]19; CHECK-NEXT: ret20 %val = load half, ptr %addr21 %val_int = bitcast half %val to i1622 ret i16 %val_int23}24 25define i16 @test_reg_bitcast_from_half(half %in) {26; CHECK-LABEL: test_reg_bitcast_from_half:27; CHECK: // %bb.0:28; CHECK-NEXT: // kill: def $h0 killed $h0 def $s029; CHECK-NEXT: fmov w0, s030; CHECK-NEXT: ret31 %val = bitcast half %in to i1632 ret i16 %val33}34 35define void @test_bitcast_to_half(ptr %addr, i16 %in) {36; CHECK-LABEL: test_bitcast_to_half:37; CHECK: // %bb.0:38; CHECK-NEXT: strh w1, [x0]39; CHECK-NEXT: ret40 %val_fp = bitcast i16 %in to half41 store half %val_fp, ptr %addr42 ret void43}44 45define half @test_reg_bitcast_to_half(i16 %in) {46; CHECK-LABEL: test_reg_bitcast_to_half:47; CHECK: // %bb.0:48; CHECK-NEXT: fmov s0, w049; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s050; CHECK-NEXT: ret51 %val = bitcast i16 %in to half52 ret half %val53}54 55define float @test_extend32(ptr %addr) {56; CHECK-LABEL: test_extend32:57; CHECK: // %bb.0:58; CHECK-NEXT: ldr h0, [x0]59; CHECK-NEXT: fcvt s0, h060; CHECK-NEXT: ret61 %val16 = load half, ptr %addr62 %val32 = fpext half %val16 to float63 ret float %val3264}65 66define double @test_extend64(ptr %addr) {67; CHECK-LABEL: test_extend64:68; CHECK: // %bb.0:69; CHECK-NEXT: ldr h0, [x0]70; CHECK-NEXT: fcvt d0, h071; CHECK-NEXT: ret72 %val16 = load half, ptr %addr73 %val32 = fpext half %val16 to double74 ret double %val3275}76 77define void @test_trunc32(float %in, ptr %addr) {78; CHECK-LABEL: test_trunc32:79; CHECK: // %bb.0:80; CHECK-NEXT: fcvt h0, s081; CHECK-NEXT: str h0, [x0]82; CHECK-NEXT: ret83 %val16 = fptrunc float %in to half84 store half %val16, ptr %addr85 ret void86}87 88define void @test_trunc64(double %in, ptr %addr) {89; CHECK-LABEL: test_trunc64:90; CHECK: // %bb.0:91; CHECK-NEXT: fcvt h0, d092; CHECK-NEXT: str h0, [x0]93; CHECK-NEXT: ret94 %val16 = fptrunc double %in to half95 store half %val16, ptr %addr96 ret void97}98 99define i16 @test_fccmp(i1 %a, i16 %in) {100; CHECK-LABEL: test_fccmp:101; CHECK: // %bb.0:102; CHECK-NEXT: fmov s0, w1103; CHECK-NEXT: mov w8, #24576 // =0x6000104; CHECK-NEXT: movk w8, #15974, lsl #16105; CHECK-NEXT: fmov s1, w8106; CHECK-NEXT: mov w8, #16384 // =0x4000107; CHECK-NEXT: fcvt s0, h0108; CHECK-NEXT: movk w8, #15428, lsl #16109; CHECK-NEXT: fmov s2, w8110; CHECK-NEXT: mov w8, #4 // =0x4111; CHECK-NEXT: fcmp s0, s1112; CHECK-NEXT: fccmp s0, s2, #8, pl113; CHECK-NEXT: csinc w8, w8, wzr, mi114; CHECK-NEXT: fcmp s0, s1115; CHECK-NEXT: cinc w0, w8, pl116; CHECK-NEXT: ret117 %f16 = bitcast i16 %in to half118 %cmp0 = fcmp ogt half 0xH3333, %f16119 %cmp1 = fcmp ogt half 0xH2222, %f16120 %x = select i1 %cmp0, i16 0, i16 1121 %or = or i1 %cmp1, %cmp0122 %y = select i1 %or, i16 4, i16 1123 %r = add i16 %x, %y124 ret i16 %r125}126