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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3 4 5define i1 @lt8_u8(i8 %0) {6; CHECK-LABEL: lt8_u8:7; CHECK: // %bb.0:8; CHECK-NEXT: tst w0, #0xf89; CHECK-NEXT: cset w0, eq10; CHECK-NEXT: ret11 %2 = icmp ult i8 %0, 812 ret i1 %213}14 15define i1 @lt32_u8(i8 %0) {16; CHECK-LABEL: lt32_u8:17; CHECK: // %bb.0:18; CHECK-NEXT: tst w0, #0xe019; CHECK-NEXT: cset w0, eq20; CHECK-NEXT: ret21 %2 = icmp ult i8 %0, 3222 ret i1 %223}24 25define i1 @lt64_u8(i8 %0) {26; CHECK-LABEL: lt64_u8:27; CHECK: // %bb.0:28; CHECK-NEXT: tst w0, #0xc029; CHECK-NEXT: cset w0, eq30; CHECK-NEXT: ret31 %2 = icmp ult i8 %0, 6432 ret i1 %233}34 35define i1 @lt8_u32(i32 %0) {36; CHECK-LABEL: lt8_u32:37; CHECK: // %bb.0:38; CHECK-NEXT: cmp w0, #839; CHECK-NEXT: cset w0, lo40; CHECK-NEXT: ret41 %2 = icmp ult i32 %0, 842 ret i1 %243}44 45define i1 @lt32_u32(i32 %0) {46; CHECK-LABEL: lt32_u32:47; CHECK: // %bb.0:48; CHECK-NEXT: cmp w0, #3249; CHECK-NEXT: cset w0, lo50; CHECK-NEXT: ret51 %2 = icmp ult i32 %0, 3252 ret i1 %253}54 55define i1 @lt64_u32(i32 %0) {56; CHECK-LABEL: lt64_u32:57; CHECK: // %bb.0:58; CHECK-NEXT: cmp w0, #6459; CHECK-NEXT: cset w0, lo60; CHECK-NEXT: ret61 %2 = icmp ult i32 %0, 6462 ret i1 %263}64 65define i1 @lt8_u64(i64 %0) {66; CHECK-LABEL: lt8_u64:67; CHECK: // %bb.0:68; CHECK-NEXT: cmp x0, #869; CHECK-NEXT: cset w0, lo70; CHECK-NEXT: ret71 %2 = icmp ult i64 %0, 872 ret i1 %273}74 75define i1 @lt32_u64(i64 %0) {76; CHECK-LABEL: lt32_u64:77; CHECK: // %bb.0:78; CHECK-NEXT: cmp x0, #3279; CHECK-NEXT: cset w0, lo80; CHECK-NEXT: ret81 %2 = icmp ult i64 %0, 3282 ret i1 %283}84 85define i1 @lt64_u64(i64 %0) {86; CHECK-LABEL: lt64_u64:87; CHECK: // %bb.0:88; CHECK-NEXT: cmp x0, #6489; CHECK-NEXT: cset w0, lo90; CHECK-NEXT: ret91 %2 = icmp ult i64 %0, 6492 ret i1 %293}94 95define i1 @lt8_u16_and_5(i8 %0) {96; CHECK-LABEL: lt8_u16_and_5:97; CHECK: // %bb.0:98; CHECK-NEXT: mov w8, wzr99; CHECK-NEXT: cmp w8, #0100; CHECK-NEXT: cset w0, eq101; CHECK-NEXT: ret102 %2 = and i8 %0, 5103 %3 = icmp ult i8 %2, 16104 ret i1 %3105}106 107define i1 @lt8_u16_and_19(i8 %0) {108; CHECK-LABEL: lt8_u16_and_19:109; CHECK: // %bb.0:110; CHECK-NEXT: tst w0, #0x10111; CHECK-NEXT: cset w0, eq112; CHECK-NEXT: ret113 %2 = and i8 %0, 19114 %3 = icmp ult i8 %2, 16115 ret i1 %3116}117 118define i1 @lt32_u16_and_7(i32 %0) {119; CHECK-LABEL: lt32_u16_and_7:120; CHECK: // %bb.0:121; CHECK-NEXT: mov w8, wzr122; CHECK-NEXT: cmp w8, #0123; CHECK-NEXT: cset w0, eq124; CHECK-NEXT: ret125 %2 = and i32 %0, 7126 %3 = icmp ult i32 %2, 16127 ret i1 %3128}129 130define i1 @lt32_u16_and_21(i32 %0) {131; CHECK-LABEL: lt32_u16_and_21:132; CHECK: // %bb.0:133; CHECK-NEXT: tst w0, #0x10134; CHECK-NEXT: cset w0, eq135; CHECK-NEXT: ret136 %2 = and i32 %0, 21137 %3 = icmp ult i32 %2, 16138 ret i1 %3139}140 141define i1 @lt64_u16_and_9(i64 %0) {142; CHECK-LABEL: lt64_u16_and_9:143; CHECK: // %bb.0:144; CHECK-NEXT: mov x8, xzr145; CHECK-NEXT: cmp x8, #0146; CHECK-NEXT: cset w0, eq147; CHECK-NEXT: ret148 %2 = and i64 %0, 9149 %3 = icmp ult i64 %2, 16150 ret i1 %3151}152 153define i1 @lt64_u16_and_23(i64 %0) {154; CHECK-LABEL: lt64_u16_and_23:155; CHECK: // %bb.0:156; CHECK-NEXT: tst x0, #0x10157; CHECK-NEXT: cset w0, eq158; CHECK-NEXT: ret159 %2 = and i64 %0, 23160 %3 = icmp ult i64 %2, 16161 ret i1 %3162}163 164define i1 @test_disjoint(i1 %0, i32 %1, i32 %2) {165; CHECK-LABEL: test_disjoint:166; CHECK: // %bb.0: // %entry167; CHECK-NEXT: mov w8, #1 // =0x1168; CHECK-NEXT: orr w9, w2, #0x800000169; CHECK-NEXT: lsl w8, w8, w1170; CHECK-NEXT: tst w9, w8171; CHECK-NEXT: cset w8, eq172; CHECK-NEXT: orr w8, w0, w8173; CHECK-NEXT: and w0, w8, #0x1174; CHECK-NEXT: ret175entry:176 %3 = or disjoint i32 %2, 8388608177 %4 = shl nuw i32 1, %1178 %5 = and i32 %3, %4179 %6 = icmp eq i32 %5, 0180 %7 = select i1 %0, i1 true, i1 %6181 ret i1 %7182}183 184define i1 @test_disjoint2(i1 %0, i32 %1, i32 %2) {185; CHECK-LABEL: test_disjoint2:186; CHECK: // %bb.0: // %entry187; CHECK-NEXT: mov w8, #1 // =0x1188; CHECK-NEXT: orr w9, w2, #0x800000189; CHECK-NEXT: lsl w8, w8, w1190; CHECK-NEXT: tst w9, w8191; CHECK-NEXT: cset w8, gt192; CHECK-NEXT: orr w8, w0, w8193; CHECK-NEXT: and w0, w8, #0x1194; CHECK-NEXT: ret195entry:196 %3 = or disjoint i32 %2, 8388608197 %4 = shl nuw i32 1, %1198 %5 = and i32 %3, %4199 %6 = icmp sgt i32 %5, 0200 %7 = select i1 %0, i1 true, i1 %6201 ret i1 %7202}203 204define i1 @test_disjoint3(i1 %0, i32 %1, i32 %2) {205; CHECK-LABEL: test_disjoint3:206; CHECK: // %bb.0: // %entry207; CHECK-NEXT: mov w8, #1 // =0x1208; CHECK-NEXT: orr w9, w2, #0x800000209; CHECK-NEXT: lsl w8, w8, w1210; CHECK-NEXT: tst w9, w8211; CHECK-NEXT: cset w8, mi212; CHECK-NEXT: orr w8, w0, w8213; CHECK-NEXT: and w0, w8, #0x1214; CHECK-NEXT: ret215entry:216 %3 = or disjoint i32 %2, 8388608217 %4 = shl nuw i32 1, %1218 %5 = and i32 %3, %4219 %6 = icmp slt i32 %5, 0220 %7 = select i1 %0, i1 true, i1 %6221 ret i1 %7222}223 224define i1 @test_disjoint4(i1 %0, i32 %1, i32 %2) {225; CHECK-LABEL: test_disjoint4:226; CHECK: // %bb.0: // %entry227; CHECK-NEXT: mov w8, #1 // =0x1228; CHECK-NEXT: orr w9, w2, #0x800000229; CHECK-NEXT: lsl w8, w8, w1230; CHECK-NEXT: and w8, w9, w8231; CHECK-NEXT: cmp w8, #1232; CHECK-NEXT: cset w8, lt233; CHECK-NEXT: orr w8, w0, w8234; CHECK-NEXT: and w0, w8, #0x1235; CHECK-NEXT: ret236entry:237 %3 = or disjoint i32 %2, 8388608238 %4 = shl nuw i32 1, %1239 %5 = and i32 %3, %4240 %6 = icmp sle i32 %5, 0241 %7 = select i1 %0, i1 true, i1 %6242 ret i1 %7243}244 245define i1 @test_disjoint_inverse_4(i1 %0, i32 %1, i32 %2) {246; CHECK-LABEL: test_disjoint_inverse_4:247; CHECK: // %bb.0: // %entry248; CHECK-NEXT: mov w8, #1 // =0x1249; CHECK-NEXT: orr w9, w2, #0x800000250; CHECK-NEXT: lsl w8, w8, w1251; CHECK-NEXT: bic w8, w9, w8252; CHECK-NEXT: cmp w8, #1253; CHECK-NEXT: cset w8, lt254; CHECK-NEXT: orr w8, w0, w8255; CHECK-NEXT: and w0, w8, #0x1256; CHECK-NEXT: ret257entry:258 %3 = or disjoint i32 %2, 8388608259 %4 = shl nuw i32 1, %1260 %not = xor i32 %4, -1261 %5 = and i32 %3, %not262 %6 = icmp sle i32 %5, 0263 %7 = select i1 %0, i1 true, i1 %6264 ret i1 %7265}266 267define i1 @test_disjoint_inverse(i1 %0, i32 %1, i32 %2) {268; CHECK-LABEL: test_disjoint_inverse:269; CHECK: // %bb.0: // %entry270; CHECK-NEXT: mov w8, #1 // =0x1271; CHECK-NEXT: orr w9, w2, #0x800000272; CHECK-NEXT: lsl w8, w8, w1273; CHECK-NEXT: bics wzr, w9, w8274; CHECK-NEXT: cset w8, eq275; CHECK-NEXT: orr w8, w0, w8276; CHECK-NEXT: and w0, w8, #0x1277; CHECK-NEXT: ret278entry:279 %3 = or disjoint i32 %2, 8388608280 %4 = shl nuw i32 1, %1281 %not = xor i32 %4, -1282 %5 = and i32 %3, %not283 %6 = icmp eq i32 %5, 0284 %7 = select i1 %0, i1 true, i1 %6285 ret i1 %7286}287 288define i1 @test_disjoint2_inverse(i1 %0, i32 %1, i32 %2) {289; CHECK-LABEL: test_disjoint2_inverse:290; CHECK: // %bb.0: // %entry291; CHECK-NEXT: mov w8, #1 // =0x1292; CHECK-NEXT: orr w9, w2, #0x800000293; CHECK-NEXT: lsl w8, w8, w1294; CHECK-NEXT: bics wzr, w9, w8295; CHECK-NEXT: cset w8, gt296; CHECK-NEXT: orr w8, w0, w8297; CHECK-NEXT: and w0, w8, #0x1298; CHECK-NEXT: ret299entry:300 %3 = or disjoint i32 %2, 8388608301 %4 = shl nuw i32 1, %1302 %not = xor i32 %4, -1303 %5 = and i32 %3, %not304 %6 = icmp sgt i32 %5, 0305 %7 = select i1 %0, i1 true, i1 %6306 ret i1 %7307}308 309define i1 @test_disjoint3_inverse(i1 %0, i32 %1, i32 %2) {310; CHECK-LABEL: test_disjoint3_inverse:311; CHECK: // %bb.0: // %entry312; CHECK-NEXT: mov w8, #1 // =0x1313; CHECK-NEXT: orr w9, w2, #0x800000314; CHECK-NEXT: lsl w8, w8, w1315; CHECK-NEXT: bics wzr, w9, w8316; CHECK-NEXT: cset w8, mi317; CHECK-NEXT: orr w8, w0, w8318; CHECK-NEXT: and w0, w8, #0x1319; CHECK-NEXT: ret320entry:321 %3 = or disjoint i32 %2, 8388608322 %4 = shl nuw i32 1, %1323 %not = xor i32 %4, -1324 %5 = and i32 %3, %not325 %6 = icmp slt i32 %5, 0326 %7 = select i1 %0, i1 true, i1 %6327 ret i1 %7328}329 330define i1 @test_disjoint_64(i1 %0, i64 %1, i64 %2) {331; CHECK-LABEL: test_disjoint_64:332; CHECK: // %bb.0: // %entry333; CHECK-NEXT: mov w8, #1 // =0x1334; CHECK-NEXT: orr x9, x2, #0x80000000000000335; CHECK-NEXT: lsl x8, x8, x1336; CHECK-NEXT: tst x9, x8337; CHECK-NEXT: cset w8, eq338; CHECK-NEXT: orr w8, w0, w8339; CHECK-NEXT: and w0, w8, #0x1340; CHECK-NEXT: ret341entry:342 %3 = or disjoint i64 %2, 36028797018963968343 %4 = shl nuw i64 1, %1344 %5 = and i64 %3, %4345 %6 = icmp eq i64 %5, 0346 %7 = select i1 %0, i1 true, i1 %6347 ret i1 %7348}349 350define i1 @test_disjoint2_64(i1 %0, i64 %1, i64 %2) {351; CHECK-LABEL: test_disjoint2_64:352; CHECK: // %bb.0: // %entry353; CHECK-NEXT: mov w8, #1 // =0x1354; CHECK-NEXT: orr x9, x2, #0x80000000000000355; CHECK-NEXT: lsl x8, x8, x1356; CHECK-NEXT: tst x9, x8357; CHECK-NEXT: cset w8, gt358; CHECK-NEXT: orr w8, w0, w8359; CHECK-NEXT: and w0, w8, #0x1360; CHECK-NEXT: ret361entry:362 %3 = or disjoint i64 %2, 36028797018963968363 %4 = shl nuw i64 1, %1364 %5 = and i64 %3, %4365 %6 = icmp sgt i64 %5, 0366 %7 = select i1 %0, i1 true, i1 %6367 ret i1 %7368}369 370define i1 @test_disjoint3_64(i1 %0, i64 %1, i64 %2) {371; CHECK-LABEL: test_disjoint3_64:372; CHECK: // %bb.0: // %entry373; CHECK-NEXT: mov w8, #1 // =0x1374; CHECK-NEXT: orr x9, x2, #0x80000000000000375; CHECK-NEXT: lsl x8, x8, x1376; CHECK-NEXT: tst x9, x8377; CHECK-NEXT: cset w8, mi378; CHECK-NEXT: orr w8, w0, w8379; CHECK-NEXT: and w0, w8, #0x1380; CHECK-NEXT: ret381entry:382 %3 = or disjoint i64 %2, 36028797018963968383 %4 = shl nuw i64 1, %1384 %5 = and i64 %3, %4385 %6 = icmp slt i64 %5, 0386 %7 = select i1 %0, i1 true, i1 %6387 ret i1 %7388}389 390define i1 @test_disjoint4_64(i1 %0, i64 %1, i64 %2) {391; CHECK-LABEL: test_disjoint4_64:392; CHECK: // %bb.0: // %entry393; CHECK-NEXT: mov w8, #1 // =0x1394; CHECK-NEXT: orr x9, x2, #0x80000000000000395; CHECK-NEXT: lsl x8, x8, x1396; CHECK-NEXT: and x8, x9, x8397; CHECK-NEXT: cmp x8, #1398; CHECK-NEXT: cset w8, lt399; CHECK-NEXT: orr w8, w0, w8400; CHECK-NEXT: and w0, w8, #0x1401; CHECK-NEXT: ret402entry:403 %3 = or disjoint i64 %2, 36028797018963968404 %4 = shl nuw i64 1, %1405 %5 = and i64 %3, %4406 %6 = icmp sle i64 %5, 0407 %7 = select i1 %0, i1 true, i1 %6408 ret i1 %7409}410 411define i1 @test_disjoint_inverse_4_64(i1 %0, i64 %1, i64 %2) {412; CHECK-LABEL: test_disjoint_inverse_4_64:413; CHECK: // %bb.0: // %entry414; CHECK-NEXT: mov w8, #1 // =0x1415; CHECK-NEXT: orr x9, x2, #0x80000000000000416; CHECK-NEXT: lsl x8, x8, x1417; CHECK-NEXT: bic x8, x9, x8418; CHECK-NEXT: cmp x8, #1419; CHECK-NEXT: cset w8, lt420; CHECK-NEXT: orr w8, w0, w8421; CHECK-NEXT: and w0, w8, #0x1422; CHECK-NEXT: ret423entry:424 %3 = or disjoint i64 %2, 36028797018963968425 %4 = shl nuw i64 1, %1426 %not = xor i64 %4, -1427 %5 = and i64 %3, %not428 %6 = icmp sle i64 %5, 0429 %7 = select i1 %0, i1 true, i1 %6430 ret i1 %7431}432 433define i1 @test_disjoint_inverse_64(i1 %0, i64 %1, i64 %2) {434; CHECK-LABEL: test_disjoint_inverse_64:435; CHECK: // %bb.0: // %entry436; CHECK-NEXT: mov w8, #1 // =0x1437; CHECK-NEXT: orr x9, x2, #0x80000000000000438; CHECK-NEXT: lsl x8, x8, x1439; CHECK-NEXT: bics xzr, x9, x8440; CHECK-NEXT: cset w8, eq441; CHECK-NEXT: orr w8, w0, w8442; CHECK-NEXT: and w0, w8, #0x1443; CHECK-NEXT: ret444entry:445 %3 = or disjoint i64 %2, 36028797018963968446 %4 = shl nuw i64 1, %1447 %not = xor i64 %4, -1448 %5 = and i64 %3, %not449 %6 = icmp eq i64 %5, 0450 %7 = select i1 %0, i1 true, i1 %6451 ret i1 %7452}453 454define i1 @test_disjoint2_inverse_64(i1 %0, i64 %1, i64 %2) {455; CHECK-LABEL: test_disjoint2_inverse_64:456; CHECK: // %bb.0: // %entry457; CHECK-NEXT: mov w8, #1 // =0x1458; CHECK-NEXT: orr x9, x2, #0x80000000000000459; CHECK-NEXT: lsl x8, x8, x1460; CHECK-NEXT: bics xzr, x9, x8461; CHECK-NEXT: cset w8, gt462; CHECK-NEXT: orr w8, w0, w8463; CHECK-NEXT: and w0, w8, #0x1464; CHECK-NEXT: ret465entry:466 %3 = or disjoint i64 %2, 36028797018963968467 %4 = shl nuw i64 1, %1468 %not = xor i64 %4, -1469 %5 = and i64 %3, %not470 %6 = icmp sgt i64 %5, 0471 %7 = select i1 %0, i1 true, i1 %6472 ret i1 %7473}474 475define i1 @test_disjoint3_inverse_64(i1 %0, i64 %1, i64 %2) {476; CHECK-LABEL: test_disjoint3_inverse_64:477; CHECK: // %bb.0: // %entry478; CHECK-NEXT: mov w8, #1 // =0x1479; CHECK-NEXT: orr x9, x2, #0x80000000000000480; CHECK-NEXT: lsl x8, x8, x1481; CHECK-NEXT: bics xzr, x9, x8482; CHECK-NEXT: cset w8, mi483; CHECK-NEXT: orr w8, w0, w8484; CHECK-NEXT: and w0, w8, #0x1485; CHECK-NEXT: ret486entry:487 %3 = or disjoint i64 %2, 36028797018963968488 %4 = shl nuw i64 1, %1489 %not = xor i64 %4, -1490 %5 = and i64 %3, %not491 %6 = icmp slt i64 %5, 0492 %7 = select i1 %0, i1 true, i1 %6493 ret i1 %7494}495 496; negative test497define i1 @lt3_u8(i8 %0) {498; CHECK-LABEL: lt3_u8:499; CHECK: // %bb.0:500; CHECK-NEXT: and w8, w0, #0xff501; CHECK-NEXT: cmp w8, #3502; CHECK-NEXT: cset w0, lo503; CHECK-NEXT: ret504 %2 = icmp ult i8 %0, 3505 ret i1 %2506}507 508; negative test509define i1 @lt3_u32(i32 %0) {510; CHECK-LABEL: lt3_u32:511; CHECK: // %bb.0:512; CHECK-NEXT: cmp w0, #3513; CHECK-NEXT: cset w0, lo514; CHECK-NEXT: ret515 %2 = icmp ult i32 %0, 3516 ret i1 %2517}518 519; negative test520define i1 @lt3_u64(i64 %0) {521; CHECK-LABEL: lt3_u64:522; CHECK: // %bb.0:523; CHECK-NEXT: cmp x0, #3524; CHECK-NEXT: cset w0, lo525; CHECK-NEXT: ret526 %2 = icmp ult i64 %0, 3527 ret i1 %2528}529 530; negative test531define i32 @lt32_u16_multiple_use(i32 %0) {532; CHECK-LABEL: lt32_u16_multiple_use:533; CHECK: // %bb.0:534; CHECK-NEXT: mov w8, #21 // =0x15535; CHECK-NEXT: mov w9, #10 // =0xa536; CHECK-NEXT: and w8, w0, w8537; CHECK-NEXT: cmp w8, #16538; CHECK-NEXT: orr w8, w8, w9539; CHECK-NEXT: cset w10, lo540; CHECK-NEXT: mul w0, w8, w10541; CHECK-NEXT: ret542 %2 = and i32 %0, 21543 %3 = icmp ult i32 %2, 16544 %4 = add i32 %2, 10545 %5 = zext i1 %3 to i32546 %6 = mul i32 %4, %5547 ret i32 %6548}549