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1; RUN: llc -aarch64-load-store-renaming=true -verify-machineinstrs -mtriple=arm64-linux-gnu_ilp32 -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s2 3%va_list = type {ptr, ptr, ptr, i32, i32}4 5@var = dso_local global %va_list zeroinitializer, align 86 7declare void @llvm.va_start(ptr)8 9define dso_local void @test_simple(i32 %n, ...) {10; CHECK-LABEL: test_simple:11; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]12; CHECK: add x[[STACK_TOP:[0-9]+]], sp, #[[STACKSIZE]]13 14; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var15; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var16 17; CHECK-DAG: stp x6, x7, [sp, #18; ... omit middle ones ...19; CHECK-DAG: str x1, [sp, #[[GR_BASE:[0-9]+]]]20 21; CHECK-DAG: stp q0, q1, [sp]22; ... omit middle ones ...23; CHECK-DAG: stp q6, q7, [sp, #24 25; CHECK: str w[[STACK_TOP]], [x[[VA_LIST]]]26 27; CHECK: add x[[GR_TOPTMP:[0-9]+]], sp, #[[GR_BASE]]28; CHECK: add [[GR_TOP:w[0-9]+]], w[[GR_TOPTMP]], #5629 30 31; CHECK: mov x[[VR_TOPTMP:[0-9]+]], sp32; CHECK: add [[VR_TOP:w[0-9]+]], w[[VR_TOPTMP]], #12833; CHECK: stp [[GR_TOP]], [[VR_TOP]], [x[[VA_LIST]], #4]34 35; CHECK: mov [[GRVR:x[0-9]+]], #-5636; CHECK: movk [[GRVR]], #65408, lsl #3237; CHECK: stur [[GRVR]], [x[[VA_LIST]], #12]38 39 call void @llvm.va_start(ptr @var)40 41 ret void42}43 44define dso_local void @test_fewargs(i32 %n, i32 %n1, i32 %n2, float %m, ...) {45; CHECK-LABEL: test_fewargs:46; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]47; CHECK: add x[[STACK_TOP:[0-9]+]], sp, #[[STACKSIZE]]48 49; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var50; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var51 52; CHECK-DAG: stp x6, x7, [sp, #53; ... omit middle ones ...54; CHECK-DAG: str x3, [sp, #[[GR_BASE:[0-9]+]]]55 56; CHECK-DAG: stp q6, q7, [sp, #80]57; ... omit middle ones ...58; CHECK-DAG: str q1, [sp]59 60; CHECK: str w[[STACK_TOP]], [x[[VA_LIST]]]61 62; CHECK: add x[[GR_TOPTMP:[0-9]+]], sp, #[[GR_BASE]]63; CHECK: add [[GR_TOP:w[0-9]+]], w[[GR_TOPTMP]], #4064 65; CHECK: mov x[[VR_TOPTMP:[0-9]+]], sp66; CHECK: add [[VR_TOP:w[0-9]+]], w[[VR_TOPTMP]], #11267; CHECK: stp [[GR_TOP]], [[VR_TOP]], [x[[VA_LIST]], #4]68 69; CHECK: mov [[GRVR_OFFS:x[0-9]+]], #-4070; CHECK: movk [[GRVR_OFFS]], #65424, lsl #3271; CHECK: stur [[GRVR_OFFS]], [x[[VA_LIST]], #12]72 73 call void @llvm.va_start(ptr @var)74 75 ret void76}77 78define dso_local void @test_nospare([8 x i64], [8 x float], ...) {79; CHECK-LABEL: test_nospare:80 81 call void @llvm.va_start(ptr @var)82; CHECK-NOT: sub sp, sp83; CHECK: mov x[[STACK:[0-9]+]], sp84; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var85; CHECK: str w[[STACK]], [x[[VAR]]]86 87 ret void88}89 90; If there are non-variadic arguments on the stack (here two i64s) then the91; __stack field should point just past them.92define dso_local void @test_offsetstack([8 x i64], [2 x i64], [3 x float], ...) {93; CHECK-LABEL: test_offsetstack:94 95; CHECK-DAG: stp {{q[0-9]+}}, {{q[0-9]+}}, [sp, #48]96; CHECK-DAG: stp {{q[0-9]+}}, {{q[0-9]+}}, [sp, #16]97; CHECK-DAG: str {{q[0-9]+}}, [sp]98; CHECK-DAG: add x[[STACK_TOP:[0-9]+]], sp, #9699; CHECK-DAG: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var100; CHECK-DAG: str w[[STACK_TOP]], [x[[VAR]]]101 102 call void @llvm.va_start(ptr @var)103 ret void104}105 106declare void @llvm.va_end(ptr)107 108define dso_local void @test_va_end() nounwind {109; CHECK-LABEL: test_va_end:110; CHECK-NEXT: %bb.0111 112 call void @llvm.va_end(ptr @var)113 114 ret void115; CHECK-NEXT: ret116}117 118declare void @llvm.va_copy(ptr %dest, ptr %src)119 120@second_list = dso_local global %va_list zeroinitializer121 122define dso_local void @test_va_copy() {123; CHECK-LABEL: test_va_copy:124 call void @llvm.va_copy(ptr @second_list, ptr @var)125 126; CHECK: add x[[SRC:[0-9]+]], {{x[0-9]+}}, :lo12:var127 128; CHECK: ldr [[BLOCK:w[0-9]+]], [x[[SRC]], #16]129; CHECK: add x[[DST:[0-9]+]], {{x[0-9]+}}, :lo12:second_list130; CHECK: str [[BLOCK:w[0-9]+]], [x[[DST]], #16]131; CHECK: ldr [[BLOCK:q[0-9]+]], [x[[SRC]]]132; CHECK: str [[BLOCK:q[0-9]+]], [x[[DST]]]133 ret void134; CHECK: ret135}136