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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s3define i32 @test_cchi(i64 %a) {4; CHECK-LABEL: test_cchi:5; CHECK: // %bb.0: // %entry6; CHECK-NEXT: //APP7; CHECK-NEXT: subs x0, x0, #38; CHECK-NEXT: //NO_APP9; CHECK-NEXT: cset w0, hi10; CHECK-NEXT: ret11entry:12 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cchi},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)13 %asmresult1 = extractvalue { i64, i32 } %0, 114 %1 = icmp ult i32 %asmresult1, 215 tail call void @llvm.assume(i1 %1)16 ret i32 %asmresult117}18 19define i32 @test_cccs(i64 %a) {20; CHECK-LABEL: test_cccs:21; CHECK: // %bb.0: // %entry22; CHECK-NEXT: //APP23; CHECK-NEXT: subs x0, x0, #324; CHECK-NEXT: //NO_APP25; CHECK-NEXT: cset w0, hs26; CHECK-NEXT: ret27entry:28 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cccs},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)29 %asmresult1 = extractvalue { i64, i32 } %0, 130 %1 = icmp ult i32 %asmresult1, 231 tail call void @llvm.assume(i1 %1)32 ret i32 %asmresult133}34 35define i32 @test_cclo(i64 %a) {36; CHECK-LABEL: test_cclo:37; CHECK: // %bb.0: // %entry38; CHECK-NEXT: //APP39; CHECK-NEXT: subs x0, x0, #340; CHECK-NEXT: //NO_APP41; CHECK-NEXT: cset w0, lo42; CHECK-NEXT: ret43entry:44 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cclo},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)45 %asmresult1 = extractvalue { i64, i32 } %0, 146 %1 = icmp ult i32 %asmresult1, 247 tail call void @llvm.assume(i1 %1)48 ret i32 %asmresult149}50 51define i32 @test_ccls(i64 %a) {52; CHECK-LABEL: test_ccls:53; CHECK: // %bb.0: // %entry54; CHECK-NEXT: //APP55; CHECK-NEXT: subs x0, x0, #356; CHECK-NEXT: //NO_APP57; CHECK-NEXT: cset w0, ls58; CHECK-NEXT: ret59entry:60 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccls},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)61 %asmresult1 = extractvalue { i64, i32 } %0, 162 %1 = icmp ult i32 %asmresult1, 263 tail call void @llvm.assume(i1 %1)64 ret i32 %asmresult165}66 67define i32 @test_cccc(i64 %a) {68; CHECK-LABEL: test_cccc:69; CHECK: // %bb.0: // %entry70; CHECK-NEXT: //APP71; CHECK-NEXT: subs x0, x0, #372; CHECK-NEXT: //NO_APP73; CHECK-NEXT: cset w0, lo74; CHECK-NEXT: ret75entry:76 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cccc},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)77 %asmresult1 = extractvalue { i64, i32 } %0, 178 %1 = icmp ult i32 %asmresult1, 279 tail call void @llvm.assume(i1 %1)80 ret i32 %asmresult181}82 83define i32 @test_cceq(i64 %a) {84; CHECK-LABEL: test_cceq:85; CHECK: // %bb.0: // %entry86; CHECK-NEXT: //APP87; CHECK-NEXT: subs x0, x0, #388; CHECK-NEXT: //NO_APP89; CHECK-NEXT: cset w0, eq90; CHECK-NEXT: ret91entry:92 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cceq},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)93 %asmresult1 = extractvalue { i64, i32 } %0, 194 %1 = icmp ult i32 %asmresult1, 295 tail call void @llvm.assume(i1 %1)96 ret i32 %asmresult197}98 99define i32 @test_ccgt(i64 %a) {100; CHECK-LABEL: test_ccgt:101; CHECK: // %bb.0: // %entry102; CHECK-NEXT: //APP103; CHECK-NEXT: subs x0, x0, #3104; CHECK-NEXT: //NO_APP105; CHECK-NEXT: cset w0, gt106; CHECK-NEXT: ret107entry:108 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccgt},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)109 %asmresult1 = extractvalue { i64, i32 } %0, 1110 %1 = icmp ult i32 %asmresult1, 2111 tail call void @llvm.assume(i1 %1)112 ret i32 %asmresult1113}114 115define i32 @test_ccge(i64 %a) {116; CHECK-LABEL: test_ccge:117; CHECK: // %bb.0: // %entry118; CHECK-NEXT: //APP119; CHECK-NEXT: subs x0, x0, #3120; CHECK-NEXT: //NO_APP121; CHECK-NEXT: cset w0, ge122; CHECK-NEXT: ret123entry:124 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccge},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)125 %asmresult1 = extractvalue { i64, i32 } %0, 1126 %1 = icmp ult i32 %asmresult1, 2127 tail call void @llvm.assume(i1 %1)128 ret i32 %asmresult1129}130 131define i32 @test_cclt(i64 %a) {132; CHECK-LABEL: test_cclt:133; CHECK: // %bb.0: // %entry134; CHECK-NEXT: //APP135; CHECK-NEXT: subs x0, x0, #3136; CHECK-NEXT: //NO_APP137; CHECK-NEXT: cset w0, lt138; CHECK-NEXT: ret139entry:140 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cclt},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)141 %asmresult1 = extractvalue { i64, i32 } %0, 1142 %1 = icmp ult i32 %asmresult1, 2143 tail call void @llvm.assume(i1 %1)144 ret i32 %asmresult1145}146 147define i32 @test_ccle(i64 %a) {148; CHECK-LABEL: test_ccle:149; CHECK: // %bb.0: // %entry150; CHECK-NEXT: //APP151; CHECK-NEXT: subs x0, x0, #3152; CHECK-NEXT: //NO_APP153; CHECK-NEXT: cset w0, le154; CHECK-NEXT: ret155entry:156 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccle},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)157 %asmresult1 = extractvalue { i64, i32 } %0, 1158 %1 = icmp ult i32 %asmresult1, 2159 tail call void @llvm.assume(i1 %1)160 ret i32 %asmresult1161}162 163define i32 @test_cchs(i64 %a) {164; CHECK-LABEL: test_cchs:165; CHECK: // %bb.0: // %entry166; CHECK-NEXT: //APP167; CHECK-NEXT: subs x0, x0, #3168; CHECK-NEXT: //NO_APP169; CHECK-NEXT: cset w0, hs170; CHECK-NEXT: ret171entry:172 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cchs},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)173 %asmresult1 = extractvalue { i64, i32 } %0, 1174 %1 = icmp ult i32 %asmresult1, 2175 tail call void @llvm.assume(i1 %1)176 ret i32 %asmresult1177}178 179define i32 @test_ccne(i64 %a) {180; CHECK-LABEL: test_ccne:181; CHECK: // %bb.0: // %entry182; CHECK-NEXT: //APP183; CHECK-NEXT: subs x0, x0, #3184; CHECK-NEXT: //NO_APP185; CHECK-NEXT: cset w0, ne186; CHECK-NEXT: ret187entry:188 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccne},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)189 %asmresult1 = extractvalue { i64, i32 } %0, 1190 %1 = icmp ult i32 %asmresult1, 2191 tail call void @llvm.assume(i1 %1)192 ret i32 %asmresult1193}194 195define i32 @test_ccvc(i64 %a) {196; CHECK-LABEL: test_ccvc:197; CHECK: // %bb.0: // %entry198; CHECK-NEXT: //APP199; CHECK-NEXT: subs x0, x0, #3200; CHECK-NEXT: //NO_APP201; CHECK-NEXT: cset w0, vc202; CHECK-NEXT: ret203entry:204 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccvc},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)205 %asmresult1 = extractvalue { i64, i32 } %0, 1206 %1 = icmp ult i32 %asmresult1, 2207 tail call void @llvm.assume(i1 %1)208 ret i32 %asmresult1209}210 211define i32 @test_ccpl(i64 %a) {212; CHECK-LABEL: test_ccpl:213; CHECK: // %bb.0: // %entry214; CHECK-NEXT: //APP215; CHECK-NEXT: subs x0, x0, #3216; CHECK-NEXT: //NO_APP217; CHECK-NEXT: cset w0, pl218; CHECK-NEXT: ret219entry:220 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccpl},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)221 %asmresult1 = extractvalue { i64, i32 } %0, 1222 %1 = icmp ult i32 %asmresult1, 2223 tail call void @llvm.assume(i1 %1)224 ret i32 %asmresult1225}226 227define i32 @test_ccvs(i64 %a) {228; CHECK-LABEL: test_ccvs:229; CHECK: // %bb.0: // %entry230; CHECK-NEXT: //APP231; CHECK-NEXT: subs x0, x0, #3232; CHECK-NEXT: //NO_APP233; CHECK-NEXT: cset w0, vs234; CHECK-NEXT: ret235entry:236 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccvs},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)237 %asmresult1 = extractvalue { i64, i32 } %0, 1238 %1 = icmp ult i32 %asmresult1, 2239 tail call void @llvm.assume(i1 %1)240 ret i32 %asmresult1241}242 243define i32 @test_ccmi(i64 %a) {244; CHECK-LABEL: test_ccmi:245; CHECK: // %bb.0: // %entry246; CHECK-NEXT: //APP247; CHECK-NEXT: subs x0, x0, #3248; CHECK-NEXT: //NO_APP249; CHECK-NEXT: cset w0, mi250; CHECK-NEXT: ret251entry:252 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@ccmi},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)253 %asmresult1 = extractvalue { i64, i32 } %0, 1254 %1 = icmp ult i32 %asmresult1, 2255 tail call void @llvm.assume(i1 %1)256 ret i32 %asmresult1257}258 259declare void @llvm.assume(i1)260