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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -o - | FileCheck %s3 4target triple = "arm64-none-linux-gnu"5 6define void @test_constraints_Uci_w(i32 %a) {7; CHECK-LABEL: test_constraints_Uci_w:8; CHECK:       // %bb.0:9; CHECK-NEXT:    mov w8, w010; CHECK-NEXT:    //APP11; CHECK-NEXT:    add x0, x0, x812; CHECK-NEXT:    //NO_APP13; CHECK-NEXT:    ret14  call void asm sideeffect "add x0, x0, $0", "@3Uci,~{x0}"(i32 %a)15  ret void16}17 18; As test_constraints_Uci_w but ensures non-legal types are also covered.19define void @test_constraints_Uci_w_i8(i8 %a) {20; CHECK-LABEL: test_constraints_Uci_w_i8:21; CHECK:       // %bb.0:22; CHECK-NEXT:    mov w8, w023; CHECK-NEXT:    //APP24; CHECK-NEXT:    add x0, x0, x825; CHECK-NEXT:    //NO_APP26; CHECK-NEXT:    ret27  call void asm sideeffect "add x0, x0, $0", "@3Uci,~{x0}"(i8 %a)28  ret void29}30 31define void @test_constraints_Uci_x(i64 %a) {32; CHECK-LABEL: test_constraints_Uci_x:33; CHECK:       // %bb.0:34; CHECK-NEXT:    mov x8, x035; CHECK-NEXT:    //APP36; CHECK-NEXT:    add x0, x0, x837; CHECK-NEXT:    //NO_APP38; CHECK-NEXT:    ret39  call void asm sideeffect "add x0, x0, $0", "@3Uci,~{x0}"(i64 %a)40  ret void41}42 43define void @test_constraint_Ucj_w(i32 %a) {44; CHECK-LABEL: test_constraint_Ucj_w:45; CHECK:       // %bb.0:46; CHECK-NEXT:    mov w12, w047; CHECK-NEXT:    //APP48; CHECK-NEXT:    add x0, x0, x1249; CHECK-NEXT:    //NO_APP50; CHECK-NEXT:    ret51  call void asm sideeffect "add x0, x0, $0", "@3Ucj,~{x0}"(i32 %a)52  ret void53}54 55; As test_constraints_Ucj_w but ensures non-legal types are also covered.56define void @test_constraint_Ucj_w_i8(i8 %a) {57; CHECK-LABEL: test_constraint_Ucj_w_i8:58; CHECK:       // %bb.0:59; CHECK-NEXT:    mov w12, w060; CHECK-NEXT:    //APP61; CHECK-NEXT:    add x0, x0, x1262; CHECK-NEXT:    //NO_APP63; CHECK-NEXT:    ret64  call void asm sideeffect "add x0, x0, $0", "@3Ucj,~{x0}"(i8 %a)65  ret void66}67 68define void @test_constraint_Ucj_x(i64 %a) {69; CHECK-LABEL: test_constraint_Ucj_x:70; CHECK:       // %bb.0:71; CHECK-NEXT:    mov x12, x072; CHECK-NEXT:    //APP73; CHECK-NEXT:    add x0, x0, x1274; CHECK-NEXT:    //NO_APP75; CHECK-NEXT:    ret76  call void asm sideeffect "add x0, x0, $0", "@3Ucj,~{x0}"(i64 %a)77  ret void78}79