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1; RUN: llc -mtriple=aarch64-linux-gnu < %s | FileCheck %s2 3; FIXED WIDTH4 5define i8 @ctz_v8i1(<8 x i1> %a) {6; CHECK-LABEL: .LCPI0_0:7; CHECK-NEXT: .byte 88; CHECK-NEXT: .byte 79; CHECK-NEXT: .byte 610; CHECK-NEXT: .byte 511; CHECK-NEXT: .byte 412; CHECK-NEXT: .byte 313; CHECK-NEXT: .byte 214; CHECK-NEXT: .byte 115; CHECK-LABEL: ctz_v8i1:16; CHECK: // %bb.0:17; CHECK-NEXT: shl v0.8b, v0.8b, #718; CHECK-NEXT: adrp x8, .LCPI0_019; CHECK-NEXT: mov w9, #8 // =0x820; CHECK-NEXT: ldr d1, [x8, :lo12:.LCPI0_0]21; CHECK-NEXT: cmlt v0.8b, v0.8b, #022; CHECK-NEXT: and v0.8b, v0.8b, v1.8b23; CHECK-NEXT: umaxv b0, v0.8b24; CHECK-NEXT: fmov w8, s025; CHECK-NEXT: sub w0, w9, w826; CHECK-NEXT: ret27 %res = call i8 @llvm.experimental.cttz.elts.i8.v8i1(<8 x i1> %a, i1 0)28 ret i8 %res29}30 31define i32 @ctz_v16i1(<16 x i1> %a) {32; CHECK-LABEL: .LCPI1_0:33; CHECK-NEXT: .byte 1634; CHECK-NEXT: .byte 1535; CHECK-NEXT: .byte 1436; CHECK-NEXT: .byte 1337; CHECK-NEXT: .byte 1238; CHECK-NEXT: .byte 1139; CHECK-NEXT: .byte 1040; CHECK-NEXT: .byte 941; CHECK-NEXT: .byte 842; CHECK-NEXT: .byte 743; CHECK-NEXT: .byte 644; CHECK-NEXT: .byte 545; CHECK-NEXT: .byte 446; CHECK-NEXT: .byte 347; CHECK-NEXT: .byte 248; CHECK-NEXT: .byte 149; CHECK-LABEL: ctz_v16i1:50; CHECK: // %bb.0:51; CHECK-NEXT: shl v0.16b, v0.16b, #752; CHECK-NEXT: adrp x8, .LCPI1_053; CHECK-NEXT: mov w9, #16 // =0x1054; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI1_0]55; CHECK-NEXT: cmlt v0.16b, v0.16b, #056; CHECK-NEXT: and v0.16b, v0.16b, v1.16b57; CHECK-NEXT: umaxv b0, v0.16b58; CHECK-NEXT: fmov w8, s059; CHECK-NEXT: sub w8, w9, w860; CHECK-NEXT: and w0, w8, #0xff61; CHECK-NEXT: ret62 %res = call i32 @llvm.experimental.cttz.elts.i32.v16i1(<16 x i1> %a, i1 0)63 ret i32 %res64}65 66define i16 @ctz_v4i32(<4 x i32> %a) {67; CHECK-LABEL: .LCPI2_0:68; CHECK-NEXT: .hword 469; CHECK-NEXT: .hword 370; CHECK-NEXT: .hword 271; CHECK-NEXT: .hword 172; CHECK-LABEL: ctz_v4i32:73; CHECK: // %bb.0:74; CHECK-NEXT: cmtst v0.4s, v0.4s, v0.4s75; CHECK-NEXT: adrp x8, .LCPI2_076; CHECK-NEXT: mov w9, #4 // =0x477; CHECK-NEXT: ldr d1, [x8, :lo12:.LCPI2_0]78; CHECK-NEXT: xtn v0.4h, v0.4s79; CHECK-NEXT: and v0.8b, v0.8b, v1.8b80; CHECK-NEXT: umaxv h0, v0.4h81; CHECK-NEXT: fmov w8, s082; CHECK-NEXT: sub w8, w9, w883; CHECK-NEXT: and w0, w8, #0xff84; CHECK-NEXT: ret85 %res = call i16 @llvm.experimental.cttz.elts.i16.v4i32(<4 x i32> %a, i1 0)86 ret i16 %res87}88 89define i7 @ctz_i7_v8i1(<8 x i1> %a) {90; CHECK-LABEL: .LCPI3_0:91; CHECK-NEXT: .byte 892; CHECK-NEXT: .byte 793; CHECK-NEXT: .byte 694; CHECK-NEXT: .byte 595; CHECK-NEXT: .byte 496; CHECK-NEXT: .byte 397; CHECK-NEXT: .byte 298; CHECK-NEXT: .byte 199; CHECK-LABEL: ctz_i7_v8i1:100; CHECK: // %bb.0:101; CHECK-NEXT: shl v0.8b, v0.8b, #7102; CHECK-NEXT: adrp x8, .LCPI3_0103; CHECK-NEXT: mov w9, #8 // =0x8104; CHECK-NEXT: ldr d1, [x8, :lo12:.LCPI3_0]105; CHECK-NEXT: cmlt v0.8b, v0.8b, #0106; CHECK-NEXT: and v0.8b, v0.8b, v1.8b107; CHECK-NEXT: umaxv b0, v0.8b108; CHECK-NEXT: fmov w8, s0109; CHECK-NEXT: sub w0, w9, w8110; CHECK-NEXT: ret111 %res = call i7 @llvm.experimental.cttz.elts.i7.v8i1(<8 x i1> %a, i1 0)112 ret i7 %res113}114 115; ZERO IS POISON116 117define i8 @ctz_v8i1_poison(<8 x i1> %a) {118; CHECK-LABEL: .LCPI4_0:119; CHECK-NEXT: .byte 8120; CHECK-NEXT: .byte 7121; CHECK-NEXT: .byte 6122; CHECK-NEXT: .byte 5123; CHECK-NEXT: .byte 4124; CHECK-NEXT: .byte 3125; CHECK-NEXT: .byte 2126; CHECK-NEXT: .byte 1127; CHECK-LABEL: ctz_v8i1_poison:128; CHECK: // %bb.0:129; CHECK-NEXT: shl v0.8b, v0.8b, #7130; CHECK-NEXT: adrp x8, .LCPI4_0131; CHECK-NEXT: mov w9, #8 // =0x8132; CHECK-NEXT: ldr d1, [x8, :lo12:.LCPI4_0]133; CHECK-NEXT: cmlt v0.8b, v0.8b, #0134; CHECK-NEXT: and v0.8b, v0.8b, v1.8b135; CHECK-NEXT: umaxv b0, v0.8b136; CHECK-NEXT: fmov w8, s0137; CHECK-NEXT: sub w0, w9, w8138; CHECK-NEXT: ret139 %res = call i8 @llvm.experimental.cttz.elts.i8.v8i1(<8 x i1> %a, i1 1)140 ret i8 %res141}142 143declare i8 @llvm.experimental.cttz.elts.i8.v8i1(<8 x i1>, i1)144declare i7 @llvm.experimental.cttz.elts.i7.v8i1(<8 x i1>, i1)145declare i32 @llvm.experimental.cttz.elts.i32.v16i1(<16 x i1>, i1)146declare i16 @llvm.experimental.cttz.elts.i16.v4i32(<4 x i32>, i1)147