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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64 < %s | FileCheck %s3 4; This should codegen to fmaxnm with no-signed-zeros.5define float @fmaxnm(i32 %i1, i32 %i2) #0 {6; CHECK-LABEL: fmaxnm:7; CHECK: // %bb.0:8; CHECK-NEXT: ucvtf s0, w09; CHECK-NEXT: ucvtf s1, w110; CHECK-NEXT: fmov s2, #11.0000000011; CHECK-NEXT: fmov s3, #17.0000000012; CHECK-NEXT: fadd s0, s0, s213; CHECK-NEXT: fadd s1, s1, s314; CHECK-NEXT: fcmp s0, s115; CHECK-NEXT: fcsel s0, s0, s1, pl16; CHECK-NEXT: ret17 %f1 = uitofp i32 %i1 to float18 %fadd1 = fadd float %f1, 11.019 %f2 = uitofp i32 %i2 to float20 %fadd2 = fadd float %f2, 17.021 %cmp = fcmp uge float %fadd1, %fadd222 %val = select i1 %cmp, float %fadd1, float %fadd223 ret float %val24}25 26; If f1 is 0, fmul is NaN because 0.0 * -INF = NaN27; Therefore, this is not fmaxnm.28define float @not_fmaxnm_maybe_nan(i32 %i1, i32 %i2) #0 {29; CHECK-LABEL: not_fmaxnm_maybe_nan:30; CHECK: // %bb.0:31; CHECK-NEXT: ucvtf s0, w032; CHECK-NEXT: ucvtf s1, w133; CHECK-NEXT: mov w8, #-8388608 // =0xff80000034; CHECK-NEXT: fmov s2, #17.0000000035; CHECK-NEXT: fmov s3, w836; CHECK-NEXT: fmul s0, s0, s337; CHECK-NEXT: fadd s1, s1, s238; CHECK-NEXT: fcmp s0, s139; CHECK-NEXT: fcsel s0, s0, s1, pl40; CHECK-NEXT: ret41 %f1 = uitofp i32 %i1 to float42 %fmul = fmul float %f1, 0xfff0000000000000 ; -INFINITY as 64-bit hex43 %f2 = uitofp i32 %i2 to float44 %fadd2 = fadd float %f2, 17.045 %cmp = fcmp uge float %fmul, %fadd246 %val = select i1 %cmp, float %fmul, float %fadd247 ret float %val48}49 50attributes #0 = { "no-signed-zeros-fp-math"="true" }51