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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O3 -mtriple=aarch64-arm < %s | FileCheck %s3 4; Run at O3 to make sure we can optimize load/store instructions after Machine5; Block Placement takes place using Tail Duplication Threshold = 4.6 7define void @foo(i1 %cond, ptr %ptr) {8; CHECK-LABEL: foo:9; CHECK: // %bb.0: // %entry10; CHECK-NEXT: tbz w0, #0, .LBB0_211; CHECK-NEXT: // %bb.1: // %if.then12; CHECK-NEXT: ldp x9, x8, [x1, #8]13; CHECK-NEXT: str xzr, [x1, #16]14; CHECK-NEXT: cmp x8, x915; CHECK-NEXT: b.lt .LBB0_316; CHECK-NEXT: b .LBB0_417; CHECK-NEXT: .LBB0_2: // %if.else18; CHECK-NEXT: ldp x8, x9, [x1]19; CHECK-NEXT: cmp x8, x920; CHECK-NEXT: b.ge .LBB0_421; CHECK-NEXT: .LBB0_3: // %exit122; CHECK-NEXT: str xzr, [x1, #8]23; CHECK-NEXT: .LBB0_4: // %common.ret24; CHECK-NEXT: ret25entry:26 br i1 %cond, label %if.then, label %if.else27 28if.then:29 %0 = getelementptr inbounds i64, ptr %ptr, i64 230 %1 = load i64, ptr %0, align 831 store i64 0, ptr %0, align 832 br label %if.end33 34if.else:35 %2 = load i64, ptr %ptr, align 836 br label %if.end37 38if.end:39 %3 = phi i64 [ %1, %if.then ], [ %2, %if.else ]40 %4 = getelementptr inbounds i64, ptr %ptr, i64 141 %5 = load i64, ptr %4, align 842 %6 = icmp slt i64 %3, %543 br i1 %6, label %exit1, label %exit244 45exit1:46 store i64 0, ptr %4, align 847 ret void48 49exit2:50 ret void51}52