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1# Strip out debug info, then run ldst-opt with limit=1.2# RUN: llc -aarch64-load-store-scan-limit=1 -mtriple=aarch64-none-linux-gnu -mattr=+mte -run-pass mir-strip-debug,aarch64-ldst-opt -mir-strip-debugify-only=0 -verify-machineinstrs -o - %s | FileCheck %s3#4# Run ldst-opt with limit=1, then strip out debug info.5# RUN: llc -aarch64-load-store-scan-limit=1 -mtriple=aarch64-none-linux-gnu -mattr=+mte -run-pass aarch64-ldst-opt,mir-strip-debug -mir-strip-debugify-only=0 -verify-machineinstrs -o - %s | FileCheck %s6---7 8### STG and its offset limits9 10# CHECK-LABEL: name: test_STG_post11# CHECK: STGPostIndex $x0, $x0, 712name: test_STG_post13body: |14 bb.0.entry:15 liveins: $x016 17 STGi $x0, $x0, 018 DBG_VALUE $x0, 019 DBG_VALUE $x0, 020 $x0 = ADDXri $x0, 112, 021 DBG_VALUE $x0, 022 DBG_VALUE $x0, 023 RET_ReallyLR implicit $x024...25 26# CHECK-LABEL: name: test_STG_post_same_reg27# CHECK: STGPostIndex $x1, $x0, 728name: test_STG_post_same_reg29body: |30 bb.0.entry:31 liveins: $x0, $x132 33 STGi $x1, $x0, 034 DBG_VALUE $x0, 035 DBG_VALUE $x0, 036 $x0 = ADDXri $x0, 112, 037 DBG_VALUE $x0, 038 DBG_VALUE $x0, 039 RET_ReallyLR implicit $x040...41 42# CHECK-LABEL: name: test_STG_post_unaligned43# CHECK: STGi $x0, $x0, 044# CHECK-NEXT: ADDXri $x0, 8, 045name: test_STG_post_unaligned46body: |47 bb.0.entry:48 liveins: $x049 50 STGi $x0, $x0, 051 DBG_VALUE $x0, 052 DBG_VALUE $x0, 053 $x0 = ADDXri $x0, 8, 054 DBG_VALUE $x0, 055 DBG_VALUE $x0, 056 RET_ReallyLR implicit $x057...58 59# CHECK-LABEL: name: test_STG_post260# CHECK: STGPostIndex $x0, $x0, -25661name: test_STG_post262body: |63 bb.0.entry:64 liveins: $x065 66 STGi $x0, $x0, 067 DBG_VALUE $x0, 068 DBG_VALUE $x0, 069 $x0 = SUBXri $x0, 4096, 070 DBG_VALUE $x0, 071 DBG_VALUE $x0, 072 RET_ReallyLR implicit $x073...74 75# CHECK-LABEL: name: test_STG_post376# CHECK: STGi $x0, $x0, 077# CHECK-NEXT: SUBXri $x0, 4112, 078name: test_STG_post379body: |80 bb.0.entry:81 liveins: $x082 83 STGi $x0, $x0, 084 DBG_VALUE $x0, 085 DBG_VALUE $x0, 086 $x0 = SUBXri $x0, 4112, 087 DBG_VALUE $x0, 088 DBG_VALUE $x0, 089 RET_ReallyLR implicit $x090...91 92# CHECK-LABEL: name: test_STG_post493# CHECK: STGPostIndex $x0, $x0, 25594name: test_STG_post495body: |96 bb.0.entry:97 liveins: $x098 99 STGi $x0, $x0, 0100 DBG_VALUE $x0, 0101 DBG_VALUE $x0, 0102 $x0 = ADDXri $x0, 4080, 0103 DBG_VALUE $x0, 0104 DBG_VALUE $x0, 0105 RET_ReallyLR implicit $x0106...107 108# CHECK-LABEL: name: test_STG_post5109# CHECK: STGi $x0, $x0, 0110# CHECK-NEXT: ADDXri $x0, 4096, 0111name: test_STG_post5112body: |113 bb.0.entry:114 liveins: $x0115 116 STGi $x0, $x0, 0117 DBG_VALUE $x0, 0118 DBG_VALUE $x0, 0119 $x0 = ADDXri $x0, 4096, 0120 DBG_VALUE $x0, 0121 DBG_VALUE $x0, 0122 RET_ReallyLR implicit $x0123...124 125### The rest of ST*G variants.126 127# CHECK-LABEL: name: test_STZG_post128# CHECK: STZGPostIndex $x0, $x0, 7129name: test_STZG_post130body: |131 bb.0.entry:132 liveins: $x0133 134 STZGi $x0, $x0, 0135 DBG_VALUE $x0, 0136 DBG_VALUE $x0, 0137 $x0 = ADDXri $x0, 112, 0138 DBG_VALUE $x0, 0139 DBG_VALUE $x0, 0140 RET_ReallyLR implicit $x0141...142 143# CHECK-LABEL: name: test_ST2G_post144# CHECK: ST2GPostIndex $x0, $x0, 7145name: test_ST2G_post146body: |147 bb.0.entry:148 liveins: $x0149 150 ST2Gi $x0, $x0, 0151 DBG_VALUE $x0, 0152 DBG_VALUE $x0, 0153 $x0 = ADDXri $x0, 112, 0154 DBG_VALUE $x0, 0155 DBG_VALUE $x0, 0156 RET_ReallyLR implicit $x0157...158 159# CHECK-LABEL: name: test_STZ2G_post160# CHECK: STZ2GPostIndex $x0, $x0, 7161name: test_STZ2G_post162body: |163 bb.0.entry:164 liveins: $x0165 166 STZ2Gi $x0, $x0, 0167 DBG_VALUE $x0, 0168 DBG_VALUE $x0, 0169 $x0 = ADDXri $x0, 112, 0170 DBG_VALUE $x0, 0171 DBG_VALUE $x0, 0172 RET_ReallyLR implicit $x0173...174 175### STGP and its offset limits176 177# CHECK-LABEL: name: test_STGP_post178# CHECK: STGPpost $x1, $x2, $x0, 7179name: test_STGP_post180body: |181 bb.0.entry:182 liveins: $x0, $x1, $x2183 184 STGPi $x1, $x2, $x0, 0185 DBG_VALUE $x0, 0186 DBG_VALUE $x0, 0187 $x0 = ADDXri $x0, 112, 0188 DBG_VALUE $x0, 0189 DBG_VALUE $x0, 0190 RET_ReallyLR implicit $x0191...192 193# CHECK-LABEL: name: test_STGP_post2194# CHECK: STGPpost $x1, $x2, $x0, -64195name: test_STGP_post2196body: |197 bb.0.entry:198 liveins: $x0, $x1, $x2199 200 STGPi $x1, $x2, $x0, 0201 DBG_VALUE $x0, 0202 DBG_VALUE $x0, 0203 $x0 = SUBXri $x0, 1024, 0204 DBG_VALUE $x0, 0205 DBG_VALUE $x0, 0206 RET_ReallyLR implicit $x0207...208 209# CHECK-LABEL: name: test_STGP_post3210# CHECK: STGPi $x1, $x2, $x0, 0211# CHECK-NEXT: SUBXri $x0, 1040, 0212name: test_STGP_post3213body: |214 bb.0.entry:215 liveins: $x0, $x1, $x2216 217 STGPi $x1, $x2, $x0, 0218 DBG_VALUE $x0, 0219 DBG_VALUE $x0, 0220 $x0 = SUBXri $x0, 1040, 0221 DBG_VALUE $x0, 0222 DBG_VALUE $x0, 0223 RET_ReallyLR implicit $x0224...225 226# CHECK-LABEL: name: test_STGP_post4227# CHECK: STGPpost $x1, $x2, $x0, 63228name: test_STGP_post4229body: |230 bb.0.entry:231 liveins: $x0, $x1, $x2232 233 STGPi $x1, $x2, $x0, 0234 DBG_VALUE $x0, 0235 DBG_VALUE $x0, 0236 $x0 = ADDXri $x0, 1008, 0237 DBG_VALUE $x0, 0238 DBG_VALUE $x0, 0239 RET_ReallyLR implicit $x0240...241 242# CHECK-LABEL: name: test_STGP_post5243# CHECK: STGPi $x1, $x2, $x0, 0244# CHECK-NEXT: ADDXri $x0, 1024, 0245name: test_STGP_post5246body: |247 bb.0.entry:248 liveins: $x0, $x1, $x2249 250 STGPi $x1, $x2, $x0, 0251 DBG_VALUE $x0, 0252 DBG_VALUE $x0, 0253 $x0 = ADDXri $x0, 1024, 0254 DBG_VALUE $x0, 0255 DBG_VALUE $x0, 0256 RET_ReallyLR implicit $x0257...258 259### Pre-indexed forms260 261# CHECK-LABEL: name: test_STG_pre262# CHECK: STGPreIndex $x0, $x0, 10263name: test_STG_pre264body: |265 bb.0.entry:266 liveins: $x0267 268 STGi $x0, $x0, 10269 DBG_VALUE $x0, 0270 DBG_VALUE $x0, 0271 $x0 = ADDXri $x0, 160, 0272 DBG_VALUE $x0, 0273 DBG_VALUE $x0, 0274 RET_ReallyLR implicit $x0275...276 277# CHECK-LABEL: name: test_STGP_pre278# CHECK: STGPpre $x1, $x2, $x0, 10279name: test_STGP_pre280body: |281 bb.0.entry:282 liveins: $x0, $x1, $x2283 284 STGPi $x1, $x2, $x0, 10285 DBG_VALUE $x0, 0286 DBG_VALUE $x0, 0287 $x0 = ADDXri $x0, 160, 0288 DBG_VALUE $x0, 0289 DBG_VALUE $x0, 0290 RET_ReallyLR implicit $x0291...292 293### Pre-indexed forms with add/sub coming before the store.294 295# CHECK-LABEL: name: test_STG_pre_back296# CHECK: STGPreIndex $x0, $x0, 2297name: test_STG_pre_back298body: |299 bb.0.entry:300 liveins: $x0301 302 $x0 = ADDXri $x0, 32, 0303 DBG_VALUE $x0, 0304 DBG_VALUE $x0, 0305 STGi $x0, $x0, 0306 DBG_VALUE $x0, 0307 DBG_VALUE $x0, 0308 RET_ReallyLR implicit $x0309...310 311# CHECK-LABEL: name: test_STGP_pre_back312# CHECK: STGPpre $x1, $x2, $x0, -3313name: test_STGP_pre_back314body: |315 bb.0.entry:316 liveins: $x0, $x1, $x2317 318 $x0 = SUBXri $x0, 48, 0319 DBG_VALUE $x0, 0320 DBG_VALUE $x0, 0321 STGPi $x1, $x2, $x0, 0322 DBG_VALUE $x0, 0323 DBG_VALUE $x0, 0324 RET_ReallyLR implicit $x0325...326 327### STGP with source register == address register328 329# CHECK-LABEL: name: test_STGP_post_same_reg330# CHECK: STGPpost $x0, $x0, $x0, 7331name: test_STGP_post_same_reg332body: |333 bb.0.entry:334 liveins: $x0335 336 STGPi $x0, $x0, $x0, 0337 DBG_VALUE $x0, 0338 DBG_VALUE $x0, 0339 $x0 = ADDXri $x0, 112, 0340 DBG_VALUE $x0, 0341 DBG_VALUE $x0, 0342 RET_ReallyLR implicit $x0343...344 345# CHECK-LABEL: name: test_STGP_pre_same_reg346# CHECK: STGPpre $x0, $x0, $x0, 7347name: test_STGP_pre_same_reg348body: |349 bb.0.entry:350 liveins: $x0351 352 STGPi $x0, $x0, $x0, 7353 DBG_VALUE $x0, 0354 DBG_VALUE $x0, 0355 $x0 = ADDXri $x0, 112, 0356 DBG_VALUE $x0, 0357 DBG_VALUE $x0, 0358 RET_ReallyLR implicit $x0359...360 361# This case can not be merged because the source register is always read before writeback.362# CHECK-LABEL: name: test_STGP_pre_back_same_reg363# CHECK: SUBXri $x0, 48, 0364# CHECK-NEXT: STGPi $x0, $x0, $x0, 0365name: test_STGP_pre_back_same_reg366body: |367 bb.0.entry:368 liveins: $x0369 370 $x0 = SUBXri $x0, 48, 0371 DBG_VALUE $x0, 0372 DBG_VALUE $x0, 0373 STGPi $x0, $x0, $x0, 0374 DBG_VALUE $x0, 0375 DBG_VALUE $x0, 0376 RET_ReallyLR implicit $x0377...378