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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64 -run-pass=early-machinelicm -o - %s | FileCheck %s3 4# This test verifies that cross-bank copies (e.g., GPR to FPR, FPR to GPR)5# are hoisted out of loops by MachineLICM, as they are expensive on AArch64.6 7--- |8 declare void @use_float(float)9 declare void @use_int(i32)10 11 define void @gpr_to_fpr_virtual_copy_hoisted() {12 ret void13 }14 15 define void @gpr_to_fpr_physical_copy_hoisted() {16 ret void17 }18 19 define void @fpr_to_gpr_virtual_copy_hoisted() {20 ret void21 }22...23---24name: gpr_to_fpr_virtual_copy_hoisted25tracksRegLiveness: true26body: |27 ; CHECK-LABEL: name: gpr_to_fpr_virtual_copy_hoisted28 ; CHECK: bb.0:29 ; CHECK-NEXT: successors: %bb.1(0x80000000)30 ; CHECK-NEXT: liveins: $w0, $w131 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w033 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w134 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY $wzr35 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[COPY2]]36 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:fpr32 = COPY [[COPY1]]37 ; CHECK-NEXT: {{ $}}38 ; CHECK-NEXT: bb.1:39 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)40 ; CHECK-NEXT: {{ $}}41 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32common = PHI [[COPY3]], %bb.0, %5, %bb.242 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[PHI]], [[COPY]], implicit-def $nzcv43 ; CHECK-NEXT: Bcc 1, %bb.3, implicit $nzcv44 ; CHECK-NEXT: B %bb.245 ; CHECK-NEXT: {{ $}}46 ; CHECK-NEXT: bb.2:47 ; CHECK-NEXT: successors: %bb.1(0x80000000)48 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: $s0 = COPY [[COPY4]]50 ; CHECK-NEXT: BL @use_float, implicit-def dead $lr, implicit $sp, implicit $s0, implicit-def $sp51 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[PHI]], 1, 052 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[ADDWri]]53 ; CHECK-NEXT: B %bb.154 ; CHECK-NEXT: {{ $}}55 ; CHECK-NEXT: bb.3:56 ; CHECK-NEXT: RET_ReallyLR57 bb.0:58 liveins: $w0, $w159 %1:gpr32 = COPY $w060 %0:gpr32 = COPY $w161 %3:gpr32all = COPY $wzr62 %2:gpr32all = COPY %3:gpr32all63 64 bb.1:65 %4:gpr32common = PHI %2:gpr32all, %bb.0, %5:gpr32all, %bb.266 %6:gpr32 = SUBSWrr %4:gpr32common, %1:gpr32, implicit-def $nzcv67 Bcc 1, %bb.3, implicit $nzcv68 B %bb.269 70 bb.2:71 %7:fpr32 = COPY %0:gpr3272 $s0 = COPY %7:fpr3273 BL @use_float, implicit-def dead $lr, implicit $sp, implicit $s0, implicit-def $sp74 %8:gpr32sp = ADDWri %4:gpr32common, 1, 075 %5:gpr32all = COPY %8:gpr32sp76 B %bb.177 78 bb.3:79 RET_ReallyLR80 81...82---83name: gpr_to_fpr_physical_copy_hoisted84tracksRegLiveness: true85body: |86 ; CHECK-LABEL: name: gpr_to_fpr_physical_copy_hoisted87 ; CHECK: bb.0:88 ; CHECK-NEXT: successors: %bb.1(0x80000000)89 ; CHECK-NEXT: liveins: $w090 ; CHECK-NEXT: {{ $}}91 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w092 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY $wzr93 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]94 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr32 = COPY $wzr95 ; CHECK-NEXT: {{ $}}96 ; CHECK-NEXT: bb.1:97 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)98 ; CHECK-NEXT: {{ $}}99 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32common = PHI [[COPY2]], %bb.0, %4, %bb.2100 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[PHI]], [[COPY]], implicit-def $nzcv101 ; CHECK-NEXT: Bcc 1, %bb.3, implicit $nzcv102 ; CHECK-NEXT: B %bb.2103 ; CHECK-NEXT: {{ $}}104 ; CHECK-NEXT: bb.2:105 ; CHECK-NEXT: successors: %bb.1(0x80000000)106 ; CHECK-NEXT: {{ $}}107 ; CHECK-NEXT: $s0 = COPY [[COPY3]]108 ; CHECK-NEXT: BL @use_float, implicit-def dead $lr, implicit $sp, implicit $s0, implicit-def $sp109 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[PHI]], 1, 0110 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]111 ; CHECK-NEXT: B %bb.1112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: bb.3:114 ; CHECK-NEXT: RET_ReallyLR115 bb.0:116 liveins: $w0117 %1:gpr32 = COPY $w0118 %3:gpr32all = COPY $wzr119 %2:gpr32all = COPY %3:gpr32all120 121 bb.1:122 %4:gpr32common = PHI %2:gpr32all, %bb.0, %5:gpr32all, %bb.2123 %6:gpr32 = SUBSWrr %4:gpr32common, %1:gpr32, implicit-def $nzcv124 Bcc 1, %bb.3, implicit $nzcv125 B %bb.2126 127 bb.2:128 %7:fpr32 = COPY $wzr129 $s0 = COPY %7:fpr32130 BL @use_float, implicit-def dead $lr, implicit $sp, implicit $s0, implicit-def $sp131 %8:gpr32sp = ADDWri %4:gpr32common, 1, 0132 %5:gpr32all = COPY %8:gpr32sp133 B %bb.1134 135 bb.3:136 RET_ReallyLR137 138...139---140name: fpr_to_gpr_virtual_copy_hoisted141tracksRegLiveness: true142body: |143 ; CHECK-LABEL: name: fpr_to_gpr_virtual_copy_hoisted144 ; CHECK: bb.0:145 ; CHECK-NEXT: successors: %bb.1(0x80000000)146 ; CHECK-NEXT: liveins: $w0, $s0147 ; CHECK-NEXT: {{ $}}148 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0149 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0150 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY $wzr151 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[COPY2]]152 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY1]]153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: bb.1:155 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)156 ; CHECK-NEXT: {{ $}}157 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32common = PHI [[COPY3]], %bb.0, %5, %bb.2158 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[PHI]], [[COPY]], implicit-def $nzcv159 ; CHECK-NEXT: Bcc 1, %bb.3, implicit $nzcv160 ; CHECK-NEXT: B %bb.2161 ; CHECK-NEXT: {{ $}}162 ; CHECK-NEXT: bb.2:163 ; CHECK-NEXT: successors: %bb.1(0x80000000)164 ; CHECK-NEXT: {{ $}}165 ; CHECK-NEXT: $w0 = COPY [[COPY4]]166 ; CHECK-NEXT: BL @use_int, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp167 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[PHI]], 1, 0168 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[ADDWri]]169 ; CHECK-NEXT: B %bb.1170 ; CHECK-NEXT: {{ $}}171 ; CHECK-NEXT: bb.3:172 ; CHECK-NEXT: RET_ReallyLR173 bb.0:174 liveins: $w0, $s0175 %1:gpr32 = COPY $w0176 %0:fpr32 = COPY $s0177 %3:gpr32all = COPY $wzr178 %2:gpr32all = COPY %3:gpr32all179 180 bb.1:181 %4:gpr32common = PHI %2:gpr32all, %bb.0, %5:gpr32all, %bb.2182 %6:gpr32 = SUBSWrr %4:gpr32common, %1:gpr32, implicit-def $nzcv183 Bcc 1, %bb.3, implicit $nzcv184 B %bb.2185 186 bb.2:187 %7:gpr32 = COPY %0:fpr32188 $w0 = COPY %7:gpr32189 BL @use_int, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp190 %8:gpr32sp = ADDWri %4:gpr32common, 1, 0191 %5:gpr32all = COPY %8:gpr32sp192 B %bb.1193 194 bb.3:195 RET_ReallyLR196 197...198