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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3; RUN: llc < %s -mtriple=aarch64 -global-isel | FileCheck %s4 5define i32 @testmsws(float %x) {6; CHECK-LABEL: testmsws:7; CHECK: // %bb.0: // %entry8; CHECK-NEXT: frintx s0, s09; CHECK-NEXT: fcvtzs x0, s010; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x011; CHECK-NEXT: ret12entry:13 %0 = tail call i64 @llvm.llrint.f32(float %x)14 %conv = trunc i64 %0 to i3215 ret i32 %conv16}17 18define i64 @testmsxs(float %x) {19; CHECK-LABEL: testmsxs:20; CHECK: // %bb.0: // %entry21; CHECK-NEXT: frintx s0, s022; CHECK-NEXT: fcvtzs x0, s023; CHECK-NEXT: ret24entry:25 %0 = tail call i64 @llvm.llrint.f32(float %x)26 ret i64 %027}28 29define i32 @testmswd(double %x) {30; CHECK-LABEL: testmswd:31; CHECK: // %bb.0: // %entry32; CHECK-NEXT: frintx d0, d033; CHECK-NEXT: fcvtzs x0, d034; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x035; CHECK-NEXT: ret36entry:37 %0 = tail call i64 @llvm.llrint.f64(double %x)38 %conv = trunc i64 %0 to i3239 ret i32 %conv40}41 42define i64 @testmsxd(double %x) {43; CHECK-LABEL: testmsxd:44; CHECK: // %bb.0: // %entry45; CHECK-NEXT: frintx d0, d046; CHECK-NEXT: fcvtzs x0, d047; CHECK-NEXT: ret48entry:49 %0 = tail call i64 @llvm.llrint.f64(double %x)50 ret i64 %051}52 53define i32 @testmswl(fp128 %x) {54; CHECK-LABEL: testmswl:55; CHECK: // %bb.0: // %entry56; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill57; CHECK-NEXT: .cfi_def_cfa_offset 1658; CHECK-NEXT: .cfi_offset w30, -1659; CHECK-NEXT: bl llrintl60; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x061; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload62; CHECK-NEXT: ret63entry:64 %0 = tail call i64 @llvm.llrint.f128(fp128 %x)65 %conv = trunc i64 %0 to i3266 ret i32 %conv67}68 69define i64 @testmsll(fp128 %x) {70; CHECK-LABEL: testmsll:71; CHECK: // %bb.0: // %entry72; CHECK-NEXT: b llrintl73entry:74 %0 = tail call i64 @llvm.llrint.f128(fp128 %x)75 ret i64 %076}77 78declare i64 @llvm.llrint.f32(float) nounwind readnone79declare i64 @llvm.llrint.f64(double) nounwind readnone80declare i64 @llvm.llrint.f128(fp128) nounwind readnone81