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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills -aarch64-enable-sink-fold=true %s -o - 2>&1 | FileCheck %s3# RUN: llc -mtriple aarch64 -passes="machine-sink<enable-sink-fold>" -sink-insts-to-avoid-spills %s -o - 2>&1 | FileCheck %s4--- |5 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"6 target triple = "aarch64"7 8 %struct.A = type { i32, i32, i32, i32, i32, i32 }9 10 @A = external dso_local global [100 x i32], align 411 12 define void @cant_sink_adds_call_in_block(ptr nocapture readonly %input, ptr %a) {13 bb:14 %i = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 115 %i1 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 216 %i2 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 317 %i3 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 418 %i4 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 519 %scevgep = getelementptr i8, ptr %input, i64 120 br label %.backedge21 22 .backedge: ; preds = %.backedge.backedge, %bb23 %lsr.iv = phi ptr [ %scevgep1, %.backedge.backedge ], [ %scevgep, %bb ]24 %i5 = load i8, ptr %lsr.iv, align 125 %i6 = zext i8 %i5 to i3226 switch i32 %i6, label %.backedge.backedge [27 i32 0, label %bb728 i32 10, label %bb929 i32 20, label %bb1030 i32 30, label %bb1131 i32 40, label %bb1232 i32 50, label %bb1333 ]34 35 bb7: ; preds = %.backedge36 tail call void @_Z6assignPj(ptr %a)37 br label %.backedge.backedge38 39 bb9: ; preds = %.backedge40 tail call void @_Z6assignPj(ptr %i)41 br label %.backedge.backedge42 43 bb10: ; preds = %.backedge44 tail call void @_Z6assignPj(ptr %i1)45 br label %.backedge.backedge46 47 bb11: ; preds = %.backedge48 tail call void @_Z6assignPj(ptr %i2)49 br label %.backedge.backedge50 51 bb12: ; preds = %.backedge52 tail call void @_Z6assignPj(ptr %i3)53 br label %.backedge.backedge54 55 bb13: ; preds = %.backedge56 tail call void @_Z6assignPj(ptr %i4)57 br label %.backedge.backedge58 59 .backedge.backedge: ; preds = %bb13, %bb12, %bb11, %bb10, %bb9, %bb7, %.backedge60 %scevgep1 = getelementptr i8, ptr %lsr.iv, i64 161 br label %.backedge62 }63 64 define i32 @load_not_safe_to_move_consecutive_call(i32 %n) {65 entry:66 %cmp63 = icmp sgt i32 %n, 067 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup68 69 for.body.preheader: ; preds = %entry70 %i = load i32, ptr @A, align 471 %call0 = tail call i32 @use(i32 %n)72 br label %for.body73 74 for.cond.cleanup: ; preds = %for.body, %entry75 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]76 ret i32 %sum.0.lcssa77 78 for.body: ; preds = %for.body, %for.body.preheader79 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]80 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]81 %div = sdiv i32 %sum.065, %i82 %lsr.iv.next = add i32 %lsr.iv, -183 %exitcond.not = icmp eq i32 %lsr.iv.next, 084 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body85 }86 87 define i32 @load_not_safe_to_move_consecutive_call_use(i32 %n) {88 entry:89 %cmp63 = icmp sgt i32 %n, 090 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup91 92 for.body.preheader: ; preds = %entry93 %i = load i32, ptr @A, align 494 %call0 = tail call i32 @use(i32 %i)95 br label %for.body96 97 for.cond.cleanup: ; preds = %for.body, %entry98 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]99 ret i32 %sum.0.lcssa100 101 for.body: ; preds = %for.body, %for.body.preheader102 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]103 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]104 %div = sdiv i32 %sum.065, %i105 %lsr.iv.next = add i32 %lsr.iv, -1106 %exitcond.not = icmp eq i32 %lsr.iv.next, 0107 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body108 }109 110 define i32 @cant_sink_use_outside_loop(i32 %n) {111 entry:112 %cmp63 = icmp sgt i32 %n, 0113 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup114 115 for.body.preheader: ; preds = %entry116 %i = load i32, ptr @A, align 4117 br label %for.body118 119 for.cond.cleanup: ; preds = %for.body, %entry120 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]121 %use.outside.loop = phi i32 [ 0, %entry ], [ %i, %for.body ]122 %call = tail call i32 @use(i32 %use.outside.loop)123 ret i32 %sum.0.lcssa124 125 for.body: ; preds = %for.body, %for.body.preheader126 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]127 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]128 %div = sdiv i32 %sum.065, %sum.065129 %lsr.iv.next = add i32 %lsr.iv, -1130 %exitcond.not = icmp eq i32 %lsr.iv.next, 0131 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body132 }133 134 define i32 @use_is_not_a_copy(i32 %n) {135 entry:136 %cmp63 = icmp sgt i32 %n, 0137 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup138 139 for.body.preheader: ; preds = %entry140 %i = load i32, ptr @A, align 4141 br label %for.body142 143 for.cond.cleanup: ; preds = %for.body, %entry144 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]145 ret i32 %sum.0.lcssa146 147 for.body: ; preds = %for.body, %for.body.preheader148 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]149 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]150 %div = sdiv i32 %sum.065, %i151 %lsr.iv.next = add i32 %lsr.iv, -1152 %exitcond.not = icmp eq i32 %lsr.iv.next, 0153 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body154 }155 156 define dso_local void @sink_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, i32 %n) local_unnamed_addr {157 entry:158 %i = load i32, ptr %read, align 4, !tbaa !0159 %cmp10 = icmp sgt i32 %n, 0160 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup161 162 for.body.preheader: ; preds = %entry163 %i1 = add i32 %i, 42164 br label %for.body165 166 for.cond.cleanup: ; preds = %for.body, %entry167 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]168 store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0169 ret void170 171 for.body: ; preds = %for.body, %for.body.preheader172 %lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]173 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]174 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]175 %div = sdiv i32 %sum.011, %lsr.iv1176 %lsr.iv.next = add i32 %lsr.iv, -1177 %lsr.iv.next2 = add i32 %lsr.iv1, 1178 %exitcond.not = icmp eq i32 %lsr.iv.next, 0179 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body180 }181 182 define dso_local void @store_after_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, ptr nocapture %store, i32 %n) local_unnamed_addr {183 entry:184 %i = load i32, ptr %read, align 4, !tbaa !0185 %cmp10 = icmp sgt i32 %n, 0186 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup187 188 for.body.preheader: ; preds = %entry189 %i1 = add i32 %i, 42190 store i32 43, ptr %store, align 4, !tbaa !0191 br label %for.body192 193 for.cond.cleanup: ; preds = %for.body, %entry194 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]195 store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0196 ret void197 198 for.body: ; preds = %for.body, %for.body.preheader199 %lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]200 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]201 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]202 %div = sdiv i32 %sum.011, %lsr.iv1203 %lsr.iv.next = add i32 %lsr.iv, -1204 %lsr.iv.next2 = add i32 %lsr.iv1, 1205 %exitcond.not = icmp eq i32 %lsr.iv.next, 0206 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !4207 }208 209 define dso_local void @aliased_store_after_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, ptr nocapture %store, i32 %n) local_unnamed_addr {210 entry:211 %i = load i32, ptr %read, align 4, !tbaa !0212 %cmp10 = icmp sgt i32 %n, 0213 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup214 215 for.body.preheader: ; preds = %entry216 %i1 = add i32 %i, 42217 store i32 43, ptr %read, align 4, !tbaa !0218 br label %for.body219 220 for.cond.cleanup: ; preds = %for.body, %entry221 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]222 store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0223 ret void224 225 for.body: ; preds = %for.body, %for.body.preheader226 %lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]227 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]228 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]229 %div = sdiv i32 %sum.011, %lsr.iv1230 %lsr.iv.next = add i32 %lsr.iv, -1231 %lsr.iv.next2 = add i32 %lsr.iv1, 1232 %exitcond.not = icmp eq i32 %lsr.iv.next, 0233 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !4234 }235 236 declare i32 @use(i32)237 238 declare void @_Z6assignPj(ptr)239 240 !0 = !{!1, !1, i64 0}241 !1 = !{!"int", !2, i64 0}242 !2 = !{!"omnipotent char", !3, i64 0}243 !3 = !{!"Simple C/C++ TBAA"}244 !4 = distinct !{!4, !5}245 !5 = !{!"llvm.loop.mustprogress"}246 247...248---249name: cant_sink_adds_call_in_block250alignment: 4251exposesReturnsTwice: false252legalized: false253regBankSelected: false254selected: false255failedISel: false256tracksRegLiveness: true257hasWinCFI: false258registers:259 - { id: 0, class: gpr64all, preferred-register: '' }260 - { id: 1, class: gpr64all, preferred-register: '' }261 - { id: 2, class: gpr64all, preferred-register: '' }262 - { id: 3, class: gpr64all, preferred-register: '' }263 - { id: 4, class: gpr64all, preferred-register: '' }264 - { id: 5, class: gpr64all, preferred-register: '' }265 - { id: 6, class: gpr64sp, preferred-register: '' }266 - { id: 7, class: gpr64all, preferred-register: '' }267 - { id: 8, class: gpr64common, preferred-register: '' }268 - { id: 9, class: gpr64common, preferred-register: '' }269 - { id: 10, class: gpr64sp, preferred-register: '' }270 - { id: 11, class: gpr64sp, preferred-register: '' }271 - { id: 12, class: gpr64sp, preferred-register: '' }272 - { id: 13, class: gpr64sp, preferred-register: '' }273 - { id: 14, class: gpr64sp, preferred-register: '' }274 - { id: 15, class: gpr64sp, preferred-register: '' }275 - { id: 16, class: gpr64, preferred-register: '' }276 - { id: 17, class: gpr32, preferred-register: '' }277 - { id: 18, class: gpr32sp, preferred-register: '' }278 - { id: 19, class: gpr32, preferred-register: '' }279 - { id: 20, class: gpr64common, preferred-register: '' }280 - { id: 21, class: gpr64, preferred-register: '' }281 - { id: 22, class: gpr64sp, preferred-register: '' }282 - { id: 23, class: gpr64sp, preferred-register: '' }283liveins:284 - { reg: '$x0', virtual-reg: '%8' }285 - { reg: '$x1', virtual-reg: '%9' }286frameInfo:287 isFrameAddressTaken: false288 isReturnAddressTaken: false289 hasStackMap: false290 hasPatchPoint: false291 stackSize: 0292 offsetAdjustment: 0293 maxAlignment: 1294 adjustsStack: true295 hasCalls: true296 stackProtector: ''297 maxCallFrameSize: 0298 cvBytesOfCalleeSavedRegisters: 0299 hasOpaqueSPAdjustment: false300 hasVAStart: false301 hasMustTailInVarArgFunc: false302 localFrameSize: 0303 savePoint: []304 restorePoint: []305fixedStack: []306stack: []307callSites: []308debugValueSubstitutions: []309constants: []310machineFunctionInfo: {}311jumpTable:312 kind: block-address313 entries:314 - id: 0315 blocks: [ '%bb.2', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',316 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.3', '%bb.8',317 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',318 '%bb.8', '%bb.8', '%bb.4', '%bb.8', '%bb.8', '%bb.8',319 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',320 '%bb.5', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',321 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.6', '%bb.8',322 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',323 '%bb.8', '%bb.8', '%bb.7' ]324body: |325 ; CHECK-LABEL: name: cant_sink_adds_call_in_block326 ; CHECK: bb.0.bb:327 ; CHECK-NEXT: successors: %bb.1(0x80000000)328 ; CHECK-NEXT: liveins: $x0, $x1329 ; CHECK-NEXT: {{ $}}330 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x1331 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x0332 ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri [[COPY1]], 1, 0333 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY [[ADDXri]]334 ; CHECK-NEXT: [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0335 ; CHECK-NEXT: {{ $}}336 ; CHECK-NEXT: bb.1..backedge:337 ; CHECK-NEXT: successors: %bb.9(0x09249249), %bb.2(0x76db6db7)338 ; CHECK-NEXT: {{ $}}339 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr64sp = PHI [[COPY2]], %bb.0, %7, %bb.9340 ; CHECK-NEXT: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[PHI]], 0 :: (load (s8) from %ir.lsr.iv)341 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, killed [[LDRBBui]], %subreg.sub_32342 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32sp = COPY [[SUBREG_TO_REG]].sub_32343 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[COPY3]], 50, 0, implicit-def $nzcv344 ; CHECK-NEXT: Bcc 8, %bb.9, implicit $nzcv345 ; CHECK-NEXT: {{ $}}346 ; CHECK-NEXT: bb.2..backedge:347 ; CHECK-NEXT: successors: %bb.3(0x13b13b14), %bb.9(0x09d89d8a), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14), %bb.8(0x13b13b14)348 ; CHECK-NEXT: {{ $}}349 ; CHECK-NEXT: early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0350 ; CHECK-NEXT: BR killed %21351 ; CHECK-NEXT: {{ $}}352 ; CHECK-NEXT: bb.3.bb7:353 ; CHECK-NEXT: successors: %bb.9(0x80000000)354 ; CHECK-NEXT: {{ $}}355 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp356 ; CHECK-NEXT: $x0 = COPY [[COPY]]357 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp358 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp359 ; CHECK-NEXT: B %bb.9360 ; CHECK-NEXT: {{ $}}361 ; CHECK-NEXT: bb.4.bb9:362 ; CHECK-NEXT: successors: %bb.9(0x80000000)363 ; CHECK-NEXT: {{ $}}364 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp365 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 4, 0366 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp367 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp368 ; CHECK-NEXT: B %bb.9369 ; CHECK-NEXT: {{ $}}370 ; CHECK-NEXT: bb.5.bb10:371 ; CHECK-NEXT: successors: %bb.9(0x80000000)372 ; CHECK-NEXT: {{ $}}373 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp374 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 8, 0375 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp376 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp377 ; CHECK-NEXT: B %bb.9378 ; CHECK-NEXT: {{ $}}379 ; CHECK-NEXT: bb.6.bb11:380 ; CHECK-NEXT: successors: %bb.9(0x80000000)381 ; CHECK-NEXT: {{ $}}382 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp383 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 12, 0384 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp385 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp386 ; CHECK-NEXT: B %bb.9387 ; CHECK-NEXT: {{ $}}388 ; CHECK-NEXT: bb.7.bb12:389 ; CHECK-NEXT: successors: %bb.9(0x80000000)390 ; CHECK-NEXT: {{ $}}391 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp392 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 16, 0393 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp394 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp395 ; CHECK-NEXT: B %bb.9396 ; CHECK-NEXT: {{ $}}397 ; CHECK-NEXT: bb.8.bb13:398 ; CHECK-NEXT: successors: %bb.9(0x80000000)399 ; CHECK-NEXT: {{ $}}400 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp401 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 20, 0402 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp403 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp404 ; CHECK-NEXT: {{ $}}405 ; CHECK-NEXT: bb.9..backedge.backedge:406 ; CHECK-NEXT: successors: %bb.1(0x80000000)407 ; CHECK-NEXT: {{ $}}408 ; CHECK-NEXT: [[ADDXri1:%[0-9]+]]:gpr64sp = ADDXri [[PHI]], 1, 0409 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64all = COPY [[ADDXri1]]410 ; CHECK-NEXT: B %bb.1411 bb.0 (%ir-block.bb):412 successors: %bb.1(0x80000000)413 liveins: $x0, $x1414 415 %9:gpr64common = COPY $x1416 %8:gpr64common = COPY $x0417 %10:gpr64sp = nuw ADDXri %9, 4, 0418 %0:gpr64all = COPY %10419 %11:gpr64sp = nuw ADDXri %9, 8, 0420 %1:gpr64all = COPY %11421 %12:gpr64sp = nuw ADDXri %9, 12, 0422 %2:gpr64all = COPY %12423 %13:gpr64sp = nuw ADDXri %9, 16, 0424 %3:gpr64all = COPY %13425 %14:gpr64sp = nuw ADDXri %9, 20, 0426 %4:gpr64all = COPY %14427 %15:gpr64sp = ADDXri %8, 1, 0428 %5:gpr64all = COPY %15429 %20:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0430 431 bb.1..backedge:432 successors: %bb.8(0x09249249), %bb.9(0x76db6db7)433 434 %6:gpr64sp = PHI %5, %bb.0, %7, %bb.8435 %17:gpr32 = LDRBBui %6, 0 :: (load (s8) from %ir.lsr.iv)436 %16:gpr64 = SUBREG_TO_REG 0, killed %17, %subreg.sub_32437 %18:gpr32sp = COPY %16.sub_32438 %19:gpr32 = SUBSWri killed %18, 50, 0, implicit-def $nzcv439 Bcc 8, %bb.8, implicit $nzcv440 441 bb.9..backedge:442 successors: %bb.2(0x13b13b14), %bb.8(0x09d89d8a), %bb.3(0x13b13b14), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14)443 444 early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 %20, %16, %jump-table.0445 BR killed %21446 447 bb.2 (%ir-block.bb7):448 successors: %bb.8(0x80000000)449 450 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp451 $x0 = COPY %9452 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp453 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp454 B %bb.8455 456 bb.3 (%ir-block.bb9):457 successors: %bb.8(0x80000000)458 459 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp460 $x0 = COPY %0461 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp462 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp463 B %bb.8464 465 bb.4 (%ir-block.bb10):466 successors: %bb.8(0x80000000)467 468 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp469 $x0 = COPY %1470 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp471 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp472 B %bb.8473 474 bb.5 (%ir-block.bb11):475 successors: %bb.8(0x80000000)476 477 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp478 $x0 = COPY %2479 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp480 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp481 B %bb.8482 483 bb.6 (%ir-block.bb12):484 successors: %bb.8(0x80000000)485 486 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp487 $x0 = COPY %3488 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp489 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp490 B %bb.8491 492 bb.7 (%ir-block.bb13):493 successors: %bb.8(0x80000000)494 495 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp496 $x0 = COPY %4497 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp498 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp499 500 bb.8..backedge.backedge:501 successors: %bb.1(0x80000000)502 503 %23:gpr64sp = ADDXri %6, 1, 0504 %7:gpr64all = COPY %23505 B %bb.1506 507...508---509name: load_not_safe_to_move_consecutive_call510alignment: 4511exposesReturnsTwice: false512legalized: false513regBankSelected: false514selected: false515failedISel: false516tracksRegLiveness: true517hasWinCFI: false518registers:519 - { id: 0, class: gpr32, preferred-register: '' }520 - { id: 1, class: gpr32all, preferred-register: '' }521 - { id: 2, class: gpr32sp, preferred-register: '' }522 - { id: 3, class: gpr32, preferred-register: '' }523 - { id: 4, class: gpr32all, preferred-register: '' }524 - { id: 5, class: gpr32all, preferred-register: '' }525 - { id: 6, class: gpr32common, preferred-register: '' }526 - { id: 7, class: gpr32, preferred-register: '' }527 - { id: 8, class: gpr64common, preferred-register: '' }528 - { id: 9, class: gpr32, preferred-register: '' }529 - { id: 10, class: gpr32all, preferred-register: '' }530 - { id: 11, class: gpr32, preferred-register: '' }531 - { id: 12, class: gpr32, preferred-register: '' }532liveins:533 - { reg: '$w0', virtual-reg: '%6' }534frameInfo:535 isFrameAddressTaken: false536 isReturnAddressTaken: false537 hasStackMap: false538 hasPatchPoint: false539 stackSize: 0540 offsetAdjustment: 0541 maxAlignment: 1542 adjustsStack: true543 hasCalls: true544 stackProtector: ''545 maxCallFrameSize: 0546 cvBytesOfCalleeSavedRegisters: 0547 hasOpaqueSPAdjustment: false548 hasVAStart: false549 hasMustTailInVarArgFunc: false550 localFrameSize: 0551 savePoint: []552 restorePoint: []553fixedStack: []554stack: []555callSites: []556debugValueSubstitutions: []557constants: []558machineFunctionInfo: {}559body: |560 ; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call561 ; CHECK: bb.0.entry:562 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)563 ; CHECK-NEXT: liveins: $w0564 ; CHECK-NEXT: {{ $}}565 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0566 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv567 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv568 ; CHECK-NEXT: B %bb.1569 ; CHECK-NEXT: {{ $}}570 ; CHECK-NEXT: bb.1.for.body.preheader:571 ; CHECK-NEXT: successors: %bb.3(0x80000000)572 ; CHECK-NEXT: {{ $}}573 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A574 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)575 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp576 ; CHECK-NEXT: $w0 = COPY [[COPY]]577 ; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0578 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp579 ; CHECK-NEXT: B %bb.3580 ; CHECK-NEXT: {{ $}}581 ; CHECK-NEXT: bb.2.for.cond.cleanup:582 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3583 ; CHECK-NEXT: $w0 = COPY [[PHI]]584 ; CHECK-NEXT: RET_ReallyLR implicit $w0585 ; CHECK-NEXT: {{ $}}586 ; CHECK-NEXT: bb.3.for.body:587 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)588 ; CHECK-NEXT: {{ $}}589 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3590 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3591 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]592 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]593 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv594 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]595 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv596 ; CHECK-NEXT: B %bb.3597 bb.0.entry:598 successors: %bb.1(0x50000000), %bb.2(0x30000000)599 liveins: $w0600 601 %6:gpr32common = COPY $w0602 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv603 Bcc 11, %bb.2, implicit $nzcv604 B %bb.1605 606 bb.1.for.body.preheader:607 successors: %bb.3(0x80000000)608 609 %8:gpr64common = ADRP target-flags(aarch64-page) @A610 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)611 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp612 $w0 = COPY %6613 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0614 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp615 B %bb.3616 617 bb.2.for.cond.cleanup:618 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3619 $w0 = COPY %1620 RET_ReallyLR implicit $w0621 622 bb.3.for.body:623 successors: %bb.2(0x04000000), %bb.3(0x7c000000)624 625 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3626 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3627 %11:gpr32 = SDIVWr %3, %9628 %4:gpr32all = COPY %11629 %12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv630 %5:gpr32all = COPY %12631 Bcc 0, %bb.2, implicit $nzcv632 B %bb.3633 634...635---636name: load_not_safe_to_move_consecutive_call_use637alignment: 4638exposesReturnsTwice: false639legalized: false640regBankSelected: false641selected: false642failedISel: false643tracksRegLiveness: true644hasWinCFI: false645registers:646 - { id: 0, class: gpr32, preferred-register: '' }647 - { id: 1, class: gpr32all, preferred-register: '' }648 - { id: 2, class: gpr32sp, preferred-register: '' }649 - { id: 3, class: gpr32, preferred-register: '' }650 - { id: 4, class: gpr32all, preferred-register: '' }651 - { id: 5, class: gpr32all, preferred-register: '' }652 - { id: 6, class: gpr32common, preferred-register: '' }653 - { id: 7, class: gpr32, preferred-register: '' }654 - { id: 8, class: gpr64common, preferred-register: '' }655 - { id: 9, class: gpr32, preferred-register: '' }656 - { id: 10, class: gpr32all, preferred-register: '' }657 - { id: 11, class: gpr32, preferred-register: '' }658 - { id: 12, class: gpr32, preferred-register: '' }659liveins:660 - { reg: '$w0', virtual-reg: '%6' }661frameInfo:662 isFrameAddressTaken: false663 isReturnAddressTaken: false664 hasStackMap: false665 hasPatchPoint: false666 stackSize: 0667 offsetAdjustment: 0668 maxAlignment: 1669 adjustsStack: true670 hasCalls: true671 stackProtector: ''672 maxCallFrameSize: 0673 cvBytesOfCalleeSavedRegisters: 0674 hasOpaqueSPAdjustment: false675 hasVAStart: false676 hasMustTailInVarArgFunc: false677 localFrameSize: 0678 savePoint: []679 restorePoint: []680fixedStack: []681stack: []682callSites: []683debugValueSubstitutions: []684constants: []685machineFunctionInfo: {}686body: |687 ; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call_use688 ; CHECK: bb.0.entry:689 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)690 ; CHECK-NEXT: liveins: $w0691 ; CHECK-NEXT: {{ $}}692 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0693 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv694 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv695 ; CHECK-NEXT: B %bb.1696 ; CHECK-NEXT: {{ $}}697 ; CHECK-NEXT: bb.1.for.body.preheader:698 ; CHECK-NEXT: successors: %bb.3(0x80000000)699 ; CHECK-NEXT: {{ $}}700 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A701 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)702 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp703 ; CHECK-NEXT: $w0 = COPY [[LDRWui]]704 ; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0705 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp706 ; CHECK-NEXT: B %bb.3707 ; CHECK-NEXT: {{ $}}708 ; CHECK-NEXT: bb.2.for.cond.cleanup:709 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3710 ; CHECK-NEXT: $w0 = COPY [[PHI]]711 ; CHECK-NEXT: RET_ReallyLR implicit $w0712 ; CHECK-NEXT: {{ $}}713 ; CHECK-NEXT: bb.3.for.body:714 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)715 ; CHECK-NEXT: {{ $}}716 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3717 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3718 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]719 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]720 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv721 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]722 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv723 ; CHECK-NEXT: B %bb.3724 bb.0.entry:725 successors: %bb.1(0x50000000), %bb.2(0x30000000)726 liveins: $w0727 728 %6:gpr32common = COPY $w0729 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv730 Bcc 11, %bb.2, implicit $nzcv731 B %bb.1732 733 bb.1.for.body.preheader:734 successors: %bb.3(0x80000000)735 736 %8:gpr64common = ADRP target-flags(aarch64-page) @A737 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)738 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp739 $w0 = COPY %9740 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0741 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp742 B %bb.3743 744 bb.2.for.cond.cleanup:745 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3746 $w0 = COPY %1747 RET_ReallyLR implicit $w0748 749 bb.3.for.body:750 successors: %bb.2(0x04000000), %bb.3(0x7c000000)751 752 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3753 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3754 %11:gpr32 = SDIVWr %3, %9755 %4:gpr32all = COPY %11756 %12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv757 %5:gpr32all = COPY %12758 Bcc 0, %bb.2, implicit $nzcv759 B %bb.3760 761...762---763name: cant_sink_use_outside_loop764alignment: 4765exposesReturnsTwice: false766legalized: false767regBankSelected: false768selected: false769failedISel: false770tracksRegLiveness: true771hasWinCFI: false772registers:773 - { id: 0, class: gpr32all, preferred-register: '' }774 - { id: 1, class: gpr32all, preferred-register: '' }775 - { id: 2, class: gpr32all, preferred-register: '' }776 - { id: 3, class: gpr32sp, preferred-register: '' }777 - { id: 4, class: gpr32all, preferred-register: '' }778 - { id: 5, class: gpr32all, preferred-register: '' }779 - { id: 6, class: gpr32all, preferred-register: '' }780 - { id: 7, class: gpr32common, preferred-register: '' }781 - { id: 8, class: gpr32all, preferred-register: '' }782 - { id: 9, class: gpr32all, preferred-register: '' }783 - { id: 10, class: gpr32, preferred-register: '' }784 - { id: 11, class: gpr64common, preferred-register: '' }785 - { id: 12, class: gpr32, preferred-register: '' }786 - { id: 13, class: gpr32, preferred-register: '' }787 - { id: 14, class: gpr32, preferred-register: '' }788 - { id: 15, class: gpr32all, preferred-register: '' }789liveins:790 - { reg: '$w0', virtual-reg: '%7' }791frameInfo:792 isFrameAddressTaken: false793 isReturnAddressTaken: false794 hasStackMap: false795 hasPatchPoint: false796 stackSize: 0797 offsetAdjustment: 0798 maxAlignment: 1799 adjustsStack: true800 hasCalls: true801 stackProtector: ''802 maxCallFrameSize: 0803 cvBytesOfCalleeSavedRegisters: 0804 hasOpaqueSPAdjustment: false805 hasVAStart: false806 hasMustTailInVarArgFunc: false807 localFrameSize: 0808 savePoint: []809 restorePoint: []810fixedStack: []811stack: []812callSites: []813debugValueSubstitutions: []814constants: []815machineFunctionInfo: {}816body: |817 ; CHECK-LABEL: name: cant_sink_use_outside_loop818 ; CHECK: bb.0.entry:819 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.4(0x30000000)820 ; CHECK-NEXT: liveins: $w0821 ; CHECK-NEXT: {{ $}}822 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0823 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv824 ; CHECK-NEXT: Bcc 10, %bb.1, implicit $nzcv825 ; CHECK-NEXT: {{ $}}826 ; CHECK-NEXT: bb.4:827 ; CHECK-NEXT: successors: %bb.2(0x80000000)828 ; CHECK-NEXT: {{ $}}829 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY $wzr830 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]831 ; CHECK-NEXT: B %bb.2832 ; CHECK-NEXT: {{ $}}833 ; CHECK-NEXT: bb.1.for.body.preheader:834 ; CHECK-NEXT: successors: %bb.3(0x80000000)835 ; CHECK-NEXT: {{ $}}836 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A837 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)838 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[LDRWui]]839 ; CHECK-NEXT: B %bb.3840 ; CHECK-NEXT: {{ $}}841 ; CHECK-NEXT: bb.2.for.cond.cleanup:842 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.4, %5, %bb.5843 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32all = PHI [[COPY2]], %bb.4, [[COPY3]], %bb.5844 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp845 ; CHECK-NEXT: $w0 = COPY [[PHI1]]846 ; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0847 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp848 ; CHECK-NEXT: $w0 = COPY [[PHI]]849 ; CHECK-NEXT: RET_ReallyLR implicit $w0850 ; CHECK-NEXT: {{ $}}851 ; CHECK-NEXT: bb.3.for.body:852 ; CHECK-NEXT: successors: %bb.5(0x04000000), %bb.3(0x7c000000)853 ; CHECK-NEXT: {{ $}}854 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %6, %bb.3855 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv856 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]857 ; CHECK-NEXT: Bcc 1, %bb.3, implicit $nzcv858 ; CHECK-NEXT: {{ $}}859 ; CHECK-NEXT: bb.5:860 ; CHECK-NEXT: successors: %bb.2(0x80000000)861 ; CHECK-NEXT: {{ $}}862 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1863 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]]864 ; CHECK-NEXT: B %bb.2865 bb.0.entry:866 successors: %bb.1(0x50000000), %bb.2(0x30000000)867 liveins: $w0868 869 %7:gpr32common = COPY $w0870 %9:gpr32all = COPY $wzr871 %8:gpr32all = COPY %9872 %10:gpr32 = SUBSWri %7, 1, 0, implicit-def $nzcv873 Bcc 11, %bb.2, implicit $nzcv874 B %bb.1875 876 bb.1.for.body.preheader:877 successors: %bb.3(0x80000000)878 879 %11:gpr64common = ADRP target-flags(aarch64-page) @A880 %12:gpr32 = LDRWui killed %11, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)881 %0:gpr32all = COPY %12882 B %bb.3883 884 bb.2.for.cond.cleanup:885 %1:gpr32all = PHI %7, %bb.0, %5, %bb.3886 %2:gpr32all = PHI %8, %bb.0, %0, %bb.3887 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp888 $w0 = COPY %2889 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0890 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp891 $w0 = COPY %1892 RET_ReallyLR implicit $w0893 894 bb.3.for.body:895 successors: %bb.2(0x04000000), %bb.3(0x7c000000)896 897 %3:gpr32sp = PHI %7, %bb.1, %6, %bb.3898 %13:gpr32 = MOVi32imm 1899 %5:gpr32all = COPY %13900 %14:gpr32 = SUBSWri %3, 1, 0, implicit-def $nzcv901 %6:gpr32all = COPY %14902 Bcc 0, %bb.2, implicit $nzcv903 B %bb.3904 905...906---907name: use_is_not_a_copy908alignment: 4909exposesReturnsTwice: false910legalized: false911regBankSelected: false912selected: false913failedISel: false914tracksRegLiveness: true915hasWinCFI: false916registers:917 - { id: 0, class: gpr32, preferred-register: '' }918 - { id: 1, class: gpr32all, preferred-register: '' }919 - { id: 2, class: gpr32sp, preferred-register: '' }920 - { id: 3, class: gpr32, preferred-register: '' }921 - { id: 4, class: gpr32all, preferred-register: '' }922 - { id: 5, class: gpr32all, preferred-register: '' }923 - { id: 6, class: gpr32common, preferred-register: '' }924 - { id: 7, class: gpr32, preferred-register: '' }925 - { id: 8, class: gpr64common, preferred-register: '' }926 - { id: 9, class: gpr32, preferred-register: '' }927 - { id: 10, class: gpr32, preferred-register: '' }928 - { id: 11, class: gpr32, preferred-register: '' }929liveins:930 - { reg: '$w0', virtual-reg: '%6' }931frameInfo:932 isFrameAddressTaken: false933 isReturnAddressTaken: false934 hasStackMap: false935 hasPatchPoint: false936 stackSize: 0937 offsetAdjustment: 0938 maxAlignment: 1939 adjustsStack: false940 hasCalls: false941 stackProtector: ''942 maxCallFrameSize: 0943 cvBytesOfCalleeSavedRegisters: 0944 hasOpaqueSPAdjustment: false945 hasVAStart: false946 hasMustTailInVarArgFunc: false947 localFrameSize: 0948 savePoint: []949 restorePoint: []950fixedStack: []951stack: []952callSites: []953debugValueSubstitutions: []954constants: []955machineFunctionInfo: {}956body: |957 ; CHECK-LABEL: name: use_is_not_a_copy958 ; CHECK: bb.0.entry:959 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)960 ; CHECK-NEXT: liveins: $w0961 ; CHECK-NEXT: {{ $}}962 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0963 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv964 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv965 ; CHECK-NEXT: B %bb.1966 ; CHECK-NEXT: {{ $}}967 ; CHECK-NEXT: bb.1.for.body.preheader:968 ; CHECK-NEXT: successors: %bb.3(0x80000000)969 ; CHECK-NEXT: {{ $}}970 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A971 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)972 ; CHECK-NEXT: B %bb.3973 ; CHECK-NEXT: {{ $}}974 ; CHECK-NEXT: bb.2.for.cond.cleanup:975 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3976 ; CHECK-NEXT: $w0 = COPY [[PHI]]977 ; CHECK-NEXT: RET_ReallyLR implicit $w0978 ; CHECK-NEXT: {{ $}}979 ; CHECK-NEXT: bb.3.for.body:980 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)981 ; CHECK-NEXT: {{ $}}982 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3983 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3984 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]985 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]986 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv987 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]988 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv989 ; CHECK-NEXT: B %bb.3990 bb.0.entry:991 successors: %bb.1(0x50000000), %bb.2(0x30000000)992 liveins: $w0993 994 %6:gpr32common = COPY $w0995 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv996 Bcc 11, %bb.2, implicit $nzcv997 B %bb.1998 999 bb.1.for.body.preheader:1000 successors: %bb.3(0x80000000)1001 1002 %8:gpr64common = ADRP target-flags(aarch64-page) @A1003 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)1004 B %bb.31005 1006 bb.2.for.cond.cleanup:1007 %1:gpr32all = PHI %6, %bb.0, %4, %bb.31008 $w0 = COPY %11009 RET_ReallyLR implicit $w01010 1011 bb.3.for.body:1012 successors: %bb.2(0x04000000), %bb.3(0x7c000000)1013 1014 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.31015 %3:gpr32 = PHI %6, %bb.1, %4, %bb.31016 %10:gpr32 = SDIVWr %3, %91017 %4:gpr32all = COPY %101018 %11:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv1019 %5:gpr32all = COPY %111020 Bcc 0, %bb.2, implicit $nzcv1021 B %bb.31022 1023...1024---1025name: sink_add1026alignment: 161027exposesReturnsTwice: false1028legalized: false1029regBankSelected: false1030selected: false1031failedISel: false1032tracksRegLiveness: true1033hasWinCFI: false1034registers:1035 - { id: 0, class: gpr32sp, preferred-register: '' }1036 - { id: 1, class: gpr32all, preferred-register: '' }1037 - { id: 2, class: gpr32, preferred-register: '' }1038 - { id: 3, class: gpr32common, preferred-register: '' }1039 - { id: 4, class: gpr32sp, preferred-register: '' }1040 - { id: 5, class: gpr32, preferred-register: '' }1041 - { id: 6, class: gpr32all, preferred-register: '' }1042 - { id: 7, class: gpr32all, preferred-register: '' }1043 - { id: 8, class: gpr32all, preferred-register: '' }1044 - { id: 9, class: gpr64common, preferred-register: '' }1045 - { id: 10, class: gpr64common, preferred-register: '' }1046 - { id: 11, class: gpr32common, preferred-register: '' }1047 - { id: 12, class: gpr32common, preferred-register: '' }1048 - { id: 13, class: gpr32, preferred-register: '' }1049 - { id: 14, class: gpr32sp, preferred-register: '' }1050 - { id: 15, class: gpr32, preferred-register: '' }1051 - { id: 16, class: gpr32, preferred-register: '' }1052 - { id: 17, class: gpr32sp, preferred-register: '' }1053liveins:1054 - { reg: '$x0', virtual-reg: '%9' }1055 - { reg: '$x1', virtual-reg: '%10' }1056 - { reg: '$w2', virtual-reg: '%11' }1057frameInfo:1058 isFrameAddressTaken: false1059 isReturnAddressTaken: false1060 hasStackMap: false1061 hasPatchPoint: false1062 stackSize: 01063 offsetAdjustment: 01064 maxAlignment: 11065 adjustsStack: false1066 hasCalls: false1067 stackProtector: ''1068 maxCallFrameSize: 01069 cvBytesOfCalleeSavedRegisters: 01070 hasOpaqueSPAdjustment: false1071 hasVAStart: false1072 hasMustTailInVarArgFunc: false1073 localFrameSize: 01074 savePoint: []1075 restorePoint: []1076fixedStack: []1077stack: []1078callSites: []1079debugValueSubstitutions: []1080constants: []1081machineFunctionInfo: {}1082body: |1083 ; CHECK-LABEL: name: sink_add1084 ; CHECK: bb.0.entry:1085 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)1086 ; CHECK-NEXT: liveins: $x0, $x1, $w21087 ; CHECK-NEXT: {{ $}}1088 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w21089 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x11090 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x01091 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv1092 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv1093 ; CHECK-NEXT: B %bb.11094 ; CHECK-NEXT: {{ $}}1095 ; CHECK-NEXT: bb.1.for.body.preheader:1096 ; CHECK-NEXT: successors: %bb.3(0x80000000)1097 ; CHECK-NEXT: {{ $}}1098 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY2]], 0 :: (load (s32) from %ir.read, !tbaa !0)1099 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 01100 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[ADDWri]]1101 ; CHECK-NEXT: B %bb.31102 ; CHECK-NEXT: {{ $}}1103 ; CHECK-NEXT: bb.2.for.cond.cleanup:1104 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.31105 ; CHECK-NEXT: STRWui [[PHI]], [[COPY1]], 0 :: (store (s32) into %ir.write, !tbaa !0)1106 ; CHECK-NEXT: RET_ReallyLR1107 ; CHECK-NEXT: {{ $}}1108 ; CHECK-NEXT: bb.3.for.body:1109 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)1110 ; CHECK-NEXT: {{ $}}1111 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY3]], %bb.1, %8, %bb.31112 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.31113 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.31114 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]1115 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]1116 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv1117 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]1118 ; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 01119 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]1120 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv1121 ; CHECK-NEXT: B %bb.31122 bb.0.entry:1123 successors: %bb.1(0x50000000), %bb.2(0x30000000)1124 liveins: $x0, $x1, $w21125 1126 %11:gpr32common = COPY $w21127 %10:gpr64common = COPY $x11128 %9:gpr64common = COPY $x01129 %12:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)1130 %13:gpr32 = SUBSWri %11, 1, 0, implicit-def $nzcv1131 Bcc 11, %bb.2, implicit $nzcv1132 B %bb.11133 1134 bb.1.for.body.preheader:1135 successors: %bb.3(0x80000000)1136 1137 %14:gpr32sp = ADDWri %12, 42, 01138 %1:gpr32all = COPY %141139 B %bb.31140 1141 bb.2.for.cond.cleanup:1142 %2:gpr32 = PHI %11, %bb.0, %6, %bb.31143 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)1144 RET_ReallyLR1145 1146 bb.3.for.body:1147 successors: %bb.2(0x04000000), %bb.3(0x7c000000)1148 1149 %3:gpr32common = PHI %1, %bb.1, %8, %bb.31150 %4:gpr32sp = PHI %11, %bb.1, %7, %bb.31151 %5:gpr32 = PHI %11, %bb.1, %6, %bb.31152 %15:gpr32 = SDIVWr %5, %31153 %6:gpr32all = COPY %151154 %16:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv1155 %7:gpr32all = COPY %161156 %17:gpr32sp = ADDWri %3, 1, 01157 %8:gpr32all = COPY %171158 Bcc 0, %bb.2, implicit $nzcv1159 B %bb.31160 1161...1162---1163name: store_after_add1164alignment: 161165exposesReturnsTwice: false1166legalized: false1167regBankSelected: false1168selected: false1169failedISel: false1170tracksRegLiveness: true1171hasWinCFI: false1172registers:1173 - { id: 0, class: gpr32sp, preferred-register: '' }1174 - { id: 1, class: gpr32all, preferred-register: '' }1175 - { id: 2, class: gpr32, preferred-register: '' }1176 - { id: 3, class: gpr32common, preferred-register: '' }1177 - { id: 4, class: gpr32sp, preferred-register: '' }1178 - { id: 5, class: gpr32, preferred-register: '' }1179 - { id: 6, class: gpr32all, preferred-register: '' }1180 - { id: 7, class: gpr32all, preferred-register: '' }1181 - { id: 8, class: gpr32all, preferred-register: '' }1182 - { id: 9, class: gpr64common, preferred-register: '' }1183 - { id: 10, class: gpr64common, preferred-register: '' }1184 - { id: 11, class: gpr64common, preferred-register: '' }1185 - { id: 12, class: gpr32common, preferred-register: '' }1186 - { id: 13, class: gpr32common, preferred-register: '' }1187 - { id: 14, class: gpr32, preferred-register: '' }1188 - { id: 15, class: gpr32, preferred-register: '' }1189 - { id: 16, class: gpr32sp, preferred-register: '' }1190 - { id: 17, class: gpr32, preferred-register: '' }1191 - { id: 18, class: gpr32, preferred-register: '' }1192 - { id: 19, class: gpr32sp, preferred-register: '' }1193liveins:1194 - { reg: '$x0', virtual-reg: '%9' }1195 - { reg: '$x1', virtual-reg: '%10' }1196 - { reg: '$x2', virtual-reg: '%11' }1197 - { reg: '$w3', virtual-reg: '%12' }1198frameInfo:1199 isFrameAddressTaken: false1200 isReturnAddressTaken: false1201 hasStackMap: false1202 hasPatchPoint: false1203 stackSize: 01204 offsetAdjustment: 01205 maxAlignment: 11206 adjustsStack: false1207 hasCalls: false1208 stackProtector: ''1209 maxCallFrameSize: 01210 cvBytesOfCalleeSavedRegisters: 01211 hasOpaqueSPAdjustment: false1212 hasVAStart: false1213 hasMustTailInVarArgFunc: false1214 localFrameSize: 01215 savePoint: []1216 restorePoint: []1217fixedStack: []1218stack: []1219callSites: []1220debugValueSubstitutions: []1221constants: []1222machineFunctionInfo: {}1223body: |1224 ; CHECK-LABEL: name: store_after_add1225 ; CHECK: bb.0.entry:1226 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)1227 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $w31228 ; CHECK-NEXT: {{ $}}1229 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w31230 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x21231 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x11232 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x01233 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv1234 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv1235 ; CHECK-NEXT: B %bb.11236 ; CHECK-NEXT: {{ $}}1237 ; CHECK-NEXT: bb.1.for.body.preheader:1238 ; CHECK-NEXT: successors: %bb.3(0x80000000)1239 ; CHECK-NEXT: {{ $}}1240 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0)1241 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 01242 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]1243 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 431244 ; CHECK-NEXT: STRWui killed [[MOVi32imm]], [[COPY1]], 0 :: (store (s32) into %ir.store, !tbaa !0)1245 ; CHECK-NEXT: B %bb.31246 ; CHECK-NEXT: {{ $}}1247 ; CHECK-NEXT: bb.2.for.cond.cleanup:1248 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.31249 ; CHECK-NEXT: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0)1250 ; CHECK-NEXT: RET_ReallyLR1251 ; CHECK-NEXT: {{ $}}1252 ; CHECK-NEXT: bb.3.for.body:1253 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)1254 ; CHECK-NEXT: {{ $}}1255 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.31256 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.31257 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.31258 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]1259 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]1260 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv1261 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]1262 ; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 01263 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]1264 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv1265 ; CHECK-NEXT: B %bb.31266 bb.0.entry:1267 successors: %bb.1(0x50000000), %bb.2(0x30000000)1268 liveins: $x0, $x1, $x2, $w31269 1270 %12:gpr32common = COPY $w31271 %11:gpr64common = COPY $x21272 %10:gpr64common = COPY $x11273 %9:gpr64common = COPY $x01274 %13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)1275 %15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv1276 Bcc 11, %bb.2, implicit $nzcv1277 B %bb.11278 1279 bb.1.for.body.preheader:1280 successors: %bb.3(0x80000000)1281 1282 %16:gpr32sp = ADDWri %13, 42, 01283 %1:gpr32all = COPY %161284 %14:gpr32 = MOVi32imm 431285 STRWui killed %14, %11, 0 :: (store (s32) into %ir.store, !tbaa !0)1286 B %bb.31287 1288 bb.2.for.cond.cleanup:1289 %2:gpr32 = PHI %12, %bb.0, %6, %bb.31290 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)1291 RET_ReallyLR1292 1293 bb.3.for.body:1294 successors: %bb.2(0x04000000), %bb.3(0x7c000000)1295 1296 %3:gpr32common = PHI %1, %bb.1, %8, %bb.31297 %4:gpr32sp = PHI %12, %bb.1, %7, %bb.31298 %5:gpr32 = PHI %12, %bb.1, %6, %bb.31299 %17:gpr32 = SDIVWr %5, %31300 %6:gpr32all = COPY %171301 %18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv1302 %7:gpr32all = COPY %181303 %19:gpr32sp = ADDWri %3, 1, 01304 %8:gpr32all = COPY %191305 Bcc 0, %bb.2, implicit $nzcv1306 B %bb.31307 1308...1309---1310name: aliased_store_after_add1311alignment: 161312exposesReturnsTwice: false1313legalized: false1314regBankSelected: false1315selected: false1316failedISel: false1317tracksRegLiveness: true1318hasWinCFI: false1319registers:1320 - { id: 0, class: gpr32sp, preferred-register: '' }1321 - { id: 1, class: gpr32all, preferred-register: '' }1322 - { id: 2, class: gpr32, preferred-register: '' }1323 - { id: 3, class: gpr32common, preferred-register: '' }1324 - { id: 4, class: gpr32sp, preferred-register: '' }1325 - { id: 5, class: gpr32, preferred-register: '' }1326 - { id: 6, class: gpr32all, preferred-register: '' }1327 - { id: 7, class: gpr32all, preferred-register: '' }1328 - { id: 8, class: gpr32all, preferred-register: '' }1329 - { id: 9, class: gpr64common, preferred-register: '' }1330 - { id: 10, class: gpr64common, preferred-register: '' }1331 - { id: 11, class: gpr64common, preferred-register: '' }1332 - { id: 12, class: gpr32common, preferred-register: '' }1333 - { id: 13, class: gpr32common, preferred-register: '' }1334 - { id: 14, class: gpr32, preferred-register: '' }1335 - { id: 15, class: gpr32, preferred-register: '' }1336 - { id: 16, class: gpr32sp, preferred-register: '' }1337 - { id: 17, class: gpr32, preferred-register: '' }1338 - { id: 18, class: gpr32, preferred-register: '' }1339 - { id: 19, class: gpr32sp, preferred-register: '' }1340liveins:1341 - { reg: '$x0', virtual-reg: '%9' }1342 - { reg: '$x1', virtual-reg: '%10' }1343 - { reg: '$x2', virtual-reg: '%11' }1344 - { reg: '$w3', virtual-reg: '%12' }1345frameInfo:1346 isFrameAddressTaken: false1347 isReturnAddressTaken: false1348 hasStackMap: false1349 hasPatchPoint: false1350 stackSize: 01351 offsetAdjustment: 01352 maxAlignment: 11353 adjustsStack: false1354 hasCalls: false1355 stackProtector: ''1356 maxCallFrameSize: 01357 cvBytesOfCalleeSavedRegisters: 01358 hasOpaqueSPAdjustment: false1359 hasVAStart: false1360 hasMustTailInVarArgFunc: false1361 localFrameSize: 01362 savePoint: []1363 restorePoint: []1364fixedStack: []1365stack: []1366callSites: []1367debugValueSubstitutions: []1368constants: []1369machineFunctionInfo: {}1370body: |1371 ; CHECK-LABEL: name: aliased_store_after_add1372 ; CHECK: bb.0.entry:1373 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)1374 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $w31375 ; CHECK-NEXT: {{ $}}1376 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w31377 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x21378 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x11379 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x01380 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv1381 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv1382 ; CHECK-NEXT: B %bb.11383 ; CHECK-NEXT: {{ $}}1384 ; CHECK-NEXT: bb.1.for.body.preheader:1385 ; CHECK-NEXT: successors: %bb.3(0x80000000)1386 ; CHECK-NEXT: {{ $}}1387 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0)1388 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 01389 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]1390 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 431391 ; CHECK-NEXT: STRWui killed [[MOVi32imm]], [[COPY3]], 0 :: (store (s32) into %ir.read, !tbaa !0)1392 ; CHECK-NEXT: B %bb.31393 ; CHECK-NEXT: {{ $}}1394 ; CHECK-NEXT: bb.2.for.cond.cleanup:1395 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.31396 ; CHECK-NEXT: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0)1397 ; CHECK-NEXT: RET_ReallyLR1398 ; CHECK-NEXT: {{ $}}1399 ; CHECK-NEXT: bb.3.for.body:1400 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)1401 ; CHECK-NEXT: {{ $}}1402 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.31403 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.31404 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.31405 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]1406 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]1407 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv1408 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]1409 ; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 01410 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]1411 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv1412 ; CHECK-NEXT: B %bb.31413 bb.0.entry:1414 successors: %bb.1(0x50000000), %bb.2(0x30000000)1415 liveins: $x0, $x1, $x2, $w31416 1417 %12:gpr32common = COPY $w31418 %11:gpr64common = COPY $x21419 %10:gpr64common = COPY $x11420 %9:gpr64common = COPY $x01421 %13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)1422 %15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv1423 Bcc 11, %bb.2, implicit $nzcv1424 B %bb.11425 1426 bb.1.for.body.preheader:1427 successors: %bb.3(0x80000000)1428 1429 %16:gpr32sp = ADDWri %13, 42, 01430 %1:gpr32all = COPY %161431 %14:gpr32 = MOVi32imm 431432 STRWui killed %14, %9, 0 :: (store (s32) into %ir.read, !tbaa !0)1433 B %bb.31434 1435 bb.2.for.cond.cleanup:1436 %2:gpr32 = PHI %12, %bb.0, %6, %bb.31437 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)1438 RET_ReallyLR1439 1440 bb.3.for.body:1441 successors: %bb.2(0x04000000), %bb.3(0x7c000000)1442 1443 %3:gpr32common = PHI %1, %bb.1, %8, %bb.31444 %4:gpr32sp = PHI %12, %bb.1, %7, %bb.31445 %5:gpr32 = PHI %12, %bb.1, %6, %bb.31446 %17:gpr32 = SDIVWr %5, %31447 %6:gpr32all = COPY %171448 %18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv1449 %7:gpr32all = COPY %181450 %19:gpr32sp = ADDWri %3, 1, 01451 %8:gpr32all = COPY %191452 Bcc 0, %bb.2, implicit $nzcv1453 B %bb.31454 1455...1456 1457