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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc < %s -mtriple=aarch64 -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple=aarch64 -mattr=+neon -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i16 @testmhhs(half %x) {6; CHECK-SD-LABEL: testmhhs:7; CHECK-SD: // %bb.0: // %entry8; CHECK-SD-NEXT: fcvt s0, h09; CHECK-SD-NEXT: fcvtas w0, s010; CHECK-SD-NEXT: ret11;12; CHECK-GI-LABEL: testmhhs:13; CHECK-GI: // %bb.0: // %entry14; CHECK-GI-NEXT: fcvt s0, h015; CHECK-GI-NEXT: fcvtas x0, s016; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x017; CHECK-GI-NEXT: ret18entry:19 %0 = tail call i32 @llvm.lround.i32.f16(half %x)20 %conv = trunc i32 %0 to i1621 ret i16 %conv22}23 24define i32 @testmhws(half %x) {25; CHECK-SD-LABEL: testmhws:26; CHECK-SD: // %bb.0: // %entry27; CHECK-SD-NEXT: fcvt s0, h028; CHECK-SD-NEXT: fcvtas w0, s029; CHECK-SD-NEXT: ret30;31; CHECK-GI-LABEL: testmhws:32; CHECK-GI: // %bb.0: // %entry33; CHECK-GI-NEXT: fcvt s0, h034; CHECK-GI-NEXT: fcvtas x0, s035; CHECK-GI-NEXT: // kill: def $w0 killed $w0 killed $x036; CHECK-GI-NEXT: ret37entry:38 %0 = tail call i32 @llvm.lround.i32.f16(half %x)39 ret i32 %040}41 42define i64 @testmhxs(half %x) {43; CHECK-SD-LABEL: testmhxs:44; CHECK-SD: // %bb.0: // %entry45; CHECK-SD-NEXT: fcvt s0, h046; CHECK-SD-NEXT: fcvtas w8, s047; CHECK-SD-NEXT: sxtw x0, w848; CHECK-SD-NEXT: ret49;50; CHECK-GI-LABEL: testmhxs:51; CHECK-GI: // %bb.0: // %entry52; CHECK-GI-NEXT: fcvt s0, h053; CHECK-GI-NEXT: fcvtas x8, s054; CHECK-GI-NEXT: sxtw x0, w855; CHECK-GI-NEXT: ret56entry:57 %0 = tail call i32 @llvm.lround.i32.f16(half %x)58 %conv = sext i32 %0 to i6459 ret i64 %conv60}61;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:62; CHECK: {{.*}}63