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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -enable-subreg-liveness -force-streaming -mattr=+sve2,+sme2,+lut,+bf16 | FileCheck %s3 4define { <vscale x 8 x i16>, <vscale x 8 x i16> } @test_luti4_lane_i16_x2_tuple(i64 %stride, ptr %ptr, <vscale x 16 x i8> %indices) {5; CHECK-LABEL: test_luti4_lane_i16_x2_tuple:6; CHECK: // %bb.0: // %entry7; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill8; CHECK-NEXT: addvl sp, sp, #-39; CHECK-NEXT: str p8, [sp, #7, mul vl] // 2-byte Spill10; CHECK-NEXT: str z12, [sp, #1, mul vl] // 16-byte Folded Spill11; CHECK-NEXT: str z11, [sp, #2, mul vl] // 16-byte Folded Spill12; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG13; CHECK-NEXT: .cfi_offset w29, -1614; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 8 * VG - 1615; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d12 @ cfa - 16 * VG - 1616; CHECK-NEXT: ptrue pn8.b17; CHECK-NEXT: add x8, x1, x018; CHECK-NEXT: ld1h { z3.h, z11.h }, pn8/z, [x1]19; CHECK-NEXT: ld1h { z4.h, z12.h }, pn8/z, [x8]20; CHECK-NEXT: luti4 z2.h, { z3.h, z4.h }, z0[0]21; CHECK-NEXT: luti4 z1.h, { z11.h, z12.h }, z0[0]22; CHECK-NEXT: ldr z12, [sp, #1, mul vl] // 16-byte Folded Reload23; CHECK-NEXT: ldr z11, [sp, #2, mul vl] // 16-byte Folded Reload24; CHECK-NEXT: ldr p8, [sp, #7, mul vl] // 2-byte Reload25; CHECK-NEXT: mov z0.d, z2.d26; CHECK-NEXT: addvl sp, sp, #327; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload28; CHECK-NEXT: ret29entry:30 %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()31 %1 = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.ld1.pn.x2.nxv8i16(target("aarch64.svcount") %0, ptr %ptr)32 %2 = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %1, 033 %3 = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %1, 134 %arrayidx2 = getelementptr inbounds i8, ptr %ptr, i64 %stride35 %4 = tail call { <vscale x 8 x i16>, <vscale x 8 x i16> } @llvm.aarch64.sve.ld1.pn.x2.nxv8i16(target("aarch64.svcount") %0, ptr %arrayidx2)36 %5 = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %4, 037 %6 = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %4, 138 %res1 = tail call <vscale x 8 x i16> @llvm.aarch64.sve.luti4.lane.x2.nxv8i16(<vscale x 8 x i16> %2, <vscale x 8 x i16> %5, <vscale x 16 x i8> %indices, i32 0)39 %res2 = tail call <vscale x 8 x i16> @llvm.aarch64.sve.luti4.lane.x2.nxv8i16(<vscale x 8 x i16> %3, <vscale x 8 x i16> %6, <vscale x 16 x i8> %indices, i32 0)40 %ins1 = insertvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } poison, <vscale x 8 x i16> %res1, 041 %ins2 = insertvalue { <vscale x 8 x i16>, <vscale x 8 x i16> } %ins1, <vscale x 8 x i16> %res2, 142 ret { <vscale x 8 x i16>, <vscale x 8 x i16> } %ins243}44 45define { <vscale x 8 x half>, <vscale x 8 x half> } @test_luti4_lane_f16_x2_tuple(i64 %stride, ptr %ptr, <vscale x 16 x i8> %indices) {46; CHECK-LABEL: test_luti4_lane_f16_x2_tuple:47; CHECK: // %bb.0: // %entry48; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill49; CHECK-NEXT: addvl sp, sp, #-350; CHECK-NEXT: str p8, [sp, #7, mul vl] // 2-byte Spill51; CHECK-NEXT: str z12, [sp, #1, mul vl] // 16-byte Folded Spill52; CHECK-NEXT: str z11, [sp, #2, mul vl] // 16-byte Folded Spill53; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG54; CHECK-NEXT: .cfi_offset w29, -1655; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 8 * VG - 1656; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d12 @ cfa - 16 * VG - 1657; CHECK-NEXT: ptrue pn8.b58; CHECK-NEXT: add x8, x1, x059; CHECK-NEXT: ld1h { z3.h, z11.h }, pn8/z, [x1]60; CHECK-NEXT: ld1h { z4.h, z12.h }, pn8/z, [x8]61; CHECK-NEXT: luti4 z2.h, { z3.h, z4.h }, z0[0]62; CHECK-NEXT: luti4 z1.h, { z11.h, z12.h }, z0[0]63; CHECK-NEXT: ldr z12, [sp, #1, mul vl] // 16-byte Folded Reload64; CHECK-NEXT: ldr z11, [sp, #2, mul vl] // 16-byte Folded Reload65; CHECK-NEXT: ldr p8, [sp, #7, mul vl] // 2-byte Reload66; CHECK-NEXT: mov z0.d, z2.d67; CHECK-NEXT: addvl sp, sp, #368; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload69; CHECK-NEXT: ret70entry:71 %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()72 %1 = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.ld1.pn.x2.nxv8f16(target("aarch64.svcount") %0, ptr %ptr)73 %2 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %1, 074 %3 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %1, 175 %arrayidx2 = getelementptr inbounds i8, ptr %ptr, i64 %stride76 %4 = tail call { <vscale x 8 x half>, <vscale x 8 x half> } @llvm.aarch64.sve.ld1.pn.x2.nxv8f16(target("aarch64.svcount") %0, ptr %arrayidx2)77 %5 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %4, 078 %6 = extractvalue { <vscale x 8 x half>, <vscale x 8 x half> } %4, 179 %res1 = tail call <vscale x 8 x half> @llvm.aarch64.sve.luti4.lane.x2.nxv8f16(<vscale x 8 x half> %2, <vscale x 8 x half> %5, <vscale x 16 x i8> %indices, i32 0)80 %res2 = tail call <vscale x 8 x half> @llvm.aarch64.sve.luti4.lane.x2.nxv8f16(<vscale x 8 x half> %3, <vscale x 8 x half> %6, <vscale x 16 x i8> %indices, i32 0)81 %ins1 = insertvalue { <vscale x 8 x half>, <vscale x 8 x half> } poison, <vscale x 8 x half> %res1, 082 %ins2 = insertvalue { <vscale x 8 x half>, <vscale x 8 x half> } %ins1, <vscale x 8 x half> %res2, 183 ret { <vscale x 8 x half>, <vscale x 8 x half> } %ins284}85 86define { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @test_luti4_lane_bf16_x2_tuple(i64 %stride, ptr %ptr, <vscale x 16 x i8> %indices) {87; CHECK-LABEL: test_luti4_lane_bf16_x2_tuple:88; CHECK: // %bb.0: // %entry89; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill90; CHECK-NEXT: addvl sp, sp, #-391; CHECK-NEXT: str p8, [sp, #7, mul vl] // 2-byte Spill92; CHECK-NEXT: str z12, [sp, #1, mul vl] // 16-byte Folded Spill93; CHECK-NEXT: str z11, [sp, #2, mul vl] // 16-byte Folded Spill94; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG95; CHECK-NEXT: .cfi_offset w29, -1696; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 8 * VG - 1697; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d12 @ cfa - 16 * VG - 1698; CHECK-NEXT: ptrue pn8.b99; CHECK-NEXT: add x8, x1, x0100; CHECK-NEXT: ld1h { z3.h, z11.h }, pn8/z, [x1]101; CHECK-NEXT: ld1h { z4.h, z12.h }, pn8/z, [x8]102; CHECK-NEXT: luti4 z2.h, { z3.h, z4.h }, z0[0]103; CHECK-NEXT: luti4 z1.h, { z11.h, z12.h }, z0[0]104; CHECK-NEXT: ldr z12, [sp, #1, mul vl] // 16-byte Folded Reload105; CHECK-NEXT: ldr z11, [sp, #2, mul vl] // 16-byte Folded Reload106; CHECK-NEXT: ldr p8, [sp, #7, mul vl] // 2-byte Reload107; CHECK-NEXT: mov z0.d, z2.d108; CHECK-NEXT: addvl sp, sp, #3109; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload110; CHECK-NEXT: ret111entry:112 %0 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()113 %1 = tail call { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @llvm.aarch64.sve.ld1.pn.x2.nxv8bf16(target("aarch64.svcount") %0, ptr %ptr)114 %2 = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } %1, 0115 %3 = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } %1, 1116 %arrayidx2 = getelementptr inbounds i8, ptr %ptr, i64 %stride117 %4 = tail call { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } @llvm.aarch64.sve.ld1.pn.x2.nxv8bf16(target("aarch64.svcount") %0, ptr %arrayidx2)118 %5 = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } %4, 0119 %6 = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } %4, 1120 %res1 = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.luti4.lane.x2.nxv8bf16(<vscale x 8 x bfloat> %2, <vscale x 8 x bfloat> %5, <vscale x 16 x i8> %indices, i32 0)121 %res2 = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.luti4.lane.x2.nxv8bf16(<vscale x 8 x bfloat> %3, <vscale x 8 x bfloat> %6, <vscale x 16 x i8> %indices, i32 0)122 %ins1 = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } poison, <vscale x 8 x bfloat> %res1, 0123 %ins2 = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } %ins1, <vscale x 8 x bfloat> %res2, 1124 ret { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } %ins2125}126