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1# RUN: llc -run-pass=machine-combiner -o - -simplify-mir -mtriple=arm64-apple-iphoneos %s | FileCheck %s2 3# Can create FMADD, because both the fmul and fadd have all fast-math flags.4#5# CHECK-LABEL: name: scalar_fmadd_fast6# CHECK: [[C:%.*]]:fpr32 = COPY $s27# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s18# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s09# CHECK-NEXT: :fpr32 = nnan ninf nsz arcp contract afn reassoc FMADDSrrr [[B]], [[A]], [[C]], implicit $fpcr10---11name: scalar_fmadd_fast12alignment: 413tracksRegLiveness: true14registers:15 - { id: 0, class: fpr32 }16 - { id: 1, class: fpr32 }17 - { id: 2, class: fpr32 }18 - { id: 3, class: fpr32 }19 - { id: 4, class: fpr32 }20liveins:21 - { reg: '$s0', virtual-reg: '%0' }22 - { reg: '$s1', virtual-reg: '%1' }23 - { reg: '$s2', virtual-reg: '%2' }24frameInfo:25 maxAlignment: 126 maxCallFrameSize: 027machineFunctionInfo: {}28body: |29 bb.0.entry:30 liveins: $s0, $s1, $s231 32 %2:fpr32 = COPY $s233 %1:fpr32 = COPY $s134 %0:fpr32 = COPY $s035 %3:fpr32 = nnan ninf nsz arcp contract afn reassoc FMULSrr %1, %0, implicit $fpcr36 %4:fpr32 = nnan ninf nsz arcp contract afn reassoc FADDSrr killed %3, %2, implicit $fpcr37 $s0 = COPY %438 RET_ReallyLR implicit $s039 40...41 42# Can create FMADD, because both the fmul and fadd have the contract fast-math flag.43#44# CHECK-LABEL: name: scalar_fmadd_contract45# CHECK: [[C:%.*]]:fpr32 = COPY $s246# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s147# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s048# CHECK-NEXT: :fpr32 = contract FMADDSrrr [[B]], [[A]], [[C]], implicit $fpcr49 50---51name: scalar_fmadd_contract52alignment: 453tracksRegLiveness: true54registers:55 - { id: 0, class: fpr32 }56 - { id: 1, class: fpr32 }57 - { id: 2, class: fpr32 }58 - { id: 3, class: fpr32 }59 - { id: 4, class: fpr32 }60liveins:61 - { reg: '$s0', virtual-reg: '%0' }62 - { reg: '$s1', virtual-reg: '%1' }63 - { reg: '$s2', virtual-reg: '%2' }64frameInfo:65 maxAlignment: 166 maxCallFrameSize: 067machineFunctionInfo: {}68body: |69 bb.0.entry:70 liveins: $s0, $s1, $s271 72 %2:fpr32 = COPY $s273 %1:fpr32 = COPY $s174 %0:fpr32 = COPY $s075 %3:fpr32 = contract FMULSrr %1, %0, implicit $fpcr76 %4:fpr32 = contract FADDSrr killed %3, %2, implicit $fpcr77 $s0 = COPY %478 RET_ReallyLR implicit $s079 80...81 82# Do not create FMADD, because we don't have the contract flag on the FADD.83 84# CHECK-LABEL: name: scalar_fmadd_contract_op085# CHECK: [[C:%.*]]:fpr32 = COPY $s286# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s187# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s088# CHECK-NEXT: [[MUL:%.*]]:fpr32 = contract FMULSrr [[B]], [[A]], implicit $fpcr89# CHECK-NEXT: fpr32 = FADDSrr killed [[MUL]], [[C]], implicit $fpcr90---91name: scalar_fmadd_contract_op092alignment: 493tracksRegLiveness: true94registers:95 - { id: 0, class: fpr32 }96 - { id: 1, class: fpr32 }97 - { id: 2, class: fpr32 }98 - { id: 3, class: fpr32 }99 - { id: 4, class: fpr32 }100liveins:101 - { reg: '$s0', virtual-reg: '%0' }102 - { reg: '$s1', virtual-reg: '%1' }103 - { reg: '$s2', virtual-reg: '%2' }104frameInfo:105 maxAlignment: 1106 maxCallFrameSize: 0107machineFunctionInfo: {}108body: |109 bb.0.entry:110 liveins: $s0, $s1, $s2111 112 %2:fpr32 = COPY $s2113 %1:fpr32 = COPY $s1114 %0:fpr32 = COPY $s0115 %3:fpr32 = contract FMULSrr %1, %0, implicit $fpcr116 %4:fpr32 = FADDSrr killed %3, %2, implicit $fpcr117 $s0 = COPY %4118 RET_ReallyLR implicit $s0119 120...121 122# Do create FMADD, because we have the contract flag on the FADD.123#124# CHECK-LABEL: name: scalar_fmadd_contract_op1125# CHECK: [[C:%.*]]:fpr32 = COPY $s2126# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s1127# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s0128# CHECK-NEXT: :fpr32 = contract FMADDSrrr [[B]], [[A]], [[C]], implicit $fpcr129 130---131name: scalar_fmadd_contract_op1132alignment: 4133tracksRegLiveness: true134registers:135 - { id: 0, class: fpr32 }136 - { id: 1, class: fpr32 }137 - { id: 2, class: fpr32 }138 - { id: 3, class: fpr32 }139 - { id: 4, class: fpr32 }140liveins:141 - { reg: '$s0', virtual-reg: '%0' }142 - { reg: '$s1', virtual-reg: '%1' }143 - { reg: '$s2', virtual-reg: '%2' }144frameInfo:145 maxAlignment: 1146 maxCallFrameSize: 0147machineFunctionInfo: {}148body: |149 bb.0.entry:150 liveins: $s0, $s1, $s2151 152 %2:fpr32 = COPY $s2153 %1:fpr32 = COPY $s1154 %0:fpr32 = COPY $s0155 %3:fpr32 = FMULSrr %1, %0, implicit $fpcr156 %4:fpr32 = contract FADDSrr killed %3, %2, implicit $fpcr157 $s0 = COPY %4158 RET_ReallyLR implicit $s0159 160...161 162# Do not create FMADD, as nsz flag does not allow it.163#164# CHECK-LABEL: name: scalar_fmadd_nsz165# CHECK: [[C:%.*]]:fpr32 = COPY $s2166# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s1167# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s0168# CHECK-NEXT: [[MUL:%.*]]:fpr32 = nsz FMULSrr [[B]], [[A]], implicit $fpcr169# CHECK-NEXT: fpr32 = nsz FADDSrr killed [[MUL]], [[C]], implicit $fpcr170 171---172name: scalar_fmadd_nsz173alignment: 4174tracksRegLiveness: true175registers:176 - { id: 0, class: fpr32 }177 - { id: 1, class: fpr32 }178 - { id: 2, class: fpr32 }179 - { id: 3, class: fpr32 }180 - { id: 4, class: fpr32 }181liveins:182 - { reg: '$s0', virtual-reg: '%0' }183 - { reg: '$s1', virtual-reg: '%1' }184 - { reg: '$s2', virtual-reg: '%2' }185frameInfo:186 maxAlignment: 1187 maxCallFrameSize: 0188machineFunctionInfo: {}189body: |190 bb.0.entry:191 liveins: $s0, $s1, $s2192 193 %2:fpr32 = COPY $s2194 %1:fpr32 = COPY $s1195 %0:fpr32 = COPY $s0196 %3:fpr32 = nsz FMULSrr %1, %0, implicit $fpcr197 %4:fpr32 = nsz FADDSrr killed %3, %2, implicit $fpcr198 $s0 = COPY %4199 RET_ReallyLR implicit $s0200 201...202 203# Can create FMLA, because both the fmul and fadd have all fast-math flags.204#205# CHECK-LABEL: name: vector_fmadd_fast206# CHECK: [[C:%.*]]:fpr128 = COPY $q2207# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1208# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0209# CHECK-NEXT: fpr128 = nnan ninf nsz arcp contract afn reassoc FMLAv2f64 [[C]], [[B]], [[A]], implicit $fpcr210---211name: vector_fmadd_fast212alignment: 4213tracksRegLiveness: true214registers:215 - { id: 0, class: fpr128 }216 - { id: 1, class: fpr128 }217 - { id: 2, class: fpr128 }218 - { id: 3, class: fpr128 }219 - { id: 4, class: fpr128 }220liveins:221 - { reg: '$q0', virtual-reg: '%0' }222 - { reg: '$q1', virtual-reg: '%1' }223 - { reg: '$q2', virtual-reg: '%2' }224frameInfo:225 maxAlignment: 1226 maxCallFrameSize: 0227machineFunctionInfo: {}228body: |229 bb.0.entry:230 liveins: $q0, $q1, $q2231 232 %2:fpr128 = COPY $q2233 %1:fpr128 = COPY $q1234 %0:fpr128 = COPY $q0235 %3:fpr128 = nnan ninf nsz arcp contract afn reassoc FMULv2f64 %1, %0, implicit $fpcr236 %4:fpr128 = nnan ninf nsz arcp contract afn reassoc FADDv2f64 killed %3, %2, implicit $fpcr237 $q0 = COPY %4238 RET_ReallyLR implicit $q0239 240...241 242# Can create FMLA, because both the fmul and fadd have the contract fast-math flag.243#244# CHECK-LABEL: name: vector_fmadd_contract245# CHECK: [[C:%.*]]:fpr128 = COPY $q2246# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1247# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0248# CHECK-NEXT: fpr128 = contract FMLAv2f64 [[C]], [[B]], [[A]], implicit $fpcr249---250name: vector_fmadd_contract251alignment: 4252tracksRegLiveness: true253registers:254 - { id: 0, class: fpr128 }255 - { id: 1, class: fpr128 }256 - { id: 2, class: fpr128 }257 - { id: 3, class: fpr128 }258 - { id: 4, class: fpr128 }259liveins:260 - { reg: '$q0', virtual-reg: '%0' }261 - { reg: '$q1', virtual-reg: '%1' }262 - { reg: '$q2', virtual-reg: '%2' }263frameInfo:264 maxAlignment: 1265 maxCallFrameSize: 0266machineFunctionInfo: {}267body: |268 bb.0.entry:269 liveins: $q0, $q1, $q2270 271 %2:fpr128 = COPY $q2272 %1:fpr128 = COPY $q1273 %0:fpr128 = COPY $q0274 %3:fpr128 = contract FMULv2f64 %1, %0, implicit $fpcr275 %4:fpr128 = contract FADDv2f64 killed %3, %2, implicit $fpcr276 $q0 = COPY %4277 RET_ReallyLR implicit $q0278 279...280 281# Do not create FMLA, because we don't have the contract flag on the FADD.282#283# CHECK-LABEL: name: vector_fmadd_contract_op0284# CHECK: [[C:%.*]]:fpr128 = COPY $q2285# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1286# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0287# CHECK-NEXT: [[MUL:%.*]]:fpr128 = contract FMULv2f64 [[B]], [[A]], implicit $fpcr288# CHECK-NEXT: fpr128 = FADDv2f64 killed [[MUL]], [[C]], implicit $fpcr289---290name: vector_fmadd_contract_op0291alignment: 4292tracksRegLiveness: true293registers:294 - { id: 0, class: fpr128 }295 - { id: 1, class: fpr128 }296 - { id: 2, class: fpr128 }297 - { id: 3, class: fpr128 }298 - { id: 4, class: fpr128 }299liveins:300 - { reg: '$q0', virtual-reg: '%0' }301 - { reg: '$q1', virtual-reg: '%1' }302 - { reg: '$q2', virtual-reg: '%2' }303frameInfo:304 maxAlignment: 1305 maxCallFrameSize: 0306machineFunctionInfo: {}307body: |308 bb.0.entry:309 liveins: $q0, $q1, $q2310 311 %2:fpr128 = COPY $q2312 %1:fpr128 = COPY $q1313 %0:fpr128 = COPY $q0314 %3:fpr128 = contract FMULv2f64 %1, %0, implicit $fpcr315 %4:fpr128 = FADDv2f64 killed %3, %2, implicit $fpcr316 $q0 = COPY %4317 RET_ReallyLR implicit $q0318 319...320 321# Do create FMLA, because we have the contract flag on the FADD.322#323# CHECK-LABEL: name: vector_fmadd_contract_op1324# CHECK: [[C:%.*]]:fpr128 = COPY $q2325# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1326# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0327# CHECK-NEXT: fpr128 = contract FMLAv2f64 [[C]], [[B]], [[A]], implicit $fpcr328 329---330name: vector_fmadd_contract_op1331alignment: 4332tracksRegLiveness: true333registers:334 - { id: 0, class: fpr128 }335 - { id: 1, class: fpr128 }336 - { id: 2, class: fpr128 }337 - { id: 3, class: fpr128 }338 - { id: 4, class: fpr128 }339liveins:340 - { reg: '$q0', virtual-reg: '%0' }341 - { reg: '$q1', virtual-reg: '%1' }342 - { reg: '$q2', virtual-reg: '%2' }343frameInfo:344 maxAlignment: 1345 maxCallFrameSize: 0346machineFunctionInfo: {}347body: |348 bb.0.entry:349 liveins: $q0, $q1, $q2350 351 %2:fpr128 = COPY $q2352 %1:fpr128 = COPY $q1353 %0:fpr128 = COPY $q0354 %3:fpr128 = FMULv2f64 %1, %0, implicit $fpcr355 %4:fpr128 = contract FADDv2f64 killed %3, %2, implicit $fpcr356 $q0 = COPY %4357 RET_ReallyLR implicit $q0358 359...360 361# Do not create FMLA, as nsz flag does not allow it.362#363# CHECK-LABEL: name: vector_fmadd_nsz364# CHECK: [[C:%.*]]:fpr128 = COPY $q2365# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1366# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0367# CHECK-NEXT: [[MUL:%.*]]:fpr128 = nsz FMULv2f64 [[B]], [[A]], implicit $fpcr368# CHECK-NEXT: fpr128 = nsz FADDv2f64 killed [[MUL]], [[C]], implicit $fpcr369---370name: vector_fmadd_nsz371alignment: 4372tracksRegLiveness: true373registers:374 - { id: 0, class: fpr128 }375 - { id: 1, class: fpr128 }376 - { id: 2, class: fpr128 }377 - { id: 3, class: fpr128 }378 - { id: 4, class: fpr128 }379liveins:380 - { reg: '$q0', virtual-reg: '%0' }381 - { reg: '$q1', virtual-reg: '%1' }382 - { reg: '$q2', virtual-reg: '%2' }383frameInfo:384 maxAlignment: 1385 maxCallFrameSize: 0386machineFunctionInfo: {}387body: |388 bb.0.entry:389 liveins: $q0, $q1, $q2390 391 %2:fpr128 = COPY $q2392 %1:fpr128 = COPY $q1393 %0:fpr128 = COPY $q0394 %3:fpr128 = nsz FMULv2f64 %1, %0, implicit $fpcr395 %4:fpr128 = nsz FADDv2f64 killed %3, %2, implicit $fpcr396 $q0 = COPY %4397 RET_ReallyLR implicit $q0398 399...400