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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=neoverse-n2 < %s | FileCheck %s3 4; Incremental updates of the instruction depths should be enough for this test5; case.6; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=neoverse-n2 \7; RUN: -machine-combiner-inc-threshold=0 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s8 9; Verify that the first two adds are independent regardless of how the inputs are10; commuted. The destination registers are used as source registers for the third add.11 12define float @reassociate_adds1(float %x0, float %x1, float %x2, float %x3) {13; CHECK-LABEL: reassociate_adds1:14; CHECK: // %bb.0:15; CHECK-NEXT: fadd s0, s0, s116; CHECK-NEXT: fadd s0, s0, s217; CHECK-NEXT: fadd s0, s0, s318; CHECK-NEXT: ret19 %t0 = fadd float %x0, %x120 %t1 = fadd float %t0, %x221 %t2 = fadd float %t1, %x322 ret float %t223}24 25define float @reassociate_adds1_fast(float %x0, float %x1, float %x2, float %x3) {26; CHECK-LABEL: reassociate_adds1_fast:27; CHECK: // %bb.0:28; CHECK-NEXT: fadd s0, s0, s129; CHECK-NEXT: fadd s1, s2, s330; CHECK-NEXT: fadd s0, s0, s131; CHECK-NEXT: ret32 %t0 = fadd fast float %x0, %x133 %t1 = fadd fast float %t0, %x234 %t2 = fadd fast float %t1, %x335 ret float %t236}37 38define float @reassociate_adds1_reassoc(float %x0, float %x1, float %x2, float %x3) {39; CHECK-LABEL: reassociate_adds1_reassoc:40; CHECK: // %bb.0:41; CHECK-NEXT: fadd s0, s0, s142; CHECK-NEXT: fadd s1, s2, s343; CHECK-NEXT: fadd s0, s0, s144; CHECK-NEXT: ret45 %t0 = fadd reassoc nsz float %x0, %x146 %t1 = fadd reassoc nsz float %t0, %x247 %t2 = fadd reassoc nsz float %t1, %x348 ret float %t249}50 51define float @reassociate_adds2(float %x0, float %x1, float %x2, float %x3) {52; CHECK-LABEL: reassociate_adds2:53; CHECK: // %bb.0:54; CHECK-NEXT: fadd s0, s0, s155; CHECK-NEXT: fadd s0, s2, s056; CHECK-NEXT: fadd s0, s0, s357; CHECK-NEXT: ret58 %t0 = fadd float %x0, %x159 %t1 = fadd float %x2, %t060 %t2 = fadd float %t1, %x361 ret float %t262}63 64define float @reassociate_adds2_reassoc(float %x0, float %x1, float %x2, float %x3) {65; CHECK-LABEL: reassociate_adds2_reassoc:66; CHECK: // %bb.0:67; CHECK-NEXT: fadd s0, s0, s168; CHECK-NEXT: fadd s1, s2, s369; CHECK-NEXT: fadd s0, s1, s070; CHECK-NEXT: ret71 %t0 = fadd reassoc nsz float %x0, %x172 %t1 = fadd reassoc nsz float %x2, %t073 %t2 = fadd reassoc nsz float %t1, %x374 ret float %t275}76 77define float @reassociate_adds3(float %x0, float %x1, float %x2, float %x3) {78; CHECK-LABEL: reassociate_adds3:79; CHECK: // %bb.0:80; CHECK-NEXT: fadd s0, s0, s181; CHECK-NEXT: fadd s0, s0, s282; CHECK-NEXT: fadd s0, s3, s083; CHECK-NEXT: ret84 %t0 = fadd float %x0, %x185 %t1 = fadd float %t0, %x286 %t2 = fadd float %x3, %t187 ret float %t288}89 90define float @reassociate_adds3_reassoc(float %x0, float %x1, float %x2, float %x3) {91; CHECK-LABEL: reassociate_adds3_reassoc:92; CHECK: // %bb.0:93; CHECK-NEXT: fadd s0, s0, s194; CHECK-NEXT: fadd s1, s3, s295; CHECK-NEXT: fadd s0, s1, s096; CHECK-NEXT: ret97 %t0 = fadd reassoc nsz float %x0, %x198 %t1 = fadd reassoc nsz float %t0, %x299 %t2 = fadd reassoc nsz float %x3, %t1100 ret float %t2101}102 103define float @reassociate_adds4(float %x0, float %x1, float %x2, float %x3) {104; CHECK-LABEL: reassociate_adds4:105; CHECK: // %bb.0:106; CHECK-NEXT: fadd s0, s0, s1107; CHECK-NEXT: fadd s0, s2, s0108; CHECK-NEXT: fadd s0, s3, s0109; CHECK-NEXT: ret110 %t0 = fadd float %x0, %x1111 %t1 = fadd float %x2, %t0112 %t2 = fadd float %x3, %t1113 ret float %t2114}115 116define float @reassociate_adds4_reassoc(float %x0, float %x1, float %x2, float %x3) {117; CHECK-LABEL: reassociate_adds4_reassoc:118; CHECK: // %bb.0:119; CHECK-NEXT: fadd s0, s0, s1120; CHECK-NEXT: fadd s1, s3, s2121; CHECK-NEXT: fadd s0, s1, s0122; CHECK-NEXT: ret123 %t0 = fadd reassoc nsz float %x0, %x1124 %t1 = fadd reassoc nsz float %x2, %t0125 %t2 = fadd reassoc nsz float %x3, %t1126 ret float %t2127}128 129; Verify that we reassociate some of these ops. The optimal balanced tree of adds is not130; produced because that would cost more compile time.131 132define float @reassociate_adds5(float %x0, float %x1, float %x2, float %x3, float %x4, float %x5, float %x6, float %x7) {133; CHECK-LABEL: reassociate_adds5:134; CHECK: // %bb.0:135; CHECK-NEXT: fadd s0, s0, s1136; CHECK-NEXT: fadd s0, s0, s2137; CHECK-NEXT: fadd s0, s0, s3138; CHECK-NEXT: fadd s0, s0, s4139; CHECK-NEXT: fadd s0, s0, s5140; CHECK-NEXT: fadd s0, s0, s6141; CHECK-NEXT: fadd s0, s0, s7142; CHECK-NEXT: ret143 %t0 = fadd float %x0, %x1144 %t1 = fadd float %t0, %x2145 %t2 = fadd float %t1, %x3146 %t3 = fadd float %t2, %x4147 %t4 = fadd float %t3, %x5148 %t5 = fadd float %t4, %x6149 %t6 = fadd float %t5, %x7150 ret float %t6151}152 153define float @reassociate_adds5_reassoc(float %x0, float %x1, float %x2, float %x3, float %x4, float %x5, float %x6, float %x7) {154; CHECK-LABEL: reassociate_adds5_reassoc:155; CHECK: // %bb.0:156; CHECK-NEXT: fadd s0, s0, s1157; CHECK-NEXT: fadd s1, s2, s3158; CHECK-NEXT: fadd s0, s0, s1159; CHECK-NEXT: fadd s1, s4, s5160; CHECK-NEXT: fadd s1, s1, s6161; CHECK-NEXT: fadd s0, s0, s1162; CHECK-NEXT: fadd s0, s0, s7163; CHECK-NEXT: ret164 %t0 = fadd reassoc nsz float %x0, %x1165 %t1 = fadd reassoc nsz float %t0, %x2166 %t2 = fadd reassoc nsz float %t1, %x3167 %t3 = fadd reassoc nsz float %t2, %x4168 %t4 = fadd reassoc nsz float %t3, %x5169 %t5 = fadd reassoc nsz float %t4, %x6170 %t6 = fadd reassoc nsz float %t5, %x7171 ret float %t6172}173 174; Verify that we only need two associative operations to reassociate the operands.175; Also, we should reassociate such that the result of the high latency division176; is used by the final 'add' rather than reassociating the %x3 operand with the177; division. The latter reassociation would not improve anything.178 179define float @reassociate_adds6(float %x0, float %x1, float %x2, float %x3) {180; CHECK-LABEL: reassociate_adds6:181; CHECK: // %bb.0:182; CHECK-NEXT: fdiv s0, s0, s1183; CHECK-NEXT: fadd s0, s2, s0184; CHECK-NEXT: fadd s0, s3, s0185; CHECK-NEXT: ret186 %t0 = fdiv float %x0, %x1187 %t1 = fadd float %x2, %t0188 %t2 = fadd float %x3, %t1189 ret float %t2190}191 192define float @reassociate_adds6_reassoc(float %x0, float %x1, float %x2, float %x3) {193; CHECK-LABEL: reassociate_adds6_reassoc:194; CHECK: // %bb.0:195; CHECK-NEXT: fdiv s0, s0, s1196; CHECK-NEXT: fadd s1, s3, s2197; CHECK-NEXT: fadd s0, s1, s0198; CHECK-NEXT: ret199 %t0 = fdiv reassoc nsz float %x0, %x1200 %t1 = fadd reassoc nsz float %x2, %t0201 %t2 = fadd reassoc nsz float %x3, %t1202 ret float %t2203}204 205; Verify that scalar single-precision multiplies are reassociated.206 207define float @reassociate_muls1(float %x0, float %x1, float %x2, float %x3) {208; CHECK-LABEL: reassociate_muls1:209; CHECK: // %bb.0:210; CHECK-NEXT: fdiv s0, s0, s1211; CHECK-NEXT: fmul s0, s2, s0212; CHECK-NEXT: fmul s0, s3, s0213; CHECK-NEXT: ret214 %t0 = fdiv float %x0, %x1215 %t1 = fmul float %x2, %t0216 %t2 = fmul float %x3, %t1217 ret float %t2218}219 220define float @reassociate_muls1_reassoc(float %x0, float %x1, float %x2, float %x3) {221; CHECK-LABEL: reassociate_muls1_reassoc:222; CHECK: // %bb.0:223; CHECK-NEXT: fdiv s0, s0, s1224; CHECK-NEXT: fmul s1, s3, s2225; CHECK-NEXT: fmul s0, s1, s0226; CHECK-NEXT: ret227 %t0 = fdiv reassoc nsz float %x0, %x1228 %t1 = fmul reassoc nsz float %x2, %t0229 %t2 = fmul reassoc nsz float %x3, %t1230 ret float %t2231}232 233; Verify that scalar double-precision adds are reassociated.234 235define double @reassociate_adds_double(double %x0, double %x1, double %x2, double %x3) {236; CHECK-LABEL: reassociate_adds_double:237; CHECK: // %bb.0:238; CHECK-NEXT: fdiv d0, d0, d1239; CHECK-NEXT: fadd d0, d2, d0240; CHECK-NEXT: fadd d0, d3, d0241; CHECK-NEXT: ret242 %t0 = fdiv double %x0, %x1243 %t1 = fadd double %x2, %t0244 %t2 = fadd double %x3, %t1245 ret double %t2246}247 248define double @reassociate_adds_double_reassoc(double %x0, double %x1, double %x2, double %x3) {249; CHECK-LABEL: reassociate_adds_double_reassoc:250; CHECK: // %bb.0:251; CHECK-NEXT: fdiv d0, d0, d1252; CHECK-NEXT: fadd d1, d3, d2253; CHECK-NEXT: fadd d0, d1, d0254; CHECK-NEXT: ret255 %t0 = fdiv reassoc nsz double %x0, %x1256 %t1 = fadd reassoc nsz double %x2, %t0257 %t2 = fadd reassoc nsz double %x3, %t1258 ret double %t2259}260 261; Verify that scalar double-precision multiplies are reassociated.262 263define double @reassociate_muls_double(double %x0, double %x1, double %x2, double %x3) {264; CHECK-LABEL: reassociate_muls_double:265; CHECK: // %bb.0:266; CHECK-NEXT: fdiv d0, d0, d1267; CHECK-NEXT: fmul d0, d2, d0268; CHECK-NEXT: fmul d0, d3, d0269; CHECK-NEXT: ret270 %t0 = fdiv double %x0, %x1271 %t1 = fmul double %x2, %t0272 %t2 = fmul double %x3, %t1273 ret double %t2274}275 276define double @reassociate_muls_double_reassoc(double %x0, double %x1, double %x2, double %x3) {277; CHECK-LABEL: reassociate_muls_double_reassoc:278; CHECK: // %bb.0:279; CHECK-NEXT: fdiv d0, d0, d1280; CHECK-NEXT: fmul d1, d3, d2281; CHECK-NEXT: fmul d0, d1, d0282; CHECK-NEXT: ret283 %t0 = fdiv reassoc nsz double %x0, %x1284 %t1 = fmul reassoc nsz double %x2, %t0285 %t2 = fmul reassoc nsz double %x3, %t1286 ret double %t2287}288 289; Verify that scalar half-precision adds are reassociated.290 291define half @reassociate_adds_half(half %x0, half %x1, half %x2, half %x3) {292; CHECK-LABEL: reassociate_adds_half:293; CHECK: // %bb.0:294; CHECK-NEXT: fdiv h0, h0, h1295; CHECK-NEXT: fadd h0, h2, h0296; CHECK-NEXT: fadd h0, h3, h0297; CHECK-NEXT: ret298 %t0 = fdiv half %x0, %x1299 %t1 = fadd half %x2, %t0300 %t2 = fadd half %x3, %t1301 ret half %t2302}303 304define half @reassociate_adds_half_reassoc(half %x0, half %x1, half %x2, half %x3) {305; CHECK-LABEL: reassociate_adds_half_reassoc:306; CHECK: // %bb.0:307; CHECK-NEXT: fdiv h0, h0, h1308; CHECK-NEXT: fadd h1, h3, h2309; CHECK-NEXT: fadd h0, h1, h0310; CHECK-NEXT: ret311 %t0 = fdiv reassoc nsz half %x0, %x1312 %t1 = fadd reassoc nsz half %x2, %t0313 %t2 = fadd reassoc nsz half %x3, %t1314 ret half %t2315}316 317; Verify that scalar half-precision multiplies are reassociated.318 319define half @reassociate_muls_half(half %x0, half %x1, half %x2, half %x3) {320; CHECK-LABEL: reassociate_muls_half:321; CHECK: // %bb.0:322; CHECK-NEXT: fdiv h0, h0, h1323; CHECK-NEXT: fmul h0, h2, h0324; CHECK-NEXT: fmul h0, h3, h0325; CHECK-NEXT: ret326 %t0 = fdiv half %x0, %x1327 %t1 = fmul half %x2, %t0328 %t2 = fmul half %x3, %t1329 ret half %t2330}331 332define half @reassociate_muls_half_reassoc(half %x0, half %x1, half %x2, half %x3) {333; CHECK-LABEL: reassociate_muls_half_reassoc:334; CHECK: // %bb.0:335; CHECK-NEXT: fdiv h0, h0, h1336; CHECK-NEXT: fmul h1, h3, h2337; CHECK-NEXT: fmul h0, h1, h0338; CHECK-NEXT: ret339 %t0 = fdiv reassoc nsz half %x0, %x1340 %t1 = fmul reassoc nsz half %x2, %t0341 %t2 = fmul reassoc nsz half %x3, %t1342 ret half %t2343}344 345; Verify that scalar integer adds are reassociated.346 347define i32 @reassociate_adds_i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {348; CHECK-LABEL: reassociate_adds_i32:349; CHECK: // %bb.0:350; CHECK-NEXT: udiv w8, w0, w1351; CHECK-NEXT: add w9, w3, w2352; CHECK-NEXT: add w0, w9, w8353; CHECK-NEXT: ret354 %t0 = udiv i32 %x0, %x1355 %t1 = add i32 %x2, %t0356 %t2 = add i32 %x3, %t1357 ret i32 %t2358}359 360define i64 @reassociate_adds_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3) {361; CHECK-LABEL: reassociate_adds_i64:362; CHECK: // %bb.0:363; CHECK-NEXT: udiv x8, x0, x1364; CHECK-NEXT: add x9, x3, x2365; CHECK-NEXT: add x0, x9, x8366; CHECK-NEXT: ret367 %t0 = udiv i64 %x0, %x1368 %t1 = add i64 %x2, %t0369 %t2 = add i64 %x3, %t1370 ret i64 %t2371}372 373; Verify that scalar bitwise operations are reassociated.374 375define i32 @reassociate_ands_i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {376; CHECK-LABEL: reassociate_ands_i32:377; CHECK: // %bb.0:378; CHECK-NEXT: and w8, w0, w1379; CHECK-NEXT: and w9, w2, w3380; CHECK-NEXT: and w0, w8, w9381; CHECK-NEXT: ret382 %t0 = and i32 %x0, %x1383 %t1 = and i32 %t0, %x2384 %t2 = and i32 %t1, %x3385 ret i32 %t2386}387 388define i64 @reassociate_ors_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3) {389; CHECK-LABEL: reassociate_ors_i64:390; CHECK: // %bb.0:391; CHECK-NEXT: orr x8, x0, x1392; CHECK-NEXT: orr x9, x2, x3393; CHECK-NEXT: orr x0, x8, x9394; CHECK-NEXT: ret395 %t0 = or i64 %x0, %x1396 %t1 = or i64 %t0, %x2397 %t2 = or i64 %t1, %x3398 ret i64 %t2399}400 401define i32 @reassociate_xors_i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {402; CHECK-LABEL: reassociate_xors_i32:403; CHECK: // %bb.0:404; CHECK-NEXT: eor w8, w0, w1405; CHECK-NEXT: eor w9, w2, w3406; CHECK-NEXT: eor w0, w8, w9407; CHECK-NEXT: ret408 %t0 = xor i32 %x0, %x1409 %t1 = xor i32 %t0, %x2410 %t2 = xor i32 %t1, %x3411 ret i32 %t2412}413 414; Verify that we reassociate vector instructions too.415 416define <4 x float> @vector_reassociate_adds1(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {417; CHECK-LABEL: vector_reassociate_adds1:418; CHECK: // %bb.0:419; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s420; CHECK-NEXT: fadd v0.4s, v0.4s, v2.4s421; CHECK-NEXT: fadd v0.4s, v0.4s, v3.4s422; CHECK-NEXT: ret423 %t0 = fadd <4 x float> %x0, %x1424 %t1 = fadd <4 x float> %t0, %x2425 %t2 = fadd <4 x float> %t1, %x3426 ret <4 x float> %t2427}428 429define <4 x float> @vector_reassociate_adds1_reassoc(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {430; CHECK-LABEL: vector_reassociate_adds1_reassoc:431; CHECK: // %bb.0:432; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s433; CHECK-NEXT: fadd v1.4s, v2.4s, v3.4s434; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s435; CHECK-NEXT: ret436 %t0 = fadd reassoc nsz <4 x float> %x0, %x1437 %t1 = fadd reassoc nsz <4 x float> %t0, %x2438 %t2 = fadd reassoc nsz <4 x float> %t1, %x3439 ret <4 x float> %t2440}441 442define <4 x float> @vector_reassociate_adds2(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {443; CHECK-LABEL: vector_reassociate_adds2:444; CHECK: // %bb.0:445; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s446; CHECK-NEXT: fadd v0.4s, v2.4s, v0.4s447; CHECK-NEXT: fadd v0.4s, v0.4s, v3.4s448; CHECK-NEXT: ret449 %t0 = fadd <4 x float> %x0, %x1450 %t1 = fadd <4 x float> %x2, %t0451 %t2 = fadd <4 x float> %t1, %x3452 ret <4 x float> %t2453}454 455define <4 x float> @vector_reassociate_adds2_reassoc(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {456; CHECK-LABEL: vector_reassociate_adds2_reassoc:457; CHECK: // %bb.0:458; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s459; CHECK-NEXT: fadd v1.4s, v2.4s, v3.4s460; CHECK-NEXT: fadd v0.4s, v1.4s, v0.4s461; CHECK-NEXT: ret462 %t0 = fadd reassoc nsz <4 x float> %x0, %x1463 %t1 = fadd reassoc nsz <4 x float> %x2, %t0464 %t2 = fadd reassoc nsz <4 x float> %t1, %x3465 ret <4 x float> %t2466}467 468define <4 x float> @vector_reassociate_adds3(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {469; CHECK-LABEL: vector_reassociate_adds3:470; CHECK: // %bb.0:471; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s472; CHECK-NEXT: fadd v0.4s, v0.4s, v2.4s473; CHECK-NEXT: fadd v0.4s, v3.4s, v0.4s474; CHECK-NEXT: ret475 %t0 = fadd <4 x float> %x0, %x1476 %t1 = fadd <4 x float> %t0, %x2477 %t2 = fadd <4 x float> %x3, %t1478 ret <4 x float> %t2479}480 481define <4 x float> @vector_reassociate_adds3_reassoc(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {482; CHECK-LABEL: vector_reassociate_adds3_reassoc:483; CHECK: // %bb.0:484; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s485; CHECK-NEXT: fadd v1.4s, v3.4s, v2.4s486; CHECK-NEXT: fadd v0.4s, v1.4s, v0.4s487; CHECK-NEXT: ret488 %t0 = fadd reassoc nsz <4 x float> %x0, %x1489 %t1 = fadd reassoc nsz <4 x float> %t0, %x2490 %t2 = fadd reassoc nsz <4 x float> %x3, %t1491 ret <4 x float> %t2492}493 494define <4 x float> @vector_reassociate_adds4(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {495; CHECK-LABEL: vector_reassociate_adds4:496; CHECK: // %bb.0:497; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s498; CHECK-NEXT: fadd v0.4s, v2.4s, v0.4s499; CHECK-NEXT: fadd v0.4s, v3.4s, v0.4s500; CHECK-NEXT: ret501 %t0 = fadd <4 x float> %x0, %x1502 %t1 = fadd <4 x float> %x2, %t0503 %t2 = fadd <4 x float> %x3, %t1504 ret <4 x float> %t2505}506 507define <4 x float> @vector_reassociate_adds4_reassoc(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {508; CHECK-LABEL: vector_reassociate_adds4_reassoc:509; CHECK: // %bb.0:510; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s511; CHECK-NEXT: fadd v1.4s, v3.4s, v2.4s512; CHECK-NEXT: fadd v0.4s, v1.4s, v0.4s513; CHECK-NEXT: ret514 %t0 = fadd reassoc nsz <4 x float> %x0, %x1515 %t1 = fadd reassoc nsz <4 x float> %x2, %t0516 %t2 = fadd reassoc nsz <4 x float> %x3, %t1517 ret <4 x float> %t2518}519 520; Verify that 64-bit vector half-precision adds are reassociated.521 522define <4 x half> @reassociate_adds_v4f16(<4 x half> %x0, <4 x half> %x1, <4 x half> %x2, <4 x half> %x3) {523; CHECK-LABEL: reassociate_adds_v4f16:524; CHECK: // %bb.0:525; CHECK-NEXT: fadd v0.4h, v0.4h, v1.4h526; CHECK-NEXT: fadd v0.4h, v2.4h, v0.4h527; CHECK-NEXT: fadd v0.4h, v3.4h, v0.4h528; CHECK-NEXT: ret529 %t0 = fadd <4 x half> %x0, %x1530 %t1 = fadd <4 x half> %x2, %t0531 %t2 = fadd <4 x half> %x3, %t1532 ret <4 x half> %t2533}534 535define <4 x half> @reassociate_adds_v4f16_reassoc(<4 x half> %x0, <4 x half> %x1, <4 x half> %x2, <4 x half> %x3) {536; CHECK-LABEL: reassociate_adds_v4f16_reassoc:537; CHECK: // %bb.0:538; CHECK-NEXT: fadd v0.4h, v0.4h, v1.4h539; CHECK-NEXT: fadd v1.4h, v3.4h, v2.4h540; CHECK-NEXT: fadd v0.4h, v1.4h, v0.4h541; CHECK-NEXT: ret542 %t0 = fadd reassoc nsz <4 x half> %x0, %x1543 %t1 = fadd reassoc nsz <4 x half> %x2, %t0544 %t2 = fadd reassoc nsz <4 x half> %x3, %t1545 ret <4 x half> %t2546}547 548; Verify that 128-bit vector half-precision multiplies are reassociated.549 550define <8 x half> @reassociate_muls_v8f16(<8 x half> %x0, <8 x half> %x1, <8 x half> %x2, <8 x half> %x3) {551; CHECK-LABEL: reassociate_muls_v8f16:552; CHECK: // %bb.0:553; CHECK-NEXT: fadd v0.8h, v0.8h, v1.8h554; CHECK-NEXT: fmul v0.8h, v2.8h, v0.8h555; CHECK-NEXT: fmul v0.8h, v3.8h, v0.8h556; CHECK-NEXT: ret557 %t0 = fadd <8 x half> %x0, %x1558 %t1 = fmul <8 x half> %x2, %t0559 %t2 = fmul <8 x half> %x3, %t1560 ret <8 x half> %t2561}562 563define <8 x half> @reassociate_muls_v8f16_reassoc(<8 x half> %x0, <8 x half> %x1, <8 x half> %x2, <8 x half> %x3) {564; CHECK-LABEL: reassociate_muls_v8f16_reassoc:565; CHECK: // %bb.0:566; CHECK-NEXT: fadd v0.8h, v0.8h, v1.8h567; CHECK-NEXT: fmul v1.8h, v3.8h, v2.8h568; CHECK-NEXT: fmul v0.8h, v1.8h, v0.8h569; CHECK-NEXT: ret570 %t0 = fadd reassoc nsz <8 x half> %x0, %x1571 %t1 = fmul reassoc nsz <8 x half> %x2, %t0572 %t2 = fmul reassoc nsz <8 x half> %x3, %t1573 ret <8 x half> %t2574}575 576; Verify that 128-bit vector single-precision multiplies are reassociated.577 578define <4 x float> @reassociate_muls_v4f32(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {579; CHECK-LABEL: reassociate_muls_v4f32:580; CHECK: // %bb.0:581; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s582; CHECK-NEXT: fmul v0.4s, v2.4s, v0.4s583; CHECK-NEXT: fmul v0.4s, v3.4s, v0.4s584; CHECK-NEXT: ret585 %t0 = fadd <4 x float> %x0, %x1586 %t1 = fmul <4 x float> %x2, %t0587 %t2 = fmul <4 x float> %x3, %t1588 ret <4 x float> %t2589}590 591define <4 x float> @reassociate_muls_v4f32_reassoc(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {592; CHECK-LABEL: reassociate_muls_v4f32_reassoc:593; CHECK: // %bb.0:594; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s595; CHECK-NEXT: fmul v1.4s, v3.4s, v2.4s596; CHECK-NEXT: fmul v0.4s, v1.4s, v0.4s597; CHECK-NEXT: ret598 %t0 = fadd reassoc nsz <4 x float> %x0, %x1599 %t1 = fmul reassoc nsz <4 x float> %x2, %t0600 %t2 = fmul reassoc nsz <4 x float> %x3, %t1601 ret <4 x float> %t2602}603 604; Verify that 128-bit vector double-precision multiplies are reassociated.605 606define <2 x double> @reassociate_muls_v2f64(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, <2 x double> %x3) {607; CHECK-LABEL: reassociate_muls_v2f64:608; CHECK: // %bb.0:609; CHECK-NEXT: fadd v0.2d, v0.2d, v1.2d610; CHECK-NEXT: fmul v0.2d, v2.2d, v0.2d611; CHECK-NEXT: fmul v0.2d, v3.2d, v0.2d612; CHECK-NEXT: ret613 %t0 = fadd <2 x double> %x0, %x1614 %t1 = fmul <2 x double> %x2, %t0615 %t2 = fmul <2 x double> %x3, %t1616 ret <2 x double> %t2617}618 619define <2 x double> @reassociate_muls_v2f64_reassoc(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, <2 x double> %x3) {620; CHECK-LABEL: reassociate_muls_v2f64_reassoc:621; CHECK: // %bb.0:622; CHECK-NEXT: fadd v0.2d, v0.2d, v1.2d623; CHECK-NEXT: fmul v1.2d, v3.2d, v2.2d624; CHECK-NEXT: fmul v0.2d, v1.2d, v0.2d625; CHECK-NEXT: ret626 %t0 = fadd reassoc nsz <2 x double> %x0, %x1627 %t1 = fmul reassoc nsz <2 x double> %x2, %t0628 %t2 = fmul reassoc nsz <2 x double> %x3, %t1629 ret <2 x double> %t2630}631 632 633; Verify that vector integer arithmetic operations are reassociated.634 635define <2 x i32> @reassociate_muls_v2i32(<2 x i32> %x0, <2 x i32> %x1, <2 x i32> %x2, <2 x i32> %x3) {636; CHECK-LABEL: reassociate_muls_v2i32:637; CHECK: // %bb.0:638; CHECK-NEXT: mul v0.2s, v0.2s, v1.2s639; CHECK-NEXT: mul v1.2s, v3.2s, v2.2s640; CHECK-NEXT: mul v0.2s, v1.2s, v0.2s641; CHECK-NEXT: ret642 %t0 = mul <2 x i32> %x0, %x1643 %t1 = mul <2 x i32> %x2, %t0644 %t2 = mul <2 x i32> %x3, %t1645 ret <2 x i32> %t2646}647 648define <2 x i64> @reassociate_adds_v2i64(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, <2 x i64> %x3) {649; CHECK-LABEL: reassociate_adds_v2i64:650; CHECK: // %bb.0:651; CHECK-NEXT: add v0.2d, v0.2d, v1.2d652; CHECK-NEXT: add v1.2d, v3.2d, v2.2d653; CHECK-NEXT: add v0.2d, v1.2d, v0.2d654; CHECK-NEXT: ret655 %t0 = add <2 x i64> %x0, %x1656 %t1 = add <2 x i64> %x2, %t0657 %t2 = add <2 x i64> %x3, %t1658 ret <2 x i64> %t2659}660 661; Verify that vector bitwise operations are reassociated.662 663define <16 x i8> @reassociate_ands_v16i8(<16 x i8> %x0, <16 x i8> %x1, <16 x i8> %x2, <16 x i8> %x3) {664; CHECK-LABEL: reassociate_ands_v16i8:665; CHECK: // %bb.0:666; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b667; CHECK-NEXT: and v1.16b, v2.16b, v3.16b668; CHECK-NEXT: and v0.16b, v0.16b, v1.16b669; CHECK-NEXT: ret670 %t0 = or <16 x i8> %x0, %x1671 %t1 = and <16 x i8> %t0, %x2672 %t2 = and <16 x i8> %t1, %x3673 ret <16 x i8> %t2674}675 676define <4 x i16> @reassociate_ors_v4i16(<4 x i16> %x0, <4 x i16> %x1, <4 x i16> %x2, <4 x i16> %x3) {677; CHECK-LABEL: reassociate_ors_v4i16:678; CHECK: // %bb.0:679; CHECK-NEXT: eor v0.8b, v0.8b, v1.8b680; CHECK-NEXT: orr v1.8b, v2.8b, v3.8b681; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b682; CHECK-NEXT: ret683 %t0 = xor <4 x i16> %x0, %x1684 %t1 = or <4 x i16> %t0, %x2685 %t2 = or <4 x i16> %t1, %x3686 ret <4 x i16> %t2687}688 689define <4 x i32> @reassociate_xors_v4i32(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, <4 x i32> %x3) {690; CHECK-LABEL: reassociate_xors_v4i32:691; CHECK: // %bb.0:692; CHECK-NEXT: and v0.16b, v0.16b, v1.16b693; CHECK-NEXT: // kill: def $q3 killed $q3 def $z3694; CHECK-NEXT: // kill: def $q2 killed $q2 def $z2695; CHECK-NEXT: eor3 z0.d, z0.d, z2.d, z3.d696; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0697; CHECK-NEXT: ret698 %t0 = and <4 x i32> %x0, %x1699 %t1 = xor <4 x i32> %t0, %x2700 %t2 = xor <4 x i32> %t1, %x3701 ret <4 x i32> %t2702}703 704; Verify that scalable vector FP arithmetic operations are reassociated.705 706define <vscale x 8 x half> @reassociate_adds_nxv4f16(<vscale x 8 x half> %x0, <vscale x 8 x half> %x1, <vscale x 8 x half> %x2, <vscale x 8 x half> %x3) {707; CHECK-LABEL: reassociate_adds_nxv4f16:708; CHECK: // %bb.0:709; CHECK-NEXT: fadd z0.h, z0.h, z1.h710; CHECK-NEXT: fadd z0.h, z2.h, z0.h711; CHECK-NEXT: fadd z0.h, z3.h, z0.h712; CHECK-NEXT: ret713 %t0 = fadd reassoc <vscale x 8 x half> %x0, %x1714 %t1 = fadd reassoc <vscale x 8 x half> %x2, %t0715 %t2 = fadd reassoc <vscale x 8 x half> %x3, %t1716 ret <vscale x 8 x half> %t2717}718 719define <vscale x 8 x half> @reassociate_adds_nxv4f16_nsz(<vscale x 8 x half> %x0, <vscale x 8 x half> %x1, <vscale x 8 x half> %x2, <vscale x 8 x half> %x3) {720; CHECK-LABEL: reassociate_adds_nxv4f16_nsz:721; CHECK: // %bb.0:722; CHECK-NEXT: fadd z0.h, z0.h, z1.h723; CHECK-NEXT: fadd z1.h, z3.h, z2.h724; CHECK-NEXT: fadd z0.h, z1.h, z0.h725; CHECK-NEXT: ret726 %t0 = fadd reassoc nsz <vscale x 8 x half> %x0, %x1727 %t1 = fadd reassoc nsz <vscale x 8 x half> %x2, %t0728 %t2 = fadd reassoc nsz <vscale x 8 x half> %x3, %t1729 ret <vscale x 8 x half> %t2730}731 732define <vscale x 4 x float> @reassociate_adds_nxv4f32(<vscale x 4 x float> %x0, <vscale x 4 x float> %x1, <vscale x 4 x float> %x2, <vscale x 4 x float> %x3) {733; CHECK-LABEL: reassociate_adds_nxv4f32:734; CHECK: // %bb.0:735; CHECK-NEXT: fadd z0.s, z0.s, z1.s736; CHECK-NEXT: fadd z0.s, z2.s, z0.s737; CHECK-NEXT: fadd z0.s, z3.s, z0.s738; CHECK-NEXT: ret739 %t0 = fadd reassoc <vscale x 4 x float> %x0, %x1740 %t1 = fadd reassoc <vscale x 4 x float> %x2, %t0741 %t2 = fadd reassoc <vscale x 4 x float> %x3, %t1742 ret <vscale x 4 x float> %t2743}744 745define <vscale x 4 x float> @reassociate_adds_nxv4f32_nsz(<vscale x 4 x float> %x0, <vscale x 4 x float> %x1, <vscale x 4 x float> %x2, <vscale x 4 x float> %x3) {746; CHECK-LABEL: reassociate_adds_nxv4f32_nsz:747; CHECK: // %bb.0:748; CHECK-NEXT: fadd z0.s, z0.s, z1.s749; CHECK-NEXT: fadd z1.s, z3.s, z2.s750; CHECK-NEXT: fadd z0.s, z1.s, z0.s751; CHECK-NEXT: ret752 %t0 = fadd reassoc nsz <vscale x 4 x float> %x0, %x1753 %t1 = fadd reassoc nsz <vscale x 4 x float> %x2, %t0754 %t2 = fadd reassoc nsz <vscale x 4 x float> %x3, %t1755 ret <vscale x 4 x float> %t2756}757 758define <vscale x 2 x double> @reassociate_muls_nxv2f64(<vscale x 2 x double> %x0, <vscale x 2 x double> %x1, <vscale x 2 x double> %x2, <vscale x 2 x double> %x3) {759; CHECK-LABEL: reassociate_muls_nxv2f64:760; CHECK: // %bb.0:761; CHECK-NEXT: fmul z0.d, z0.d, z1.d762; CHECK-NEXT: fmul z0.d, z2.d, z0.d763; CHECK-NEXT: fmul z0.d, z3.d, z0.d764; CHECK-NEXT: ret765 %t0 = fmul reassoc <vscale x 2 x double> %x0, %x1766 %t1 = fmul reassoc <vscale x 2 x double> %x2, %t0767 %t2 = fmul reassoc <vscale x 2 x double> %x3, %t1768 ret <vscale x 2 x double> %t2769}770 771define <vscale x 2 x double> @reassociate_muls_nxv2f64_nsz(<vscale x 2 x double> %x0, <vscale x 2 x double> %x1, <vscale x 2 x double> %x2, <vscale x 2 x double> %x3) {772; CHECK-LABEL: reassociate_muls_nxv2f64_nsz:773; CHECK: // %bb.0:774; CHECK-NEXT: fmul z0.d, z0.d, z1.d775; CHECK-NEXT: fmul z1.d, z3.d, z2.d776; CHECK-NEXT: fmul z0.d, z1.d, z0.d777; CHECK-NEXT: ret778 %t0 = fmul reassoc nsz <vscale x 2 x double> %x0, %x1779 %t1 = fmul reassoc nsz <vscale x 2 x double> %x2, %t0780 %t2 = fmul reassoc nsz <vscale x 2 x double> %x3, %t1781 ret <vscale x 2 x double> %t2782}783 784; Verify that scalable vector integer arithmetic operations are reassociated.785 786define <vscale x 16 x i8> @reassociate_muls_nxv16i8(<vscale x 16 x i8> %x0, <vscale x 16 x i8> %x1, <vscale x 16 x i8> %x2, <vscale x 16 x i8> %x3) {787; CHECK-LABEL: reassociate_muls_nxv16i8:788; CHECK: // %bb.0:789; CHECK-NEXT: mul z0.b, z0.b, z1.b790; CHECK-NEXT: mul z1.b, z3.b, z2.b791; CHECK-NEXT: mul z0.b, z1.b, z0.b792; CHECK-NEXT: ret793 %t0 = mul <vscale x 16 x i8> %x0, %x1794 %t1 = mul <vscale x 16 x i8> %x2, %t0795 %t2 = mul <vscale x 16 x i8> %x3, %t1796 ret <vscale x 16 x i8> %t2797}798 799define <vscale x 8 x i16> @reassociate_adds_nxv8i16(<vscale x 8 x i16> %x0, <vscale x 8 x i16> %x1, <vscale x 8 x i16> %x2, <vscale x 8 x i16> %x3) {800; CHECK-LABEL: reassociate_adds_nxv8i16:801; CHECK: // %bb.0:802; CHECK-NEXT: add z0.h, z0.h, z1.h803; CHECK-NEXT: add z1.h, z3.h, z2.h804; CHECK-NEXT: add z0.h, z1.h, z0.h805; CHECK-NEXT: ret806 %t0 = add <vscale x 8 x i16> %x0, %x1807 %t1 = add <vscale x 8 x i16> %x2, %t0808 %t2 = add <vscale x 8 x i16> %x3, %t1809 ret <vscale x 8 x i16> %t2810}811 812define <vscale x 4 x i32> @reassociate_muls_nxv4i32(<vscale x 4 x i32> %x0, <vscale x 4 x i32> %x1, <vscale x 4 x i32> %x2, <vscale x 4 x i32> %x3) {813; CHECK-LABEL: reassociate_muls_nxv4i32:814; CHECK: // %bb.0:815; CHECK-NEXT: mul z0.s, z0.s, z1.s816; CHECK-NEXT: mul z1.s, z3.s, z2.s817; CHECK-NEXT: mul z0.s, z1.s, z0.s818; CHECK-NEXT: ret819 %t0 = mul <vscale x 4 x i32> %x0, %x1820 %t1 = mul <vscale x 4 x i32> %x2, %t0821 %t2 = mul <vscale x 4 x i32> %x3, %t1822 ret <vscale x 4 x i32> %t2823}824 825define <vscale x 2 x i64> @reassociate_adds_nxv2i64(<vscale x 2 x i64> %x0, <vscale x 2 x i64> %x1, <vscale x 2 x i64> %x2, <vscale x 2 x i64> %x3) {826; CHECK-LABEL: reassociate_adds_nxv2i64:827; CHECK: // %bb.0:828; CHECK-NEXT: add z0.d, z0.d, z1.d829; CHECK-NEXT: add z1.d, z3.d, z2.d830; CHECK-NEXT: add z0.d, z1.d, z0.d831; CHECK-NEXT: ret832 %t0 = add <vscale x 2 x i64> %x0, %x1833 %t1 = add <vscale x 2 x i64> %x2, %t0834 %t2 = add <vscale x 2 x i64> %x3, %t1835 ret <vscale x 2 x i64> %t2836}837 838; Verify that scalable vector bitwise operations are reassociated.839 840define <vscale x 16 x i8> @reassociate_ands_nxv16i8(<vscale x 16 x i8> %x0, <vscale x 16 x i8> %x1, <vscale x 16 x i8> %x2, <vscale x 16 x i8> %x3) {841; CHECK-LABEL: reassociate_ands_nxv16i8:842; CHECK: // %bb.0:843; CHECK-NEXT: orr z0.d, z0.d, z1.d844; CHECK-NEXT: and z1.d, z2.d, z3.d845; CHECK-NEXT: and z0.d, z0.d, z1.d846; CHECK-NEXT: ret847 %t0 = or <vscale x 16 x i8> %x0, %x1848 %t1 = and <vscale x 16 x i8> %t0, %x2849 %t2 = and <vscale x 16 x i8> %t1, %x3850 ret <vscale x 16 x i8> %t2851}852 853define <vscale x 8 x i16> @reassociate_ors_nxv8i16(<vscale x 8 x i16> %x0, <vscale x 8 x i16> %x1, <vscale x 8 x i16> %x2, <vscale x 8 x i16> %x3) {854; CHECK-LABEL: reassociate_ors_nxv8i16:855; CHECK: // %bb.0:856; CHECK-NEXT: eor z0.d, z0.d, z1.d857; CHECK-NEXT: orr z1.d, z2.d, z3.d858; CHECK-NEXT: orr z0.d, z0.d, z1.d859; CHECK-NEXT: ret860 %t0 = xor <vscale x 8 x i16> %x0, %x1861 %t1 = or <vscale x 8 x i16> %t0, %x2862 %t2 = or <vscale x 8 x i16> %t1, %x3863 ret <vscale x 8 x i16> %t2864}865 866; PR25016: https://llvm.org/bugs/show_bug.cgi?id=25016867; Verify that reassociation is not happening needlessly or wrongly.868 869declare double @bar()870 871define double @reassociate_adds_from_calls() {872; CHECK-LABEL: reassociate_adds_from_calls:873; CHECK: // %bb.0:874; CHECK-NEXT: str d10, [sp, #-32]! // 8-byte Folded Spill875; CHECK-NEXT: stp d9, d8, [sp, #8] // 16-byte Folded Spill876; CHECK-NEXT: str x30, [sp, #24] // 8-byte Spill877; CHECK-NEXT: .cfi_def_cfa_offset 32878; CHECK-NEXT: .cfi_offset w30, -8879; CHECK-NEXT: .cfi_offset b8, -16880; CHECK-NEXT: .cfi_offset b9, -24881; CHECK-NEXT: .cfi_offset b10, -32882; CHECK-NEXT: bl bar883; CHECK-NEXT: fmov d8, d0884; CHECK-NEXT: bl bar885; CHECK-NEXT: fmov d9, d0886; CHECK-NEXT: bl bar887; CHECK-NEXT: fmov d10, d0888; CHECK-NEXT: bl bar889; CHECK-NEXT: fadd d1, d8, d9890; CHECK-NEXT: ldp d9, d8, [sp, #8] // 16-byte Folded Reload891; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Reload892; CHECK-NEXT: fadd d1, d1, d10893; CHECK-NEXT: fadd d0, d1, d0894; CHECK-NEXT: ldr d10, [sp], #32 // 8-byte Folded Reload895; CHECK-NEXT: ret896 %x0 = call double @bar()897 %x1 = call double @bar()898 %x2 = call double @bar()899 %x3 = call double @bar()900 %t0 = fadd double %x0, %x1901 %t1 = fadd double %t0, %x2902 %t2 = fadd double %t1, %x3903 ret double %t2904}905 906define double @reassociate_adds_from_calls_reassoc() {907; CHECK-LABEL: reassociate_adds_from_calls_reassoc:908; CHECK: // %bb.0:909; CHECK-NEXT: str d10, [sp, #-32]! // 8-byte Folded Spill910; CHECK-NEXT: stp d9, d8, [sp, #8] // 16-byte Folded Spill911; CHECK-NEXT: str x30, [sp, #24] // 8-byte Spill912; CHECK-NEXT: .cfi_def_cfa_offset 32913; CHECK-NEXT: .cfi_offset w30, -8914; CHECK-NEXT: .cfi_offset b8, -16915; CHECK-NEXT: .cfi_offset b9, -24916; CHECK-NEXT: .cfi_offset b10, -32917; CHECK-NEXT: bl bar918; CHECK-NEXT: fmov d8, d0919; CHECK-NEXT: bl bar920; CHECK-NEXT: fmov d9, d0921; CHECK-NEXT: bl bar922; CHECK-NEXT: fmov d10, d0923; CHECK-NEXT: bl bar924; CHECK-NEXT: fadd d1, d8, d9925; CHECK-NEXT: ldp d9, d8, [sp, #8] // 16-byte Folded Reload926; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Reload927; CHECK-NEXT: fadd d0, d10, d0928; CHECK-NEXT: fadd d0, d1, d0929; CHECK-NEXT: ldr d10, [sp], #32 // 8-byte Folded Reload930; CHECK-NEXT: ret931 %x0 = call reassoc nsz double @bar()932 %x1 = call reassoc nsz double @bar()933 %x2 = call reassoc nsz double @bar()934 %x3 = call reassoc nsz double @bar()935 %t0 = fadd reassoc nsz double %x0, %x1936 %t1 = fadd reassoc nsz double %t0, %x2937 %t2 = fadd reassoc nsz double %t1, %x3938 ret double %t2939}940 941define double @already_reassociated() {942; CHECK-LABEL: already_reassociated:943; CHECK: // %bb.0:944; CHECK-NEXT: str d10, [sp, #-32]! // 8-byte Folded Spill945; CHECK-NEXT: stp d9, d8, [sp, #8] // 16-byte Folded Spill946; CHECK-NEXT: str x30, [sp, #24] // 8-byte Spill947; CHECK-NEXT: .cfi_def_cfa_offset 32948; CHECK-NEXT: .cfi_offset w30, -8949; CHECK-NEXT: .cfi_offset b8, -16950; CHECK-NEXT: .cfi_offset b9, -24951; CHECK-NEXT: .cfi_offset b10, -32952; CHECK-NEXT: bl bar953; CHECK-NEXT: fmov d8, d0954; CHECK-NEXT: bl bar955; CHECK-NEXT: fmov d9, d0956; CHECK-NEXT: bl bar957; CHECK-NEXT: fmov d10, d0958; CHECK-NEXT: bl bar959; CHECK-NEXT: fadd d1, d8, d9960; CHECK-NEXT: ldp d9, d8, [sp, #8] // 16-byte Folded Reload961; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Reload962; CHECK-NEXT: fadd d0, d10, d0963; CHECK-NEXT: fadd d0, d1, d0964; CHECK-NEXT: ldr d10, [sp], #32 // 8-byte Folded Reload965; CHECK-NEXT: ret966 %x0 = call double @bar()967 %x1 = call double @bar()968 %x2 = call double @bar()969 %x3 = call double @bar()970 %t0 = fadd double %x0, %x1971 %t1 = fadd double %x2, %x3972 %t2 = fadd double %t0, %t1973 ret double %t2974}975 976define double @already_reassociated_reassoc() {977; CHECK-LABEL: already_reassociated_reassoc:978; CHECK: // %bb.0:979; CHECK-NEXT: str d10, [sp, #-32]! // 8-byte Folded Spill980; CHECK-NEXT: stp d9, d8, [sp, #8] // 16-byte Folded Spill981; CHECK-NEXT: str x30, [sp, #24] // 8-byte Spill982; CHECK-NEXT: .cfi_def_cfa_offset 32983; CHECK-NEXT: .cfi_offset w30, -8984; CHECK-NEXT: .cfi_offset b8, -16985; CHECK-NEXT: .cfi_offset b9, -24986; CHECK-NEXT: .cfi_offset b10, -32987; CHECK-NEXT: bl bar988; CHECK-NEXT: fmov d8, d0989; CHECK-NEXT: bl bar990; CHECK-NEXT: fmov d9, d0991; CHECK-NEXT: bl bar992; CHECK-NEXT: fmov d10, d0993; CHECK-NEXT: bl bar994; CHECK-NEXT: fadd d1, d8, d9995; CHECK-NEXT: ldp d9, d8, [sp, #8] // 16-byte Folded Reload996; CHECK-NEXT: ldr x30, [sp, #24] // 8-byte Reload997; CHECK-NEXT: fadd d0, d10, d0998; CHECK-NEXT: fadd d0, d1, d0999; CHECK-NEXT: ldr d10, [sp], #32 // 8-byte Folded Reload1000; CHECK-NEXT: ret1001 %x0 = call reassoc nsz double @bar()1002 %x1 = call reassoc nsz double @bar()1003 %x2 = call reassoc nsz double @bar()1004 %x3 = call reassoc nsz double @bar()1005 %t0 = fadd reassoc nsz double %x0, %x11006 %t1 = fadd reassoc nsz double %x2, %x31007 %t2 = fadd reassoc nsz double %t0, %t11008 ret double %t21009}1010