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1; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -verify-machineinstrs < %s | FileCheck %s2 3; CHECK-LABEL: f_XX:4; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]5; CHECK: [[BB]]:6; CHECK-NOT: mov x[[REG]], xzr7define i64 @f_XX(i64 %n, ptr nocapture readonly %P) {8entry:9 %tobool = icmp eq i64 %n, 010 br i1 %tobool, label %if.end, label %if.then11 12if.then: ; preds = %entry13 %0 = load i64, ptr %P14 br label %if.end15 16if.end: ; preds = %entry, %if.then17 %a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]18 ret i64 %a.019}20 21; CHECK-LABEL: f_WW:22; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]23; CHECK: [[BB]]:24; CHECK-NOT: mov w[[REG]], wzr25define i32 @f_WW(i32 %n, ptr nocapture readonly %P) {26entry:27 %tobool = icmp eq i32 %n, 028 br i1 %tobool, label %if.end, label %if.then29 30if.then: ; preds = %entry31 %0 = load i32, ptr %P32 br label %if.end33 34if.end: ; preds = %entry, %if.then35 %a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]36 ret i32 %a.037}38 39; CHECK-LABEL: f_XW:40; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]41; CHECK: [[BB]]:42; CHECK-NOT: mov w[[REG]], wzr43define i32 @f_XW(i64 %n, ptr nocapture readonly %P) {44entry:45 %tobool = icmp eq i64 %n, 046 br i1 %tobool, label %if.end, label %if.then47 48if.then: ; preds = %entry49 %0 = load i32, ptr %P50 br label %if.end51 52if.end: ; preds = %entry, %if.then53 %a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]54 ret i32 %a.055}56 57; CHECK-LABEL: f_WX:58; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]59; CHECK: [[BB]]:60; CHECK: mov x[[REG]], xzr61; Do not remove the mov in this case because we do not know if the upper bits62; of the X register are zero.63define i64 @f_WX(i32 %n, ptr nocapture readonly %P) {64entry:65 %tobool = icmp eq i32 %n, 066 br i1 %tobool, label %if.end, label %if.then67 68if.then: ; preds = %entry69 %0 = load i64, ptr %P70 br label %if.end71 72if.end: ; preds = %entry, %if.then73 %a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]74 ret i64 %a.075}76 77; CHECK-LABEL: test_superreg:78; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]79; CHECK: [[BB]]:80; CHECK: str x[[REG]], [x1]81; CHECK-NOT: mov w[[REG]], wzr82; Because we returned w0 but x0 was marked live-in to the block, we didn't83; remove the <kill> on the str leading to a verification failure.84define i32 @test_superreg(i64 %in, ptr %dest) {85 %tst = icmp eq i64 %in, 086 br i1 %tst, label %true, label %false87 88false:89 ret i32 4290 91true:92 store volatile i64 %in, ptr %dest93 ret i32 094}95