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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \3; RUN: FileCheck %s --check-prefixes CHECK,V8A4; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \5; RUN: FileCheck %s --check-prefixes CHECK,V83A6 7define void @a() "sign-return-address"="all" {8; V8A-LABEL: a:9; V8A: // %bb.0:10; V8A-NEXT: hint #2511; V8A-NEXT: .cfi_negate_ra_state12; V8A-NEXT: sub sp, sp, #3213; V8A-NEXT: .cfi_def_cfa_offset 3214; V8A-NEXT: mov w8, #1 // =0x115; V8A-NEXT: mov w9, #2 // =0x216; V8A-NEXT: stp w9, w8, [sp, #24]17; V8A-NEXT: mov w9, #3 // =0x318; V8A-NEXT: mov w8, #4 // =0x419; V8A-NEXT: stp w8, w9, [sp, #16]20; V8A-NEXT: mov w9, #5 // =0x521; V8A-NEXT: mov w8, #6 // =0x622; V8A-NEXT: stp w8, w9, [sp, #8]23; V8A-NEXT: add sp, sp, #3224; V8A-NEXT: hint #2925; V8A-NEXT: ret26;27; V83A-LABEL: a:28; V83A: // %bb.0:29; V83A-NEXT: paciasp30; V83A-NEXT: .cfi_negate_ra_state31; V83A-NEXT: sub sp, sp, #3232; V83A-NEXT: .cfi_def_cfa_offset 3233; V83A-NEXT: mov w8, #1 // =0x134; V83A-NEXT: mov w9, #2 // =0x235; V83A-NEXT: stp w9, w8, [sp, #24]36; V83A-NEXT: mov w9, #3 // =0x337; V83A-NEXT: mov w8, #4 // =0x438; V83A-NEXT: stp w8, w9, [sp, #16]39; V83A-NEXT: mov w9, #5 // =0x540; V83A-NEXT: mov w8, #6 // =0x641; V83A-NEXT: stp w8, w9, [sp, #8]42; V83A-NEXT: add sp, sp, #3243; V83A-NEXT: retaa44 %1 = alloca i32, align 445 %2 = alloca i32, align 446 %3 = alloca i32, align 447 %4 = alloca i32, align 448 %5 = alloca i32, align 449 %6 = alloca i32, align 450 store i32 1, ptr %1, align 451 store i32 2, ptr %2, align 452 store i32 3, ptr %3, align 453 store i32 4, ptr %4, align 454 store i32 5, ptr %5, align 455 store i32 6, ptr %6, align 456 ret void57}58 59define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {60; V8A-LABEL: b:61; V8A: // %bb.0:62; V8A-NEXT: .cfi_b_key_frame63; V8A-NEXT: hint #2764; V8A-NEXT: .cfi_negate_ra_state65; V8A-NEXT: sub sp, sp, #3266; V8A-NEXT: .cfi_def_cfa_offset 3267; V8A-NEXT: mov w8, #1 // =0x168; V8A-NEXT: mov w9, #2 // =0x269; V8A-NEXT: stp w9, w8, [sp, #24]70; V8A-NEXT: mov w9, #3 // =0x371; V8A-NEXT: mov w8, #4 // =0x472; V8A-NEXT: stp w8, w9, [sp, #16]73; V8A-NEXT: mov w9, #5 // =0x574; V8A-NEXT: mov w8, #6 // =0x675; V8A-NEXT: stp w8, w9, [sp, #8]76; V8A-NEXT: add sp, sp, #3277; V8A-NEXT: hint #3178; V8A-NEXT: ret79;80; V83A-LABEL: b:81; V83A: // %bb.0:82; V83A-NEXT: .cfi_b_key_frame83; V83A-NEXT: pacibsp84; V83A-NEXT: .cfi_negate_ra_state85; V83A-NEXT: sub sp, sp, #3286; V83A-NEXT: .cfi_def_cfa_offset 3287; V83A-NEXT: mov w8, #1 // =0x188; V83A-NEXT: mov w9, #2 // =0x289; V83A-NEXT: stp w9, w8, [sp, #24]90; V83A-NEXT: mov w9, #3 // =0x391; V83A-NEXT: mov w8, #4 // =0x492; V83A-NEXT: stp w8, w9, [sp, #16]93; V83A-NEXT: mov w9, #5 // =0x594; V83A-NEXT: mov w8, #6 // =0x695; V83A-NEXT: stp w8, w9, [sp, #8]96; V83A-NEXT: add sp, sp, #3297; V83A-NEXT: retab98 %1 = alloca i32, align 499 %2 = alloca i32, align 4100 %3 = alloca i32, align 4101 %4 = alloca i32, align 4102 %5 = alloca i32, align 4103 %6 = alloca i32, align 4104 store i32 1, ptr %1, align 4105 store i32 2, ptr %2, align 4106 store i32 3, ptr %3, align 4107 store i32 4, ptr %4, align 4108 store i32 5, ptr %5, align 4109 store i32 6, ptr %6, align 4110 ret void111}112 113define void @c() "sign-return-address"="all" {114; V8A-LABEL: c:115; V8A: // %bb.0:116; V8A-NEXT: hint #25117; V8A-NEXT: .cfi_negate_ra_state118; V8A-NEXT: sub sp, sp, #32119; V8A-NEXT: .cfi_def_cfa_offset 32120; V8A-NEXT: mov w8, #1 // =0x1121; V8A-NEXT: mov w9, #2 // =0x2122; V8A-NEXT: stp w9, w8, [sp, #24]123; V8A-NEXT: mov w9, #3 // =0x3124; V8A-NEXT: mov w8, #4 // =0x4125; V8A-NEXT: stp w8, w9, [sp, #16]126; V8A-NEXT: mov w9, #5 // =0x5127; V8A-NEXT: mov w8, #6 // =0x6128; V8A-NEXT: stp w8, w9, [sp, #8]129; V8A-NEXT: add sp, sp, #32130; V8A-NEXT: hint #29131; V8A-NEXT: ret132;133; V83A-LABEL: c:134; V83A: // %bb.0:135; V83A-NEXT: paciasp136; V83A-NEXT: .cfi_negate_ra_state137; V83A-NEXT: sub sp, sp, #32138; V83A-NEXT: .cfi_def_cfa_offset 32139; V83A-NEXT: mov w8, #1 // =0x1140; V83A-NEXT: mov w9, #2 // =0x2141; V83A-NEXT: stp w9, w8, [sp, #24]142; V83A-NEXT: mov w9, #3 // =0x3143; V83A-NEXT: mov w8, #4 // =0x4144; V83A-NEXT: stp w8, w9, [sp, #16]145; V83A-NEXT: mov w9, #5 // =0x5146; V83A-NEXT: mov w8, #6 // =0x6147; V83A-NEXT: stp w8, w9, [sp, #8]148; V83A-NEXT: add sp, sp, #32149; V83A-NEXT: retaa150 %1 = alloca i32, align 4151 %2 = alloca i32, align 4152 %3 = alloca i32, align 4153 %4 = alloca i32, align 4154 %5 = alloca i32, align 4155 %6 = alloca i32, align 4156 store i32 1, ptr %1, align 4157 store i32 2, ptr %2, align 4158 store i32 3, ptr %3, align 4159 store i32 4, ptr %4, align 4160 store i32 5, ptr %5, align 4161 store i32 6, ptr %6, align 4162 ret void163}164 165; CHECK-NOT: OUTLINED_FUNCTION_0:166; CHECK-NOT: // -- Begin function167;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:168; CHECK: {{.*}}169