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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK-ISEL3; RUN: llc -mtriple=aarch64 %s -o - -mattr=cssc | FileCheck %s --check-prefixes=CHECK-CSSC4; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK-GLOBAL5; RUN: llc -mtriple=aarch64 -global-isel %s -o - -mattr=cssc | FileCheck %s --check-prefixes=CHECK-CSSC6 7; These tests check for @llvm.smax, @llvm.smin combines.8 9; SMAX10 11declare i8 @llvm.smax.i8(i8 %a, i8 %b) readnone12 13define i8 @smaxi8_zero(i8 %a) {14; CHECK-ISEL-LABEL: smaxi8_zero:15; CHECK-ISEL: // %bb.0:16; CHECK-ISEL-NEXT: sxtb w8, w017; CHECK-ISEL-NEXT: bic w0, w8, w8, asr #3118; CHECK-ISEL-NEXT: ret19;20; CHECK-CSSC-LABEL: smaxi8_zero:21; CHECK-CSSC: // %bb.0:22; CHECK-CSSC-NEXT: sxtb w8, w023; CHECK-CSSC-NEXT: smax w0, w8, #024; CHECK-CSSC-NEXT: ret25;26; CHECK-GLOBAL-LABEL: smaxi8_zero:27; CHECK-GLOBAL: // %bb.0:28; CHECK-GLOBAL-NEXT: sxtb w8, w029; CHECK-GLOBAL-NEXT: cmp w8, #030; CHECK-GLOBAL-NEXT: csel w0, w0, wzr, gt31; CHECK-GLOBAL-NEXT: ret32 %c = call i8 @llvm.smax.i8(i8 %a, i8 0)33 ret i8 %c34}35 36declare i16 @llvm.smax.i16(i16 %a, i16 %b) readnone37 38define i16 @smaxi16_zero(i16 %a) {39; CHECK-ISEL-LABEL: smaxi16_zero:40; CHECK-ISEL: // %bb.0:41; CHECK-ISEL-NEXT: sxth w8, w042; CHECK-ISEL-NEXT: bic w0, w8, w8, asr #3143; CHECK-ISEL-NEXT: ret44;45; CHECK-CSSC-LABEL: smaxi16_zero:46; CHECK-CSSC: // %bb.0:47; CHECK-CSSC-NEXT: sxth w8, w048; CHECK-CSSC-NEXT: smax w0, w8, #049; CHECK-CSSC-NEXT: ret50;51; CHECK-GLOBAL-LABEL: smaxi16_zero:52; CHECK-GLOBAL: // %bb.0:53; CHECK-GLOBAL-NEXT: sxth w8, w054; CHECK-GLOBAL-NEXT: cmp w8, #055; CHECK-GLOBAL-NEXT: csel w0, w0, wzr, gt56; CHECK-GLOBAL-NEXT: ret57 %c = call i16 @llvm.smax.i16(i16 %a, i16 0)58 ret i16 %c59}60 61declare i32 @llvm.smax.i32(i32 %a, i32 %b) readnone62 63define i32 @smaxi32_zero(i32 %a) {64; CHECK-ISEL-LABEL: smaxi32_zero:65; CHECK-ISEL: // %bb.0:66; CHECK-ISEL-NEXT: bic w0, w0, w0, asr #3167; CHECK-ISEL-NEXT: ret68;69; CHECK-CSSC-LABEL: smaxi32_zero:70; CHECK-CSSC: // %bb.0:71; CHECK-CSSC-NEXT: smax w0, w0, #072; CHECK-CSSC-NEXT: ret73;74; CHECK-GLOBAL-LABEL: smaxi32_zero:75; CHECK-GLOBAL: // %bb.0:76; CHECK-GLOBAL-NEXT: cmp w0, #077; CHECK-GLOBAL-NEXT: csel w0, w0, wzr, gt78; CHECK-GLOBAL-NEXT: ret79 %c = call i32 @llvm.smax.i32(i32 %a, i32 0)80 ret i32 %c81}82 83declare i64 @llvm.smax.i64(i64 %a, i64 %b) readnone84 85define i64 @smaxi64_zero(i64 %a) {86; CHECK-ISEL-LABEL: smaxi64_zero:87; CHECK-ISEL: // %bb.0:88; CHECK-ISEL-NEXT: bic x0, x0, x0, asr #6389; CHECK-ISEL-NEXT: ret90;91; CHECK-CSSC-LABEL: smaxi64_zero:92; CHECK-CSSC: // %bb.0:93; CHECK-CSSC-NEXT: smax x0, x0, #094; CHECK-CSSC-NEXT: ret95;96; CHECK-GLOBAL-LABEL: smaxi64_zero:97; CHECK-GLOBAL: // %bb.0:98; CHECK-GLOBAL-NEXT: cmp x0, #099; CHECK-GLOBAL-NEXT: csel x0, x0, xzr, gt100; CHECK-GLOBAL-NEXT: ret101 %c = call i64 @llvm.smax.i64(i64 %a, i64 0)102 ret i64 %c103}104 105; SMIN106 107declare i8 @llvm.smin.i8(i8 %a, i8 %b) readnone108 109define i8 @smini8_zero(i8 %a) {110; CHECK-ISEL-LABEL: smini8_zero:111; CHECK-ISEL: // %bb.0:112; CHECK-ISEL-NEXT: sxtb w8, w0113; CHECK-ISEL-NEXT: and w0, w8, w8, asr #31114; CHECK-ISEL-NEXT: ret115;116; CHECK-CSSC-LABEL: smini8_zero:117; CHECK-CSSC: // %bb.0:118; CHECK-CSSC-NEXT: sxtb w8, w0119; CHECK-CSSC-NEXT: smin w0, w8, #0120; CHECK-CSSC-NEXT: ret121;122; CHECK-GLOBAL-LABEL: smini8_zero:123; CHECK-GLOBAL: // %bb.0:124; CHECK-GLOBAL-NEXT: sxtb w8, w0125; CHECK-GLOBAL-NEXT: cmp w8, #0126; CHECK-GLOBAL-NEXT: csel w0, w0, wzr, mi127; CHECK-GLOBAL-NEXT: ret128 %c = call i8 @llvm.smin.i8(i8 %a, i8 0)129 ret i8 %c130}131 132declare i16 @llvm.smin.i16(i16 %a, i16 %b) readnone133 134define i16 @smini16_zero(i16 %a) {135; CHECK-ISEL-LABEL: smini16_zero:136; CHECK-ISEL: // %bb.0:137; CHECK-ISEL-NEXT: sxth w8, w0138; CHECK-ISEL-NEXT: and w0, w8, w8, asr #31139; CHECK-ISEL-NEXT: ret140;141; CHECK-CSSC-LABEL: smini16_zero:142; CHECK-CSSC: // %bb.0:143; CHECK-CSSC-NEXT: sxth w8, w0144; CHECK-CSSC-NEXT: smin w0, w8, #0145; CHECK-CSSC-NEXT: ret146;147; CHECK-GLOBAL-LABEL: smini16_zero:148; CHECK-GLOBAL: // %bb.0:149; CHECK-GLOBAL-NEXT: sxth w8, w0150; CHECK-GLOBAL-NEXT: cmp w8, #0151; CHECK-GLOBAL-NEXT: csel w0, w0, wzr, mi152; CHECK-GLOBAL-NEXT: ret153 %c = call i16 @llvm.smin.i16(i16 %a, i16 0)154 ret i16 %c155}156 157declare i32 @llvm.smin.i32(i32 %a, i32 %b) readnone158 159define i32 @smini32_zero(i32 %a) {160; CHECK-ISEL-LABEL: smini32_zero:161; CHECK-ISEL: // %bb.0:162; CHECK-ISEL-NEXT: and w0, w0, w0, asr #31163; CHECK-ISEL-NEXT: ret164;165; CHECK-CSSC-LABEL: smini32_zero:166; CHECK-CSSC: // %bb.0:167; CHECK-CSSC-NEXT: smin w0, w0, #0168; CHECK-CSSC-NEXT: ret169;170; CHECK-GLOBAL-LABEL: smini32_zero:171; CHECK-GLOBAL: // %bb.0:172; CHECK-GLOBAL-NEXT: cmp w0, #0173; CHECK-GLOBAL-NEXT: csel w0, w0, wzr, mi174; CHECK-GLOBAL-NEXT: ret175 %c = call i32 @llvm.smin.i32(i32 %a, i32 0)176 ret i32 %c177}178 179declare i64 @llvm.smin.i64(i64 %a, i64 %b) readnone180 181define i64 @smini64_zero(i64 %a) {182; CHECK-ISEL-LABEL: smini64_zero:183; CHECK-ISEL: // %bb.0:184; CHECK-ISEL-NEXT: and x0, x0, x0, asr #63185; CHECK-ISEL-NEXT: ret186;187; CHECK-CSSC-LABEL: smini64_zero:188; CHECK-CSSC: // %bb.0:189; CHECK-CSSC-NEXT: smin x0, x0, #0190; CHECK-CSSC-NEXT: ret191;192; CHECK-GLOBAL-LABEL: smini64_zero:193; CHECK-GLOBAL: // %bb.0:194; CHECK-GLOBAL-NEXT: cmp x0, #0195; CHECK-GLOBAL-NEXT: csel x0, x0, xzr, mi196; CHECK-GLOBAL-NEXT: ret197 %c = call i64 @llvm.smin.i64(i64 %a, i64 0)198 ret i64 %c199}200