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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s3 4define <4 x i32> @t1(<4 x i32> %a, <4 x i32> %b) {5; CHECK-LABEL: t1:6; CHECK: // %bb.0:7; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s8; CHECK-NEXT: ret9 %t1 = icmp sgt <4 x i32> %a, %b10 %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b11 ret <4 x i32> %t212}13 14define <4 x i32> @t2(<4 x i32> %a, <4 x i32> %b) {15; CHECK-LABEL: t2:16; CHECK: // %bb.0:17; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s18; CHECK-NEXT: ret19 %t1 = icmp slt <4 x i32> %a, %b20 %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b21 ret <4 x i32> %t222}23 24define <4 x i32> @t3(<4 x i32> %a, <4 x i32> %b) {25; CHECK-LABEL: t3:26; CHECK: // %bb.0:27; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s28; CHECK-NEXT: ret29 %t1 = icmp ugt <4 x i32> %a, %b30 %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b31 ret <4 x i32> %t232}33 34define <8 x i8> @t4(<8 x i8> %a, <8 x i8> %b) {35; CHECK-LABEL: t4:36; CHECK: // %bb.0:37; CHECK-NEXT: umin v0.8b, v0.8b, v1.8b38; CHECK-NEXT: ret39 %t1 = icmp ult <8 x i8> %a, %b40 %t2 = select <8 x i1> %t1, <8 x i8> %a, <8 x i8> %b41 ret <8 x i8> %t242}43 44define <4 x i16> @t5(<4 x i16> %a, <4 x i16> %b) {45; CHECK-LABEL: t5:46; CHECK: // %bb.0:47; CHECK-NEXT: smin v0.4h, v1.4h, v0.4h48; CHECK-NEXT: ret49 %t1 = icmp sgt <4 x i16> %b, %a50 %t2 = select <4 x i1> %t1, <4 x i16> %a, <4 x i16> %b51 ret <4 x i16> %t252}53 54define <2 x i32> @t6(<2 x i32> %a, <2 x i32> %b) {55; CHECK-LABEL: t6:56; CHECK: // %bb.0:57; CHECK-NEXT: smax v0.2s, v1.2s, v0.2s58; CHECK-NEXT: ret59 %t1 = icmp slt <2 x i32> %b, %a60 %t2 = select <2 x i1> %t1, <2 x i32> %a, <2 x i32> %b61 ret <2 x i32> %t262}63 64define <16 x i8> @t7(<16 x i8> %a, <16 x i8> %b) {65; CHECK-LABEL: t7:66; CHECK: // %bb.0:67; CHECK-NEXT: umin v0.16b, v1.16b, v0.16b68; CHECK-NEXT: ret69 %t1 = icmp ugt <16 x i8> %b, %a70 %t2 = select <16 x i1> %t1, <16 x i8> %a, <16 x i8> %b71 ret <16 x i8> %t272}73 74define <8 x i16> @t8(<8 x i16> %a, <8 x i16> %b) {75; CHECK-LABEL: t8:76; CHECK: // %bb.0:77; CHECK-NEXT: umax v0.8h, v1.8h, v0.8h78; CHECK-NEXT: ret79 %t1 = icmp ult <8 x i16> %b, %a80 %t2 = select <8 x i1> %t1, <8 x i16> %a, <8 x i16> %b81 ret <8 x i16> %t282}83 84define <4 x i32> @t9(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {85; CHECK-LABEL: t9:86; CHECK: // %bb.0:87; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s88; CHECK-NEXT: smax v0.4s, v0.4s, v2.4s89; CHECK-NEXT: ret90 %t1 = icmp ugt <4 x i32> %b, %a91 %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b92 %t3 = icmp sge <4 x i32> %t2, %c93 %t4 = select <4 x i1> %t3, <4 x i32> %t2, <4 x i32> %c94 ret <4 x i32> %t495}96 97define <8 x i32> @t10(<8 x i32> %a, <8 x i32> %b) {98; CHECK-LABEL: t10:99; CHECK: // %bb.0:100; CHECK-NEXT: smax v1.4s, v1.4s, v3.4s101; CHECK-NEXT: smax v0.4s, v0.4s, v2.4s102; CHECK-NEXT: ret103 %t1 = icmp sgt <8 x i32> %a, %b104 %t2 = select <8 x i1> %t1, <8 x i32> %a, <8 x i32> %b105 ret <8 x i32> %t2106}107 108define <16 x i32> @t11(<16 x i32> %a, <16 x i32> %b) {109; CHECK-LABEL: t11:110; CHECK: // %bb.0:111; CHECK-NEXT: smin v2.4s, v2.4s, v6.4s112; CHECK-NEXT: smin v0.4s, v0.4s, v4.4s113; CHECK-NEXT: smin v1.4s, v1.4s, v5.4s114; CHECK-NEXT: smin v3.4s, v3.4s, v7.4s115; CHECK-NEXT: ret116 %t1 = icmp sle <16 x i32> %a, %b117 %t2 = select <16 x i1> %t1, <16 x i32> %a, <16 x i32> %b118 ret <16 x i32> %t2119}120 121; The icmp is used by two instructions, so don't produce a umin node.122define <16 x i8> @t12(<16 x i8> %a, <16 x i8> %b) {123; CHECK-LABEL: t12:124; CHECK: // %bb.0:125; CHECK-NEXT: cmhi v2.16b, v1.16b, v0.16b126; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b127; CHECK-NEXT: sub v0.16b, v0.16b, v2.16b128; CHECK-NEXT: ret129 %t1 = icmp ugt <16 x i8> %b, %a130 %t2 = select <16 x i1> %t1, <16 x i8> %a, <16 x i8> %b131 %t3 = zext <16 x i1> %t1 to <16 x i8>132 %t4 = add <16 x i8> %t3, %t2133 ret <16 x i8> %t4134}135 136define <1 x i64> @t13(<1 x i64> %a, <1 x i64> %b) {137; CHECK-LABEL: t13:138; CHECK: // %bb.0:139; CHECK-NEXT: cmhi d2, d1, d0140; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b141; CHECK-NEXT: ret142 %t1 = icmp ult <1 x i64> %a, %b143 %t2 = select <1 x i1> %t1, <1 x i64> %a, <1 x i64> %b144 ret <1 x i64> %t2145}146 147define <2 x i64> @t14(<2 x i64> %a, <2 x i64> %b) {148; CHECK-LABEL: t14:149; CHECK: // %bb.0:150; CHECK-NEXT: cmhi v2.2d, v0.2d, v1.2d151; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b152; CHECK-NEXT: ret153 %t1 = icmp ugt <2 x i64> %a, %b154 %t2 = select <2 x i1> %t1, <2 x i64> %a, <2 x i64> %b155 ret <2 x i64> %t2156}157 158define <4 x i64> @t15(<4 x i64> %a, <4 x i64> %b) {159; CHECK-LABEL: t15:160; CHECK: // %bb.0:161; CHECK-NEXT: cmhi v4.2d, v3.2d, v1.2d162; CHECK-NEXT: cmhi v5.2d, v2.2d, v0.2d163; CHECK-NEXT: bif v1.16b, v3.16b, v4.16b164; CHECK-NEXT: bif v0.16b, v2.16b, v5.16b165; CHECK-NEXT: ret166 %t1 = icmp ule <4 x i64> %a, %b167 %t2 = select <4 x i1> %t1, <4 x i64> %a, <4 x i64> %b168 ret <4 x i64> %t2169}170