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1# RUN: llc -o - -run-pass=machine-scheduler -misched=shuffle %s | FileCheck %s2# RUN: llc -o - -run-pass=postmisched %s | FileCheck %s3 4# RUN: llc -o - -passes=machine-scheduler -misched=shuffle %s | FileCheck %s5# RUN: llc -o - -passes=postmisched %s | FileCheck %s6 7# REQUIRES: asserts8# -misched=shuffle is only available with assertions enabled9 10# Check that instructions that are recognized as branch targets by BTI11# are not reordered by machine instruction schedulers.12 13--- |14 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"15 target triple = "aarch64-unknown-linux-gnu"16 17 define i32 @f_pac_pseudo(i32 %a, i32 %b, i32 %c) #0 "sign-return-address"="all" {18 entry:19 ret i32 020 }21 22 define i32 @f_pac(i32 %a, i32 %b, i32 %c) #0 "sign-return-address"="all" {23 entry:24 ret i32 025 }26 27 define i32 @f_bti(i32 %a, i32 %b, i32 %c) #0 {28 entry:29 ret i32 030 }31 32 define i32 @f_brk(i32 %a, i32 %b, i32 %c) #0 {33 entry:34 ret i32 035 }36 37 define i32 @f_hlt(i32 %a, i32 %b, i32 %c) #0 {38 entry:39 ret i32 040 }41 42 define i32 @f_nop(i32 %a, i32 %b, i32 %c) #0 {43 entry:44 ret i32 045 }46 47 attributes #0 = { nounwind memory(none) "target-features"="+v8.2a" }48 49...50---51name: f_pac_pseudo52alignment: 453tracksRegLiveness: true54body: |55 bb.0.entry:56 liveins: $w0, $w1, $w2, $lr57 58 frame-setup PAUTH_PROLOGUE implicit-def $lr, implicit $lr, implicit $sp59 $w8 = ADDWrs $w0, $w1, 060 $w0 = MADDWrrr $w8, $w2, $wzr61 RET undef $lr, implicit $w062 63# PAUTH_EPILOGUE instruction is omitted for simplicity as it is technically possible64# to move it, so it may end up at a less obvious position in a basic block.65 66# CHECK-LABEL: name: f_pac_pseudo67# CHECK: body: |68# CHECK-NEXT: bb.0.entry:69# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr70#71# CHECK: frame-setup PAUTH_PROLOGUE implicit-def $lr, implicit {{.*}}$lr, implicit $sp72# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 073# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr74# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w075 76...77---78name: f_pac79alignment: 480tracksRegLiveness: true81body: |82 bb.0.entry:83 liveins: $w0, $w1, $w2, $lr84 85 frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp86 $w8 = ADDWrs $w0, $w1, 087 $w0 = MADDWrrr $w8, $w2, $wzr88 RET undef $lr, implicit $w089 90# AUTIASP is omitted, see above.91 92# CHECK-LABEL: name: f_pac93# CHECK: body: |94# CHECK-NEXT: bb.0.entry:95# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr96#97# CHECK: frame-setup PACIASP implicit-def $lr, implicit {{.*}}$lr, implicit $sp98# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 099# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr100# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0101 102...103---104name: f_bti105alignment: 4106tracksRegLiveness: true107body: |108 bb.0.entry:109 liveins: $w0, $w1, $w2, $lr110 111 HINT 34112 $w8 = ADDWrs $w0, $w1, 0113 $w0 = MADDWrrr $w8, $w2, $wzr114 RET undef $lr, implicit $w0115 116# CHECK-LABEL: name: f_bti117# CHECK: body: |118# CHECK-NEXT: bb.0.entry:119# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr120#121# CHECK: HINT 34122# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0123# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr124# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0125 126...127---128name: f_brk129alignment: 4130tracksRegLiveness: true131body: |132 bb.0.entry:133 liveins: $w0, $w1, $w2, $lr134 135 BRK 1136 $w8 = ADDWrs $w0, $w1, 0137 $w0 = MADDWrrr $w8, $w2, $wzr138 RET undef $lr, implicit $w0139 140# CHECK-LABEL: name: f_brk141# CHECK: body: |142# CHECK-NEXT: bb.0.entry:143# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr144#145# CHECK: BRK 1146# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0147# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr148# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0149 150...151---152name: f_hlt153alignment: 4154tracksRegLiveness: true155body: |156 bb.0.entry:157 liveins: $w0, $w1, $w2, $lr158 159 HLT 1160 $w8 = ADDWrs $w0, $w1, 0161 $w0 = MADDWrrr $w8, $w2, $wzr162 RET undef $lr, implicit $w0163 164# CHECK-LABEL: name: f_hlt165# CHECK: body: |166# CHECK-NEXT: bb.0.entry:167# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr168#169# CHECK: HLT 1170# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0171# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr172# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0173 174...175---176name: f_nop177alignment: 4178tracksRegLiveness: true179body: |180 bb.0.entry:181 liveins: $w0, $w1, $w2, $lr182 183 HINT 0184 $w8 = ADDWrs $w0, $w1, 0185 $w0 = MADDWrrr $w8, $w2, $wzr186 RET undef $lr, implicit $w0187 188# Check that BTI-related instructions are left intact not because *anything*189# is left intact.190 191# CHECK-LABEL: name: f_nop192# CHECK: body: |193# CHECK-NEXT: bb.0.entry:194# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr195#196# CHECK: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0197# CHECK-DAG: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr198# CHECK-DAG: HINT 0199# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0200 201...202