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1; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cortex-a57 -mattr=+arith-bcc-fusion | FileCheck %s --check-prefix=FUSEBCC2; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cortex-a57 -mattr=+arith-cbz-fusion | FileCheck %s --check-prefix=FUSECBZ3; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cyclone | FileCheck %s --check-prefix=FUSEBCC --check-prefix=FUSECBZ4 5target triple = "aarch64-unknown"6 7declare void @foobar(i32 %v0, i32 %v1)8 9; Make sure cmp is scheduled in front of bcc10; FUSEBCC-LABEL: test_cmp_bcc:11; FUSEBCC: cmp {{w[0-9]+}}, #1312; FUSEBCC-NEXT: b.ne {{.?LBB[0-9_]+}}13define void @test_cmp_bcc(i32 %a0, i32 %a1) {14entry:15 %cond = icmp eq i32 %a0, 1316 %v1 = add i32 %a1, 717 br i1 %cond, label %if, label %exit18 19if:20 call void @foobar(i32 %v1, i32 %a0)21 br label %exit22 23exit:24 call void @foobar(i32 %a0, i32 %v1)25 ret void26}27 28; Make sure sub is scheduled in front of cbnz29; FUSECBZ-LABEL: test_sub_cbz:30; FUSECBZ: sub [[R:w[0-9]+]], {{w[0-9]+}}, #1331; FUSECBZ-NEXT: cbnz [[R]], {{.?LBB[0-9_]+}}32define void @test_sub_cbz(i32 %a0, i32 %a1) {33entry:34 ; except for the fusion opportunity the sub/add should be equal so the35 ; scheduler would leave them in source order if it weren't for the scheduling36 %v0 = sub i32 %a0, 1337 %cond = icmp eq i32 %v0, 038 %v1 = add i32 %a1, 739 br i1 %cond, label %if, label %exit40 41if:42 call void @foobar(i32 %v1, i32 %v0)43 br label %exit44 45exit:46 call void @foobar(i32 %v0, i32 %v1)47 ret void48}49