646 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i8 @i8(i8 %a, i8 %b) {6; CHECK-LABEL: i8:7; CHECK: // %bb.0: // %entry8; CHECK-NEXT: mul w0, w0, w19; CHECK-NEXT: ret10entry:11 %s = mul i8 %a, %b12 ret i8 %s13}14 15define i16 @i16(i16 %a, i16 %b) {16; CHECK-LABEL: i16:17; CHECK: // %bb.0: // %entry18; CHECK-NEXT: mul w0, w0, w119; CHECK-NEXT: ret20entry:21 %s = mul i16 %a, %b22 ret i16 %s23}24 25define i32 @i32(i32 %a, i32 %b) {26; CHECK-LABEL: i32:27; CHECK: // %bb.0: // %entry28; CHECK-NEXT: mul w0, w0, w129; CHECK-NEXT: ret30entry:31 %s = mul i32 %a, %b32 ret i32 %s33}34 35define i64 @i64(i64 %a, i64 %b) {36; CHECK-LABEL: i64:37; CHECK: // %bb.0: // %entry38; CHECK-NEXT: mul x0, x0, x139; CHECK-NEXT: ret40entry:41 %s = mul i64 %a, %b42 ret i64 %s43}44 45define i128 @i128(i128 %a, i128 %b) {46; CHECK-SD-LABEL: i128:47; CHECK-SD: // %bb.0: // %entry48; CHECK-SD-NEXT: umulh x8, x0, x249; CHECK-SD-NEXT: madd x8, x0, x3, x850; CHECK-SD-NEXT: mul x0, x0, x251; CHECK-SD-NEXT: madd x1, x1, x2, x852; CHECK-SD-NEXT: ret53;54; CHECK-GI-LABEL: i128:55; CHECK-GI: // %bb.0: // %entry56; CHECK-GI-NEXT: mul x9, x0, x357; CHECK-GI-NEXT: mul x8, x0, x258; CHECK-GI-NEXT: umulh x10, x0, x259; CHECK-GI-NEXT: madd x9, x1, x2, x960; CHECK-GI-NEXT: mov x0, x861; CHECK-GI-NEXT: add x1, x9, x1062; CHECK-GI-NEXT: ret63entry:64 %s = mul i128 %a, %b65 ret i128 %s66}67 68define void @v2i8(ptr %p1, ptr %p2) {69; CHECK-SD-LABEL: v2i8:70; CHECK-SD: // %bb.0: // %entry71; CHECK-SD-NEXT: ldr h0, [x0]72; CHECK-SD-NEXT: ldr h1, [x1]73; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #074; CHECK-SD-NEXT: ushll v1.8h, v1.8b, #075; CHECK-SD-NEXT: umull v0.4s, v0.4h, v1.4h76; CHECK-SD-NEXT: mov s1, v0.s[1]77; CHECK-SD-NEXT: str b0, [x0]78; CHECK-SD-NEXT: stur b1, [x0, #1]79; CHECK-SD-NEXT: ret80;81; CHECK-GI-LABEL: v2i8:82; CHECK-GI: // %bb.0: // %entry83; CHECK-GI-NEXT: ld1 { v0.b }[0], [x0]84; CHECK-GI-NEXT: ld1 { v1.b }[0], [x1]85; CHECK-GI-NEXT: ldr b2, [x0, #1]86; CHECK-GI-NEXT: ldr b3, [x1, #1]87; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]88; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]89; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s90; CHECK-GI-NEXT: mov s1, v0.s[1]91; CHECK-GI-NEXT: str b0, [x0]92; CHECK-GI-NEXT: str b1, [x0, #1]93; CHECK-GI-NEXT: ret94entry:95 %d = load <2 x i8>, ptr %p196 %e = load <2 x i8>, ptr %p297 %s = mul <2 x i8> %d, %e98 store <2 x i8> %s, ptr %p199 ret void100}101 102define void @v3i8(ptr %p1, ptr %p2) {103; CHECK-SD-LABEL: v3i8:104; CHECK-SD: // %bb.0: // %entry105; CHECK-SD-NEXT: sub sp, sp, #16106; CHECK-SD-NEXT: .cfi_def_cfa_offset 16107; CHECK-SD-NEXT: ldr s0, [x0]108; CHECK-SD-NEXT: ldr s1, [x1]109; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b110; CHECK-SD-NEXT: zip1 v1.8b, v1.8b, v0.8b111; CHECK-SD-NEXT: mul v0.4h, v0.4h, v1.4h112; CHECK-SD-NEXT: uzp1 v1.8b, v0.8b, v0.8b113; CHECK-SD-NEXT: mov h0, v0.h[2]114; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0115; CHECK-SD-NEXT: stur b0, [x0, #2]116; CHECK-SD-NEXT: str h1, [x0]117; CHECK-SD-NEXT: add sp, sp, #16118; CHECK-SD-NEXT: ret119;120; CHECK-GI-LABEL: v3i8:121; CHECK-GI: // %bb.0: // %entry122; CHECK-GI-NEXT: ldr w8, [x0]123; CHECK-GI-NEXT: ldr w9, [x1]124; CHECK-GI-NEXT: fmov s0, w8125; CHECK-GI-NEXT: fmov s1, w9126; CHECK-GI-NEXT: mov b2, v0.b[1]127; CHECK-GI-NEXT: mov b3, v1.b[1]128; CHECK-GI-NEXT: mov b4, v0.b[2]129; CHECK-GI-NEXT: mov b5, v1.b[2]130; CHECK-GI-NEXT: fmov w8, s2131; CHECK-GI-NEXT: fmov w9, s3132; CHECK-GI-NEXT: mov v0.h[1], w8133; CHECK-GI-NEXT: mov v1.h[1], w9134; CHECK-GI-NEXT: fmov w8, s4135; CHECK-GI-NEXT: fmov w9, s5136; CHECK-GI-NEXT: mov v0.h[2], w8137; CHECK-GI-NEXT: mov v1.h[2], w9138; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h139; CHECK-GI-NEXT: mov h1, v0.h[1]140; CHECK-GI-NEXT: mov h2, v0.h[2]141; CHECK-GI-NEXT: str b0, [x0]142; CHECK-GI-NEXT: str b1, [x0, #1]143; CHECK-GI-NEXT: str b2, [x0, #2]144; CHECK-GI-NEXT: ret145entry:146 %d = load <3 x i8>, ptr %p1147 %e = load <3 x i8>, ptr %p2148 %s = mul <3 x i8> %d, %e149 store <3 x i8> %s, ptr %p1150 ret void151}152 153define void @v4i8(ptr %p1, ptr %p2) {154; CHECK-SD-LABEL: v4i8:155; CHECK-SD: // %bb.0: // %entry156; CHECK-SD-NEXT: ldr s0, [x0]157; CHECK-SD-NEXT: ldr s1, [x1]158; CHECK-SD-NEXT: umull v0.8h, v0.8b, v1.8b159; CHECK-SD-NEXT: xtn v0.8b, v0.8h160; CHECK-SD-NEXT: str s0, [x0]161; CHECK-SD-NEXT: ret162;163; CHECK-GI-LABEL: v4i8:164; CHECK-GI: // %bb.0: // %entry165; CHECK-GI-NEXT: ldr w8, [x0]166; CHECK-GI-NEXT: ldr w9, [x1]167; CHECK-GI-NEXT: fmov s0, w8168; CHECK-GI-NEXT: fmov s1, w9169; CHECK-GI-NEXT: mov b2, v0.b[1]170; CHECK-GI-NEXT: mov b3, v1.b[1]171; CHECK-GI-NEXT: mov b4, v0.b[2]172; CHECK-GI-NEXT: mov b5, v0.b[3]173; CHECK-GI-NEXT: fmov w8, s2174; CHECK-GI-NEXT: mov b2, v1.b[2]175; CHECK-GI-NEXT: fmov w9, s3176; CHECK-GI-NEXT: mov b3, v1.b[3]177; CHECK-GI-NEXT: mov v0.h[1], w8178; CHECK-GI-NEXT: mov v1.h[1], w9179; CHECK-GI-NEXT: fmov w8, s4180; CHECK-GI-NEXT: fmov w9, s2181; CHECK-GI-NEXT: mov v0.h[2], w8182; CHECK-GI-NEXT: mov v1.h[2], w9183; CHECK-GI-NEXT: fmov w8, s5184; CHECK-GI-NEXT: fmov w9, s3185; CHECK-GI-NEXT: mov v0.h[3], w8186; CHECK-GI-NEXT: mov v1.h[3], w9187; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h188; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b189; CHECK-GI-NEXT: fmov w8, s0190; CHECK-GI-NEXT: str w8, [x0]191; CHECK-GI-NEXT: ret192entry:193 %d = load <4 x i8>, ptr %p1194 %e = load <4 x i8>, ptr %p2195 %s = mul <4 x i8> %d, %e196 store <4 x i8> %s, ptr %p1197 ret void198}199 200define <8 x i8> @v8i8(<8 x i8> %d, <8 x i8> %e) {201; CHECK-LABEL: v8i8:202; CHECK: // %bb.0: // %entry203; CHECK-NEXT: mul v0.8b, v0.8b, v1.8b204; CHECK-NEXT: ret205entry:206 %s = mul <8 x i8> %d, %e207 ret <8 x i8> %s208}209 210define <16 x i8> @v16i8(<16 x i8> %d, <16 x i8> %e) {211; CHECK-LABEL: v16i8:212; CHECK: // %bb.0: // %entry213; CHECK-NEXT: mul v0.16b, v0.16b, v1.16b214; CHECK-NEXT: ret215entry:216 %s = mul <16 x i8> %d, %e217 ret <16 x i8> %s218}219 220define <32 x i8> @v32i8(<32 x i8> %d, <32 x i8> %e) {221; CHECK-SD-LABEL: v32i8:222; CHECK-SD: // %bb.0: // %entry223; CHECK-SD-NEXT: mul v1.16b, v1.16b, v3.16b224; CHECK-SD-NEXT: mul v0.16b, v0.16b, v2.16b225; CHECK-SD-NEXT: ret226;227; CHECK-GI-LABEL: v32i8:228; CHECK-GI: // %bb.0: // %entry229; CHECK-GI-NEXT: mul v0.16b, v0.16b, v2.16b230; CHECK-GI-NEXT: mul v1.16b, v1.16b, v3.16b231; CHECK-GI-NEXT: ret232entry:233 %s = mul <32 x i8> %d, %e234 ret <32 x i8> %s235}236 237define void @v2i16(ptr %p1, ptr %p2) {238; CHECK-SD-LABEL: v2i16:239; CHECK-SD: // %bb.0: // %entry240; CHECK-SD-NEXT: ldr s0, [x0]241; CHECK-SD-NEXT: ldr s1, [x1]242; CHECK-SD-NEXT: umull v0.4s, v0.4h, v1.4h243; CHECK-SD-NEXT: mov s1, v0.s[1]244; CHECK-SD-NEXT: str h0, [x0]245; CHECK-SD-NEXT: str h1, [x0, #2]246; CHECK-SD-NEXT: ret247;248; CHECK-GI-LABEL: v2i16:249; CHECK-GI: // %bb.0: // %entry250; CHECK-GI-NEXT: ld1 { v0.h }[0], [x0]251; CHECK-GI-NEXT: ld1 { v1.h }[0], [x1]252; CHECK-GI-NEXT: ldr h2, [x0, #2]253; CHECK-GI-NEXT: ldr h3, [x1, #2]254; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]255; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]256; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s257; CHECK-GI-NEXT: mov s1, v0.s[1]258; CHECK-GI-NEXT: str h0, [x0]259; CHECK-GI-NEXT: str h1, [x0, #2]260; CHECK-GI-NEXT: ret261entry:262 %d = load <2 x i16>, ptr %p1263 %e = load <2 x i16>, ptr %p2264 %s = mul <2 x i16> %d, %e265 store <2 x i16> %s, ptr %p1266 ret void267}268 269define void @v3i16(ptr %p1, ptr %p2) {270; CHECK-SD-LABEL: v3i16:271; CHECK-SD: // %bb.0: // %entry272; CHECK-SD-NEXT: ldr d0, [x0]273; CHECK-SD-NEXT: ldr d1, [x1]274; CHECK-SD-NEXT: mul v0.4h, v0.4h, v1.4h275; CHECK-SD-NEXT: mov h1, v0.h[2]276; CHECK-SD-NEXT: str s0, [x0]277; CHECK-SD-NEXT: str h1, [x0, #4]278; CHECK-SD-NEXT: ret279;280; CHECK-GI-LABEL: v3i16:281; CHECK-GI: // %bb.0: // %entry282; CHECK-GI-NEXT: ldr d0, [x0]283; CHECK-GI-NEXT: ldr d1, [x1]284; CHECK-GI-NEXT: add x8, x0, #2285; CHECK-GI-NEXT: add x9, x0, #4286; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h287; CHECK-GI-NEXT: str h0, [x0]288; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]289; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]290; CHECK-GI-NEXT: ret291entry:292 %d = load <3 x i16>, ptr %p1293 %e = load <3 x i16>, ptr %p2294 %s = mul <3 x i16> %d, %e295 store <3 x i16> %s, ptr %p1296 ret void297}298 299define <4 x i16> @v4i16(<4 x i16> %d, <4 x i16> %e) {300; CHECK-LABEL: v4i16:301; CHECK: // %bb.0: // %entry302; CHECK-NEXT: mul v0.4h, v0.4h, v1.4h303; CHECK-NEXT: ret304entry:305 %s = mul <4 x i16> %d, %e306 ret <4 x i16> %s307}308 309define <8 x i16> @v8i16(<8 x i16> %d, <8 x i16> %e) {310; CHECK-LABEL: v8i16:311; CHECK: // %bb.0: // %entry312; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h313; CHECK-NEXT: ret314entry:315 %s = mul <8 x i16> %d, %e316 ret <8 x i16> %s317}318 319define <16 x i16> @v16i16(<16 x i16> %d, <16 x i16> %e) {320; CHECK-SD-LABEL: v16i16:321; CHECK-SD: // %bb.0: // %entry322; CHECK-SD-NEXT: mul v1.8h, v1.8h, v3.8h323; CHECK-SD-NEXT: mul v0.8h, v0.8h, v2.8h324; CHECK-SD-NEXT: ret325;326; CHECK-GI-LABEL: v16i16:327; CHECK-GI: // %bb.0: // %entry328; CHECK-GI-NEXT: mul v0.8h, v0.8h, v2.8h329; CHECK-GI-NEXT: mul v1.8h, v1.8h, v3.8h330; CHECK-GI-NEXT: ret331entry:332 %s = mul <16 x i16> %d, %e333 ret <16 x i16> %s334}335 336define <2 x i32> @v2i32(<2 x i32> %d, <2 x i32> %e) {337; CHECK-LABEL: v2i32:338; CHECK: // %bb.0: // %entry339; CHECK-NEXT: mul v0.2s, v0.2s, v1.2s340; CHECK-NEXT: ret341entry:342 %s = mul <2 x i32> %d, %e343 ret <2 x i32> %s344}345 346define <3 x i32> @v3i32(<3 x i32> %d, <3 x i32> %e) {347; CHECK-LABEL: v3i32:348; CHECK: // %bb.0: // %entry349; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s350; CHECK-NEXT: ret351entry:352 %s = mul <3 x i32> %d, %e353 ret <3 x i32> %s354}355 356define <4 x i32> @v4i32(<4 x i32> %d, <4 x i32> %e) {357; CHECK-LABEL: v4i32:358; CHECK: // %bb.0: // %entry359; CHECK-NEXT: mul v0.4s, v0.4s, v1.4s360; CHECK-NEXT: ret361entry:362 %s = mul <4 x i32> %d, %e363 ret <4 x i32> %s364}365 366define <8 x i32> @v8i32(<8 x i32> %d, <8 x i32> %e) {367; CHECK-SD-LABEL: v8i32:368; CHECK-SD: // %bb.0: // %entry369; CHECK-SD-NEXT: mul v1.4s, v1.4s, v3.4s370; CHECK-SD-NEXT: mul v0.4s, v0.4s, v2.4s371; CHECK-SD-NEXT: ret372;373; CHECK-GI-LABEL: v8i32:374; CHECK-GI: // %bb.0: // %entry375; CHECK-GI-NEXT: mul v0.4s, v0.4s, v2.4s376; CHECK-GI-NEXT: mul v1.4s, v1.4s, v3.4s377; CHECK-GI-NEXT: ret378entry:379 %s = mul <8 x i32> %d, %e380 ret <8 x i32> %s381}382 383define <2 x i64> @v2i64(<2 x i64> %d, <2 x i64> %e) {384; CHECK-SD-LABEL: v2i64:385; CHECK-SD: // %bb.0: // %entry386; CHECK-SD-NEXT: fmov x10, d1387; CHECK-SD-NEXT: fmov x11, d0388; CHECK-SD-NEXT: mov x8, v1.d[1]389; CHECK-SD-NEXT: mov x9, v0.d[1]390; CHECK-SD-NEXT: mul x10, x11, x10391; CHECK-SD-NEXT: mul x8, x9, x8392; CHECK-SD-NEXT: fmov d0, x10393; CHECK-SD-NEXT: mov v0.d[1], x8394; CHECK-SD-NEXT: ret395;396; CHECK-GI-LABEL: v2i64:397; CHECK-GI: // %bb.0: // %entry398; CHECK-GI-NEXT: fmov x10, d0399; CHECK-GI-NEXT: fmov x11, d1400; CHECK-GI-NEXT: mov x8, v0.d[1]401; CHECK-GI-NEXT: mov x9, v1.d[1]402; CHECK-GI-NEXT: mul x10, x10, x11403; CHECK-GI-NEXT: mul x8, x8, x9404; CHECK-GI-NEXT: fmov d0, x10405; CHECK-GI-NEXT: mov v0.d[1], x8406; CHECK-GI-NEXT: ret407entry:408 %s = mul <2 x i64> %d, %e409 ret <2 x i64> %s410}411 412define <3 x i64> @v3i64(<3 x i64> %d, <3 x i64> %e) {413; CHECK-SD-LABEL: v3i64:414; CHECK-SD: // %bb.0: // %entry415; CHECK-SD-NEXT: // kill: def $d3 killed $d3 def $q3416; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0417; CHECK-SD-NEXT: fmov x8, d3418; CHECK-SD-NEXT: fmov x9, d0419; CHECK-SD-NEXT: // kill: def $d4 killed $d4 def $q4420; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1421; CHECK-SD-NEXT: // kill: def $d5 killed $d5 def $q5422; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2423; CHECK-SD-NEXT: fmov x10, d1424; CHECK-SD-NEXT: fmov x11, d2425; CHECK-SD-NEXT: mul x8, x9, x8426; CHECK-SD-NEXT: fmov x9, d4427; CHECK-SD-NEXT: mul x9, x10, x9428; CHECK-SD-NEXT: fmov x10, d5429; CHECK-SD-NEXT: fmov d0, x8430; CHECK-SD-NEXT: mul x10, x11, x10431; CHECK-SD-NEXT: fmov d1, x9432; CHECK-SD-NEXT: fmov d2, x10433; CHECK-SD-NEXT: ret434;435; CHECK-GI-LABEL: v3i64:436; CHECK-GI: // %bb.0: // %entry437; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0438; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3439; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1440; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4441; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]442; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]443; CHECK-GI-NEXT: fmov x10, d0444; CHECK-GI-NEXT: fmov x11, d3445; CHECK-GI-NEXT: mov x8, v0.d[1]446; CHECK-GI-NEXT: mov x9, v3.d[1]447; CHECK-GI-NEXT: mul x10, x10, x11448; CHECK-GI-NEXT: mul x8, x8, x9449; CHECK-GI-NEXT: fmov x9, d5450; CHECK-GI-NEXT: fmov d0, x10451; CHECK-GI-NEXT: mov v0.d[1], x8452; CHECK-GI-NEXT: fmov x8, d2453; CHECK-GI-NEXT: mul x8, x8, x9454; CHECK-GI-NEXT: mov d1, v0.d[1]455; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0456; CHECK-GI-NEXT: fmov d2, x8457; CHECK-GI-NEXT: ret458entry:459 %s = mul <3 x i64> %d, %e460 ret <3 x i64> %s461}462 463define <4 x i64> @v4i64(<4 x i64> %d, <4 x i64> %e) {464; CHECK-SD-LABEL: v4i64:465; CHECK-SD: // %bb.0: // %entry466; CHECK-SD-NEXT: fmov x8, d2467; CHECK-SD-NEXT: fmov x9, d0468; CHECK-SD-NEXT: fmov x12, d1469; CHECK-SD-NEXT: mov x10, v2.d[1]470; CHECK-SD-NEXT: mov x11, v0.d[1]471; CHECK-SD-NEXT: mov x13, v3.d[1]472; CHECK-SD-NEXT: mov x14, v1.d[1]473; CHECK-SD-NEXT: mul x8, x9, x8474; CHECK-SD-NEXT: fmov x9, d3475; CHECK-SD-NEXT: mul x10, x11, x10476; CHECK-SD-NEXT: mul x9, x12, x9477; CHECK-SD-NEXT: fmov d0, x8478; CHECK-SD-NEXT: mul x11, x14, x13479; CHECK-SD-NEXT: mov v0.d[1], x10480; CHECK-SD-NEXT: fmov d1, x9481; CHECK-SD-NEXT: mov v1.d[1], x11482; CHECK-SD-NEXT: ret483;484; CHECK-GI-LABEL: v4i64:485; CHECK-GI: // %bb.0: // %entry486; CHECK-GI-NEXT: fmov x8, d0487; CHECK-GI-NEXT: fmov x9, d2488; CHECK-GI-NEXT: fmov x12, d3489; CHECK-GI-NEXT: mov x10, v0.d[1]490; CHECK-GI-NEXT: mov x11, v2.d[1]491; CHECK-GI-NEXT: mov x13, v1.d[1]492; CHECK-GI-NEXT: mov x14, v3.d[1]493; CHECK-GI-NEXT: mul x8, x8, x9494; CHECK-GI-NEXT: fmov x9, d1495; CHECK-GI-NEXT: mul x10, x10, x11496; CHECK-GI-NEXT: mul x9, x9, x12497; CHECK-GI-NEXT: fmov d0, x8498; CHECK-GI-NEXT: mul x11, x13, x14499; CHECK-GI-NEXT: mov v0.d[1], x10500; CHECK-GI-NEXT: fmov d1, x9501; CHECK-GI-NEXT: mov v1.d[1], x11502; CHECK-GI-NEXT: ret503entry:504 %s = mul <4 x i64> %d, %e505 ret <4 x i64> %s506}507 508define <2 x i128> @v2i128(<2 x i128> %d, <2 x i128> %e) {509; CHECK-SD-LABEL: v2i128:510; CHECK-SD: // %bb.0: // %entry511; CHECK-SD-NEXT: umulh x8, x2, x6512; CHECK-SD-NEXT: umulh x9, x0, x4513; CHECK-SD-NEXT: madd x8, x2, x7, x8514; CHECK-SD-NEXT: madd x9, x0, x5, x9515; CHECK-SD-NEXT: madd x3, x3, x6, x8516; CHECK-SD-NEXT: madd x1, x1, x4, x9517; CHECK-SD-NEXT: mul x0, x0, x4518; CHECK-SD-NEXT: mul x2, x2, x6519; CHECK-SD-NEXT: ret520;521; CHECK-GI-LABEL: v2i128:522; CHECK-GI: // %bb.0: // %entry523; CHECK-GI-NEXT: mul x9, x0, x5524; CHECK-GI-NEXT: mul x12, x2, x7525; CHECK-GI-NEXT: mul x8, x0, x4526; CHECK-GI-NEXT: umulh x10, x0, x4527; CHECK-GI-NEXT: madd x11, x1, x4, x9528; CHECK-GI-NEXT: mov x0, x8529; CHECK-GI-NEXT: mul x9, x2, x6530; CHECK-GI-NEXT: umulh x13, x2, x6531; CHECK-GI-NEXT: add x1, x11, x10532; CHECK-GI-NEXT: madd x12, x3, x6, x12533; CHECK-GI-NEXT: mov x2, x9534; CHECK-GI-NEXT: add x3, x12, x13535; CHECK-GI-NEXT: ret536entry:537 %s = mul <2 x i128> %d, %e538 ret <2 x i128> %s539}540 541define <3 x i128> @v3i128(<3 x i128> %d, <3 x i128> %e) {542; CHECK-SD-LABEL: v3i128:543; CHECK-SD: // %bb.0: // %entry544; CHECK-SD-NEXT: umulh x9, x0, x6545; CHECK-SD-NEXT: ldp x8, x10, [sp]546; CHECK-SD-NEXT: madd x9, x0, x7, x9547; CHECK-SD-NEXT: umulh x11, x2, x8548; CHECK-SD-NEXT: madd x1, x1, x6, x9549; CHECK-SD-NEXT: ldp x9, x12, [sp, #16]550; CHECK-SD-NEXT: madd x10, x2, x10, x11551; CHECK-SD-NEXT: umulh x13, x4, x9552; CHECK-SD-NEXT: madd x3, x3, x8, x10553; CHECK-SD-NEXT: madd x11, x4, x12, x13554; CHECK-SD-NEXT: mul x0, x0, x6555; CHECK-SD-NEXT: madd x5, x5, x9, x11556; CHECK-SD-NEXT: mul x2, x2, x8557; CHECK-SD-NEXT: mul x4, x4, x9558; CHECK-SD-NEXT: ret559;560; CHECK-GI-LABEL: v3i128:561; CHECK-GI: // %bb.0: // %entry562; CHECK-GI-NEXT: ldp x10, x13, [sp]563; CHECK-GI-NEXT: mul x9, x0, x7564; CHECK-GI-NEXT: mul x8, x0, x6565; CHECK-GI-NEXT: mul x13, x2, x13566; CHECK-GI-NEXT: madd x12, x1, x6, x9567; CHECK-GI-NEXT: mul x9, x2, x10568; CHECK-GI-NEXT: umulh x14, x2, x10569; CHECK-GI-NEXT: madd x10, x3, x10, x13570; CHECK-GI-NEXT: ldp x15, x13, [sp, #16]571; CHECK-GI-NEXT: mov x2, x9572; CHECK-GI-NEXT: umulh x11, x0, x6573; CHECK-GI-NEXT: mov x0, x8574; CHECK-GI-NEXT: mul x13, x4, x13575; CHECK-GI-NEXT: add x3, x10, x14576; CHECK-GI-NEXT: umulh x16, x4, x15577; CHECK-GI-NEXT: add x1, x12, x11578; CHECK-GI-NEXT: madd x13, x5, x15, x13579; CHECK-GI-NEXT: mul x4, x4, x15580; CHECK-GI-NEXT: add x5, x13, x16581; CHECK-GI-NEXT: ret582entry:583 %s = mul <3 x i128> %d, %e584 ret <3 x i128> %s585}586 587define <4 x i128> @v4i128(<4 x i128> %d, <4 x i128> %e) {588; CHECK-SD-LABEL: v4i128:589; CHECK-SD: // %bb.0: // %entry590; CHECK-SD-NEXT: ldp x8, x9, [sp]591; CHECK-SD-NEXT: ldp x11, x12, [sp, #16]592; CHECK-SD-NEXT: umulh x10, x0, x8593; CHECK-SD-NEXT: umulh x13, x2, x11594; CHECK-SD-NEXT: madd x9, x0, x9, x10595; CHECK-SD-NEXT: madd x10, x2, x12, x13596; CHECK-SD-NEXT: ldp x13, x14, [sp, #48]597; CHECK-SD-NEXT: madd x1, x1, x8, x9598; CHECK-SD-NEXT: madd x3, x3, x11, x10599; CHECK-SD-NEXT: ldp x9, x10, [sp, #32]600; CHECK-SD-NEXT: umulh x15, x6, x13601; CHECK-SD-NEXT: umulh x12, x4, x9602; CHECK-SD-NEXT: mul x0, x0, x8603; CHECK-SD-NEXT: madd x10, x4, x10, x12604; CHECK-SD-NEXT: madd x12, x6, x14, x15605; CHECK-SD-NEXT: madd x5, x5, x9, x10606; CHECK-SD-NEXT: madd x7, x7, x13, x12607; CHECK-SD-NEXT: mul x2, x2, x11608; CHECK-SD-NEXT: mul x4, x4, x9609; CHECK-SD-NEXT: mul x6, x6, x13610; CHECK-SD-NEXT: ret611;612; CHECK-GI-LABEL: v4i128:613; CHECK-GI: // %bb.0: // %entry614; CHECK-GI-NEXT: ldp x9, x10, [sp]615; CHECK-GI-NEXT: ldp x15, x16, [sp, #32]616; CHECK-GI-NEXT: mul x10, x0, x10617; CHECK-GI-NEXT: mul x16, x4, x16618; CHECK-GI-NEXT: madd x12, x1, x9, x10619; CHECK-GI-NEXT: ldp x10, x13, [sp, #16]620; CHECK-GI-NEXT: mul x8, x0, x9621; CHECK-GI-NEXT: mul x13, x2, x13622; CHECK-GI-NEXT: umulh x11, x0, x9623; CHECK-GI-NEXT: mul x9, x2, x10624; CHECK-GI-NEXT: umulh x14, x2, x10625; CHECK-GI-NEXT: add x1, x12, x11626; CHECK-GI-NEXT: madd x13, x3, x10, x13627; CHECK-GI-NEXT: mov x2, x9628; CHECK-GI-NEXT: mul x10, x4, x15629; CHECK-GI-NEXT: umulh x17, x4, x15630; CHECK-GI-NEXT: add x3, x13, x14631; CHECK-GI-NEXT: madd x15, x5, x15, x16632; CHECK-GI-NEXT: ldp x18, x16, [sp, #48]633; CHECK-GI-NEXT: mov x4, x10634; CHECK-GI-NEXT: mul x16, x6, x16635; CHECK-GI-NEXT: umulh x0, x6, x18636; CHECK-GI-NEXT: add x5, x15, x17637; CHECK-GI-NEXT: madd x16, x7, x18, x16638; CHECK-GI-NEXT: mul x6, x6, x18639; CHECK-GI-NEXT: add x7, x16, x0640; CHECK-GI-NEXT: mov x0, x8641; CHECK-GI-NEXT: ret642entry:643 %s = mul <4 x i128> %d, %e644 ret <4 x i128> %s645}646