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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-none-elf < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-elf -global-isel < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5declare i64 @llvm.abs.i64(i64, i1 immarg)6 7define i64 @neg_abs64(i64 %x) {8; CHECK-SD-LABEL: neg_abs64:9; CHECK-SD: // %bb.0:10; CHECK-SD-NEXT: cmp x0, #011; CHECK-SD-NEXT: cneg x0, x0, pl12; CHECK-SD-NEXT: ret13;14; CHECK-GI-LABEL: neg_abs64:15; CHECK-GI: // %bb.0:16; CHECK-GI-NEXT: cmp x0, #017; CHECK-GI-NEXT: cneg x8, x0, le18; CHECK-GI-NEXT: neg x0, x819; CHECK-GI-NEXT: ret20 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)21 %neg = sub nsw i64 0, %abs22 ret i64 %neg23}24 25declare i32 @llvm.abs.i32(i32, i1 immarg)26 27define i32 @neg_abs32(i32 %x) {28; CHECK-SD-LABEL: neg_abs32:29; CHECK-SD: // %bb.0:30; CHECK-SD-NEXT: cmp w0, #031; CHECK-SD-NEXT: cneg w0, w0, pl32; CHECK-SD-NEXT: ret33;34; CHECK-GI-LABEL: neg_abs32:35; CHECK-GI: // %bb.0:36; CHECK-GI-NEXT: cmp w0, #037; CHECK-GI-NEXT: cneg w8, w0, le38; CHECK-GI-NEXT: neg w0, w839; CHECK-GI-NEXT: ret40 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)41 %neg = sub nsw i32 0, %abs42 ret i32 %neg43}44 45declare i16 @llvm.abs.i16(i16, i1 immarg)46 47define i16 @neg_abs16(i16 %x) {48; CHECK-SD-LABEL: neg_abs16:49; CHECK-SD: // %bb.0:50; CHECK-SD-NEXT: sbfx w8, w0, #15, #151; CHECK-SD-NEXT: eor w9, w0, w852; CHECK-SD-NEXT: sub w0, w8, w953; CHECK-SD-NEXT: ret54;55; CHECK-GI-LABEL: neg_abs16:56; CHECK-GI: // %bb.0:57; CHECK-GI-NEXT: sxth w8, w058; CHECK-GI-NEXT: cmp w8, #059; CHECK-GI-NEXT: cneg w8, w0, le60; CHECK-GI-NEXT: neg w0, w861; CHECK-GI-NEXT: ret62 %abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)63 %neg = sub nsw i16 0, %abs64 ret i16 %neg65}66 67 68declare i128 @llvm.abs.i128(i128, i1 immarg)69 70define i128 @neg_abs128(i128 %x) {71; CHECK-SD-LABEL: neg_abs128:72; CHECK-SD: // %bb.0:73; CHECK-SD-NEXT: asr x8, x1, #6374; CHECK-SD-NEXT: eor x9, x0, x875; CHECK-SD-NEXT: eor x10, x1, x876; CHECK-SD-NEXT: subs x0, x8, x977; CHECK-SD-NEXT: sbc x1, x8, x1078; CHECK-SD-NEXT: ret79;80; CHECK-GI-LABEL: neg_abs128:81; CHECK-GI: // %bb.0:82; CHECK-GI-NEXT: asr x8, x1, #6383; CHECK-GI-NEXT: adds x9, x0, x884; CHECK-GI-NEXT: adc x10, x1, x885; CHECK-GI-NEXT: eor x9, x9, x886; CHECK-GI-NEXT: eor x8, x10, x887; CHECK-GI-NEXT: negs x0, x988; CHECK-GI-NEXT: ngc x1, x889; CHECK-GI-NEXT: ret90 %abs = tail call i128 @llvm.abs.i128(i128 %x, i1 true)91 %neg = sub nsw i128 0, %abs92 ret i128 %neg93}94 95 96 97define i64 @abs64(i64 %x) {98; CHECK-SD-LABEL: abs64:99; CHECK-SD: // %bb.0:100; CHECK-SD-NEXT: cmp x0, #0101; CHECK-SD-NEXT: cneg x0, x0, mi102; CHECK-SD-NEXT: ret103;104; CHECK-GI-LABEL: abs64:105; CHECK-GI: // %bb.0:106; CHECK-GI-NEXT: cmp x0, #0107; CHECK-GI-NEXT: cneg x0, x0, le108; CHECK-GI-NEXT: ret109 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)110 ret i64 %abs111}112 113define i32 @abs32(i32 %x) {114; CHECK-SD-LABEL: abs32:115; CHECK-SD: // %bb.0:116; CHECK-SD-NEXT: cmp w0, #0117; CHECK-SD-NEXT: cneg w0, w0, mi118; CHECK-SD-NEXT: ret119;120; CHECK-GI-LABEL: abs32:121; CHECK-GI: // %bb.0:122; CHECK-GI-NEXT: cmp w0, #0123; CHECK-GI-NEXT: cneg w0, w0, le124; CHECK-GI-NEXT: ret125 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)126 ret i32 %abs127}128 129define i16 @abs16(i16 %x) {130; CHECK-SD-LABEL: abs16:131; CHECK-SD: // %bb.0:132; CHECK-SD-NEXT: sxth w8, w0133; CHECK-SD-NEXT: cmp w8, #0134; CHECK-SD-NEXT: cneg w0, w8, mi135; CHECK-SD-NEXT: ret136;137; CHECK-GI-LABEL: abs16:138; CHECK-GI: // %bb.0:139; CHECK-GI-NEXT: sxth w8, w0140; CHECK-GI-NEXT: cmp w8, #0141; CHECK-GI-NEXT: cneg w0, w0, le142; CHECK-GI-NEXT: ret143 %abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)144 ret i16 %abs145}146 147define i128 @abs128(i128 %x) {148; CHECK-SD-LABEL: abs128:149; CHECK-SD: // %bb.0:150; CHECK-SD-NEXT: asr x8, x1, #63151; CHECK-SD-NEXT: eor x9, x0, x8152; CHECK-SD-NEXT: eor x10, x1, x8153; CHECK-SD-NEXT: subs x0, x9, x8154; CHECK-SD-NEXT: sbc x1, x10, x8155; CHECK-SD-NEXT: ret156;157; CHECK-GI-LABEL: abs128:158; CHECK-GI: // %bb.0:159; CHECK-GI-NEXT: asr x8, x1, #63160; CHECK-GI-NEXT: adds x9, x0, x8161; CHECK-GI-NEXT: adc x10, x1, x8162; CHECK-GI-NEXT: eor x0, x9, x8163; CHECK-GI-NEXT: eor x1, x10, x8164; CHECK-GI-NEXT: ret165 %abs = tail call i128 @llvm.abs.i128(i128 %x, i1 true)166 ret i128 %abs167}168 169;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:170; CHECK: {{.*}}171