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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define <8 x i8> @cmeq8xi8(<8 x i8> %A, <8 x i8> %B) {6; CHECK-LABEL: cmeq8xi8:7; CHECK: // %bb.0:8; CHECK-NEXT: cmeq v0.8b, v0.8b, v1.8b9; CHECK-NEXT: ret10 %tmp3 = icmp eq <8 x i8> %A, %B11 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>12 ret <8 x i8> %tmp413}14 15define <16 x i8> @cmeq16xi8(<16 x i8> %A, <16 x i8> %B) {16; CHECK-LABEL: cmeq16xi8:17; CHECK: // %bb.0:18; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b19; CHECK-NEXT: ret20 %tmp3 = icmp eq <16 x i8> %A, %B21 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>22 ret <16 x i8> %tmp423}24 25define <4 x i16> @cmeq4xi16(<4 x i16> %A, <4 x i16> %B) {26; CHECK-LABEL: cmeq4xi16:27; CHECK: // %bb.0:28; CHECK-NEXT: cmeq v0.4h, v0.4h, v1.4h29; CHECK-NEXT: ret30 %tmp3 = icmp eq <4 x i16> %A, %B31 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>32 ret <4 x i16> %tmp433}34 35define <8 x i16> @cmeq8xi16(<8 x i16> %A, <8 x i16> %B) {36; CHECK-LABEL: cmeq8xi16:37; CHECK: // %bb.0:38; CHECK-NEXT: cmeq v0.8h, v0.8h, v1.8h39; CHECK-NEXT: ret40 %tmp3 = icmp eq <8 x i16> %A, %B41 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>42 ret <8 x i16> %tmp443}44 45define <2 x i32> @cmeq2xi32(<2 x i32> %A, <2 x i32> %B) {46; CHECK-LABEL: cmeq2xi32:47; CHECK: // %bb.0:48; CHECK-NEXT: cmeq v0.2s, v0.2s, v1.2s49; CHECK-NEXT: ret50 %tmp3 = icmp eq <2 x i32> %A, %B51 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>52 ret <2 x i32> %tmp453}54 55define <4 x i32> @cmeq4xi32(<4 x i32> %A, <4 x i32> %B) {56; CHECK-LABEL: cmeq4xi32:57; CHECK: // %bb.0:58; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s59; CHECK-NEXT: ret60 %tmp3 = icmp eq <4 x i32> %A, %B61 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>62 ret <4 x i32> %tmp463}64 65define <2 x i64> @cmeq2xi64(<2 x i64> %A, <2 x i64> %B) {66; CHECK-LABEL: cmeq2xi64:67; CHECK: // %bb.0:68; CHECK-NEXT: cmeq v0.2d, v0.2d, v1.2d69; CHECK-NEXT: ret70 %tmp3 = icmp eq <2 x i64> %A, %B71 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>72 ret <2 x i64> %tmp473}74 75define <8 x i8> @cmne8xi8(<8 x i8> %A, <8 x i8> %B) {76; CHECK-LABEL: cmne8xi8:77; CHECK: // %bb.0:78; CHECK-NEXT: cmeq v0.8b, v0.8b, v1.8b79; CHECK-NEXT: mvn v0.8b, v0.8b80; CHECK-NEXT: ret81 %tmp3 = icmp ne <8 x i8> %A, %B82 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>83 ret <8 x i8> %tmp484}85 86define <16 x i8> @cmne16xi8(<16 x i8> %A, <16 x i8> %B) {87; CHECK-LABEL: cmne16xi8:88; CHECK: // %bb.0:89; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b90; CHECK-NEXT: mvn v0.16b, v0.16b91; CHECK-NEXT: ret92 %tmp3 = icmp ne <16 x i8> %A, %B93 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>94 ret <16 x i8> %tmp495}96 97define <4 x i16> @cmne4xi16(<4 x i16> %A, <4 x i16> %B) {98; CHECK-LABEL: cmne4xi16:99; CHECK: // %bb.0:100; CHECK-NEXT: cmeq v0.4h, v0.4h, v1.4h101; CHECK-NEXT: mvn v0.8b, v0.8b102; CHECK-NEXT: ret103 %tmp3 = icmp ne <4 x i16> %A, %B104 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>105 ret <4 x i16> %tmp4106}107 108define <8 x i16> @cmne8xi16(<8 x i16> %A, <8 x i16> %B) {109; CHECK-LABEL: cmne8xi16:110; CHECK: // %bb.0:111; CHECK-NEXT: cmeq v0.8h, v0.8h, v1.8h112; CHECK-NEXT: mvn v0.16b, v0.16b113; CHECK-NEXT: ret114 %tmp3 = icmp ne <8 x i16> %A, %B115 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>116 ret <8 x i16> %tmp4117}118 119define <2 x i32> @cmne2xi32(<2 x i32> %A, <2 x i32> %B) {120; CHECK-LABEL: cmne2xi32:121; CHECK: // %bb.0:122; CHECK-NEXT: cmeq v0.2s, v0.2s, v1.2s123; CHECK-NEXT: mvn v0.8b, v0.8b124; CHECK-NEXT: ret125 %tmp3 = icmp ne <2 x i32> %A, %B126 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>127 ret <2 x i32> %tmp4128}129 130define <4 x i32> @cmne4xi32(<4 x i32> %A, <4 x i32> %B) {131; CHECK-LABEL: cmne4xi32:132; CHECK: // %bb.0:133; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s134; CHECK-NEXT: mvn v0.16b, v0.16b135; CHECK-NEXT: ret136 %tmp3 = icmp ne <4 x i32> %A, %B137 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>138 ret <4 x i32> %tmp4139}140 141define <2 x i64> @cmne2xi64(<2 x i64> %A, <2 x i64> %B) {142; CHECK-LABEL: cmne2xi64:143; CHECK: // %bb.0:144; CHECK-NEXT: cmeq v0.2d, v0.2d, v1.2d145; CHECK-NEXT: mvn v0.16b, v0.16b146; CHECK-NEXT: ret147 %tmp3 = icmp ne <2 x i64> %A, %B148 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>149 ret <2 x i64> %tmp4150}151 152define <8 x i8> @cmgt8xi8(<8 x i8> %A, <8 x i8> %B) {153; CHECK-LABEL: cmgt8xi8:154; CHECK: // %bb.0:155; CHECK-NEXT: cmgt v0.8b, v0.8b, v1.8b156; CHECK-NEXT: ret157 %tmp3 = icmp sgt <8 x i8> %A, %B158 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>159 ret <8 x i8> %tmp4160}161 162define <16 x i8> @cmgt16xi8(<16 x i8> %A, <16 x i8> %B) {163; CHECK-LABEL: cmgt16xi8:164; CHECK: // %bb.0:165; CHECK-NEXT: cmgt v0.16b, v0.16b, v1.16b166; CHECK-NEXT: ret167 %tmp3 = icmp sgt <16 x i8> %A, %B168 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>169 ret <16 x i8> %tmp4170}171 172define <4 x i16> @cmgt4xi16(<4 x i16> %A, <4 x i16> %B) {173; CHECK-LABEL: cmgt4xi16:174; CHECK: // %bb.0:175; CHECK-NEXT: cmgt v0.4h, v0.4h, v1.4h176; CHECK-NEXT: ret177 %tmp3 = icmp sgt <4 x i16> %A, %B178 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>179 ret <4 x i16> %tmp4180}181 182define <8 x i16> @cmgt8xi16(<8 x i16> %A, <8 x i16> %B) {183; CHECK-LABEL: cmgt8xi16:184; CHECK: // %bb.0:185; CHECK-NEXT: cmgt v0.8h, v0.8h, v1.8h186; CHECK-NEXT: ret187 %tmp3 = icmp sgt <8 x i16> %A, %B188 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>189 ret <8 x i16> %tmp4190}191 192define <2 x i32> @cmgt2xi32(<2 x i32> %A, <2 x i32> %B) {193; CHECK-LABEL: cmgt2xi32:194; CHECK: // %bb.0:195; CHECK-NEXT: cmgt v0.2s, v0.2s, v1.2s196; CHECK-NEXT: ret197 %tmp3 = icmp sgt <2 x i32> %A, %B198 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>199 ret <2 x i32> %tmp4200}201 202define <4 x i32> @cmgt4xi32(<4 x i32> %A, <4 x i32> %B) {203; CHECK-LABEL: cmgt4xi32:204; CHECK: // %bb.0:205; CHECK-NEXT: cmgt v0.4s, v0.4s, v1.4s206; CHECK-NEXT: ret207 %tmp3 = icmp sgt <4 x i32> %A, %B208 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>209 ret <4 x i32> %tmp4210}211 212define <2 x i64> @cmgt2xi64(<2 x i64> %A, <2 x i64> %B) {213; CHECK-LABEL: cmgt2xi64:214; CHECK: // %bb.0:215; CHECK-NEXT: cmgt v0.2d, v0.2d, v1.2d216; CHECK-NEXT: ret217 %tmp3 = icmp sgt <2 x i64> %A, %B218 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>219 ret <2 x i64> %tmp4220}221 222; LT implemented as GT, so check reversed operands.223define <8 x i8> @cmlt8xi8(<8 x i8> %A, <8 x i8> %B) {224; CHECK-LABEL: cmlt8xi8:225; CHECK: // %bb.0:226; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b227; CHECK-NEXT: ret228 %tmp3 = icmp slt <8 x i8> %A, %B229 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>230 ret <8 x i8> %tmp4231}232 233; LT implemented as GT, so check reversed operands.234define <16 x i8> @cmlt16xi8(<16 x i8> %A, <16 x i8> %B) {235; CHECK-LABEL: cmlt16xi8:236; CHECK: // %bb.0:237; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b238; CHECK-NEXT: ret239 %tmp3 = icmp slt <16 x i8> %A, %B240 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>241 ret <16 x i8> %tmp4242}243 244; LT implemented as GT, so check reversed operands.245define <4 x i16> @cmlt4xi16(<4 x i16> %A, <4 x i16> %B) {246; CHECK-LABEL: cmlt4xi16:247; CHECK: // %bb.0:248; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h249; CHECK-NEXT: ret250 %tmp3 = icmp slt <4 x i16> %A, %B251 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>252 ret <4 x i16> %tmp4253}254 255; LT implemented as GT, so check reversed operands.256define <8 x i16> @cmlt8xi16(<8 x i16> %A, <8 x i16> %B) {257; CHECK-LABEL: cmlt8xi16:258; CHECK: // %bb.0:259; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h260; CHECK-NEXT: ret261 %tmp3 = icmp slt <8 x i16> %A, %B262 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>263 ret <8 x i16> %tmp4264}265 266; LT implemented as GT, so check reversed operands.267define <2 x i32> @cmlt2xi32(<2 x i32> %A, <2 x i32> %B) {268; CHECK-LABEL: cmlt2xi32:269; CHECK: // %bb.0:270; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s271; CHECK-NEXT: ret272 %tmp3 = icmp slt <2 x i32> %A, %B273 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>274 ret <2 x i32> %tmp4275}276 277; LT implemented as GT, so check reversed operands.278define <4 x i32> @cmlt4xi32(<4 x i32> %A, <4 x i32> %B) {279; CHECK-LABEL: cmlt4xi32:280; CHECK: // %bb.0:281; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s282; CHECK-NEXT: ret283 %tmp3 = icmp slt <4 x i32> %A, %B284 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>285 ret <4 x i32> %tmp4286}287 288; LT implemented as GT, so check reversed operands.289define <2 x i64> @cmlt2xi64(<2 x i64> %A, <2 x i64> %B) {290; CHECK-LABEL: cmlt2xi64:291; CHECK: // %bb.0:292; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d293; CHECK-NEXT: ret294 %tmp3 = icmp slt <2 x i64> %A, %B295 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>296 ret <2 x i64> %tmp4297}298 299define <8 x i8> @cmge8xi8(<8 x i8> %A, <8 x i8> %B) {300; CHECK-LABEL: cmge8xi8:301; CHECK: // %bb.0:302; CHECK-NEXT: cmge v0.8b, v0.8b, v1.8b303; CHECK-NEXT: ret304 %tmp3 = icmp sge <8 x i8> %A, %B305 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>306 ret <8 x i8> %tmp4307}308 309define <16 x i8> @cmge16xi8(<16 x i8> %A, <16 x i8> %B) {310; CHECK-LABEL: cmge16xi8:311; CHECK: // %bb.0:312; CHECK-NEXT: cmge v0.16b, v0.16b, v1.16b313; CHECK-NEXT: ret314 %tmp3 = icmp sge <16 x i8> %A, %B315 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>316 ret <16 x i8> %tmp4317}318 319define <4 x i16> @cmge4xi16(<4 x i16> %A, <4 x i16> %B) {320; CHECK-LABEL: cmge4xi16:321; CHECK: // %bb.0:322; CHECK-NEXT: cmge v0.4h, v0.4h, v1.4h323; CHECK-NEXT: ret324 %tmp3 = icmp sge <4 x i16> %A, %B325 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>326 ret <4 x i16> %tmp4327}328 329define <8 x i16> @cmge8xi16(<8 x i16> %A, <8 x i16> %B) {330; CHECK-LABEL: cmge8xi16:331; CHECK: // %bb.0:332; CHECK-NEXT: cmge v0.8h, v0.8h, v1.8h333; CHECK-NEXT: ret334 %tmp3 = icmp sge <8 x i16> %A, %B335 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>336 ret <8 x i16> %tmp4337}338 339define <2 x i32> @cmge2xi32(<2 x i32> %A, <2 x i32> %B) {340; CHECK-LABEL: cmge2xi32:341; CHECK: // %bb.0:342; CHECK-NEXT: cmge v0.2s, v0.2s, v1.2s343; CHECK-NEXT: ret344 %tmp3 = icmp sge <2 x i32> %A, %B345 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>346 ret <2 x i32> %tmp4347}348 349define <4 x i32> @cmge4xi32(<4 x i32> %A, <4 x i32> %B) {350; CHECK-LABEL: cmge4xi32:351; CHECK: // %bb.0:352; CHECK-NEXT: cmge v0.4s, v0.4s, v1.4s353; CHECK-NEXT: ret354 %tmp3 = icmp sge <4 x i32> %A, %B355 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>356 ret <4 x i32> %tmp4357}358 359define <2 x i64> @cmge2xi64(<2 x i64> %A, <2 x i64> %B) {360; CHECK-LABEL: cmge2xi64:361; CHECK: // %bb.0:362; CHECK-NEXT: cmge v0.2d, v0.2d, v1.2d363; CHECK-NEXT: ret364 %tmp3 = icmp sge <2 x i64> %A, %B365 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>366 ret <2 x i64> %tmp4367}368 369; LE implemented as GE, so check reversed operands.370define <8 x i8> @cmle8xi8(<8 x i8> %A, <8 x i8> %B) {371; CHECK-LABEL: cmle8xi8:372; CHECK: // %bb.0:373; CHECK-NEXT: cmge v0.8b, v1.8b, v0.8b374; CHECK-NEXT: ret375 %tmp3 = icmp sle <8 x i8> %A, %B376 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>377 ret <8 x i8> %tmp4378}379 380; LE implemented as GE, so check reversed operands.381define <16 x i8> @cmle16xi8(<16 x i8> %A, <16 x i8> %B) {382; CHECK-LABEL: cmle16xi8:383; CHECK: // %bb.0:384; CHECK-NEXT: cmge v0.16b, v1.16b, v0.16b385; CHECK-NEXT: ret386 %tmp3 = icmp sle <16 x i8> %A, %B387 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>388 ret <16 x i8> %tmp4389}390 391; LE implemented as GE, so check reversed operands.392define <4 x i16> @cmle4xi16(<4 x i16> %A, <4 x i16> %B) {393; CHECK-LABEL: cmle4xi16:394; CHECK: // %bb.0:395; CHECK-NEXT: cmge v0.4h, v1.4h, v0.4h396; CHECK-NEXT: ret397 %tmp3 = icmp sle <4 x i16> %A, %B398 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>399 ret <4 x i16> %tmp4400}401 402; LE implemented as GE, so check reversed operands.403define <8 x i16> @cmle8xi16(<8 x i16> %A, <8 x i16> %B) {404; CHECK-LABEL: cmle8xi16:405; CHECK: // %bb.0:406; CHECK-NEXT: cmge v0.8h, v1.8h, v0.8h407; CHECK-NEXT: ret408 %tmp3 = icmp sle <8 x i16> %A, %B409 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>410 ret <8 x i16> %tmp4411}412 413; LE implemented as GE, so check reversed operands.414define <2 x i32> @cmle2xi32(<2 x i32> %A, <2 x i32> %B) {415; CHECK-LABEL: cmle2xi32:416; CHECK: // %bb.0:417; CHECK-NEXT: cmge v0.2s, v1.2s, v0.2s418; CHECK-NEXT: ret419 %tmp3 = icmp sle <2 x i32> %A, %B420 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>421 ret <2 x i32> %tmp4422}423 424; LE implemented as GE, so check reversed operands.425define <4 x i32> @cmle4xi32(<4 x i32> %A, <4 x i32> %B) {426; CHECK-LABEL: cmle4xi32:427; CHECK: // %bb.0:428; CHECK-NEXT: cmge v0.4s, v1.4s, v0.4s429; CHECK-NEXT: ret430 %tmp3 = icmp sle <4 x i32> %A, %B431 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>432 ret <4 x i32> %tmp4433}434 435; LE implemented as GE, so check reversed operands.436define <2 x i64> @cmle2xi64(<2 x i64> %A, <2 x i64> %B) {437; CHECK-LABEL: cmle2xi64:438; CHECK: // %bb.0:439; CHECK-NEXT: cmge v0.2d, v1.2d, v0.2d440; CHECK-NEXT: ret441 %tmp3 = icmp sle <2 x i64> %A, %B442 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>443 ret <2 x i64> %tmp4444}445 446define <8 x i8> @cmhi8xi8(<8 x i8> %A, <8 x i8> %B) {447; CHECK-LABEL: cmhi8xi8:448; CHECK: // %bb.0:449; CHECK-NEXT: cmhi v0.8b, v0.8b, v1.8b450; CHECK-NEXT: ret451 %tmp3 = icmp ugt <8 x i8> %A, %B452 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>453 ret <8 x i8> %tmp4454}455 456define <16 x i8> @cmhi16xi8(<16 x i8> %A, <16 x i8> %B) {457; CHECK-LABEL: cmhi16xi8:458; CHECK: // %bb.0:459; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b460; CHECK-NEXT: ret461 %tmp3 = icmp ugt <16 x i8> %A, %B462 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>463 ret <16 x i8> %tmp4464}465 466define <4 x i16> @cmhi4xi16(<4 x i16> %A, <4 x i16> %B) {467; CHECK-LABEL: cmhi4xi16:468; CHECK: // %bb.0:469; CHECK-NEXT: cmhi v0.4h, v0.4h, v1.4h470; CHECK-NEXT: ret471 %tmp3 = icmp ugt <4 x i16> %A, %B472 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>473 ret <4 x i16> %tmp4474}475 476define <8 x i16> @cmhi8xi16(<8 x i16> %A, <8 x i16> %B) {477; CHECK-LABEL: cmhi8xi16:478; CHECK: // %bb.0:479; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h480; CHECK-NEXT: ret481 %tmp3 = icmp ugt <8 x i16> %A, %B482 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>483 ret <8 x i16> %tmp4484}485 486define <2 x i32> @cmhi2xi32(<2 x i32> %A, <2 x i32> %B) {487; CHECK-LABEL: cmhi2xi32:488; CHECK: // %bb.0:489; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s490; CHECK-NEXT: ret491 %tmp3 = icmp ugt <2 x i32> %A, %B492 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>493 ret <2 x i32> %tmp4494}495 496define <4 x i32> @cmhi4xi32(<4 x i32> %A, <4 x i32> %B) {497; CHECK-LABEL: cmhi4xi32:498; CHECK: // %bb.0:499; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s500; CHECK-NEXT: ret501 %tmp3 = icmp ugt <4 x i32> %A, %B502 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>503 ret <4 x i32> %tmp4504}505 506define <2 x i64> @cmhi2xi64(<2 x i64> %A, <2 x i64> %B) {507; CHECK-LABEL: cmhi2xi64:508; CHECK: // %bb.0:509; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d510; CHECK-NEXT: ret511 %tmp3 = icmp ugt <2 x i64> %A, %B512 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>513 ret <2 x i64> %tmp4514}515 516; LO implemented as HI, so check reversed operands.517define <8 x i8> @cmlo8xi8(<8 x i8> %A, <8 x i8> %B) {518; CHECK-LABEL: cmlo8xi8:519; CHECK: // %bb.0:520; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b521; CHECK-NEXT: ret522 %tmp3 = icmp ult <8 x i8> %A, %B523 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>524 ret <8 x i8> %tmp4525}526 527; LO implemented as HI, so check reversed operands.528define <16 x i8> @cmlo16xi8(<16 x i8> %A, <16 x i8> %B) {529; CHECK-LABEL: cmlo16xi8:530; CHECK: // %bb.0:531; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b532; CHECK-NEXT: ret533 %tmp3 = icmp ult <16 x i8> %A, %B534 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>535 ret <16 x i8> %tmp4536}537 538; LO implemented as HI, so check reversed operands.539define <4 x i16> @cmlo4xi16(<4 x i16> %A, <4 x i16> %B) {540; CHECK-LABEL: cmlo4xi16:541; CHECK: // %bb.0:542; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h543; CHECK-NEXT: ret544 %tmp3 = icmp ult <4 x i16> %A, %B545 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>546 ret <4 x i16> %tmp4547}548 549; LO implemented as HI, so check reversed operands.550define <8 x i16> @cmlo8xi16(<8 x i16> %A, <8 x i16> %B) {551; CHECK-LABEL: cmlo8xi16:552; CHECK: // %bb.0:553; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h554; CHECK-NEXT: ret555 %tmp3 = icmp ult <8 x i16> %A, %B556 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>557 ret <8 x i16> %tmp4558}559 560; LO implemented as HI, so check reversed operands.561define <2 x i32> @cmlo2xi32(<2 x i32> %A, <2 x i32> %B) {562; CHECK-LABEL: cmlo2xi32:563; CHECK: // %bb.0:564; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s565; CHECK-NEXT: ret566 %tmp3 = icmp ult <2 x i32> %A, %B567 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>568 ret <2 x i32> %tmp4569}570 571; LO implemented as HI, so check reversed operands.572define <4 x i32> @cmlo4xi32(<4 x i32> %A, <4 x i32> %B) {573; CHECK-LABEL: cmlo4xi32:574; CHECK: // %bb.0:575; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s576; CHECK-NEXT: ret577 %tmp3 = icmp ult <4 x i32> %A, %B578 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>579 ret <4 x i32> %tmp4580}581 582; LO implemented as HI, so check reversed operands.583define <2 x i64> @cmlo2xi64(<2 x i64> %A, <2 x i64> %B) {584; CHECK-LABEL: cmlo2xi64:585; CHECK: // %bb.0:586; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d587; CHECK-NEXT: ret588 %tmp3 = icmp ult <2 x i64> %A, %B589 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>590 ret <2 x i64> %tmp4591}592 593define <8 x i8> @cmhs8xi8(<8 x i8> %A, <8 x i8> %B) {594; CHECK-LABEL: cmhs8xi8:595; CHECK: // %bb.0:596; CHECK-NEXT: cmhs v0.8b, v0.8b, v1.8b597; CHECK-NEXT: ret598 %tmp3 = icmp uge <8 x i8> %A, %B599 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>600 ret <8 x i8> %tmp4601}602 603define <16 x i8> @cmhs16xi8(<16 x i8> %A, <16 x i8> %B) {604; CHECK-LABEL: cmhs16xi8:605; CHECK: // %bb.0:606; CHECK-NEXT: cmhs v0.16b, v0.16b, v1.16b607; CHECK-NEXT: ret608 %tmp3 = icmp uge <16 x i8> %A, %B609 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>610 ret <16 x i8> %tmp4611}612 613define <4 x i16> @cmhs4xi16(<4 x i16> %A, <4 x i16> %B) {614; CHECK-LABEL: cmhs4xi16:615; CHECK: // %bb.0:616; CHECK-NEXT: cmhs v0.4h, v0.4h, v1.4h617; CHECK-NEXT: ret618 %tmp3 = icmp uge <4 x i16> %A, %B619 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>620 ret <4 x i16> %tmp4621}622 623define <8 x i16> @cmhs8xi16(<8 x i16> %A, <8 x i16> %B) {624; CHECK-LABEL: cmhs8xi16:625; CHECK: // %bb.0:626; CHECK-NEXT: cmhs v0.8h, v0.8h, v1.8h627; CHECK-NEXT: ret628 %tmp3 = icmp uge <8 x i16> %A, %B629 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>630 ret <8 x i16> %tmp4631}632 633define <2 x i32> @cmhs2xi32(<2 x i32> %A, <2 x i32> %B) {634; CHECK-LABEL: cmhs2xi32:635; CHECK: // %bb.0:636; CHECK-NEXT: cmhs v0.2s, v0.2s, v1.2s637; CHECK-NEXT: ret638 %tmp3 = icmp uge <2 x i32> %A, %B639 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>640 ret <2 x i32> %tmp4641}642 643define <4 x i32> @cmhs4xi32(<4 x i32> %A, <4 x i32> %B) {644; CHECK-LABEL: cmhs4xi32:645; CHECK: // %bb.0:646; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s647; CHECK-NEXT: ret648 %tmp3 = icmp uge <4 x i32> %A, %B649 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>650 ret <4 x i32> %tmp4651}652 653define <2 x i64> @cmhs2xi64(<2 x i64> %A, <2 x i64> %B) {654; CHECK-LABEL: cmhs2xi64:655; CHECK: // %bb.0:656; CHECK-NEXT: cmhs v0.2d, v0.2d, v1.2d657; CHECK-NEXT: ret658 %tmp3 = icmp uge <2 x i64> %A, %B659 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>660 ret <2 x i64> %tmp4661}662 663; LS implemented as HS, so check reversed operands.664define <8 x i8> @cmls8xi8(<8 x i8> %A, <8 x i8> %B) {665; CHECK-LABEL: cmls8xi8:666; CHECK: // %bb.0:667; CHECK-NEXT: cmhs v0.8b, v1.8b, v0.8b668; CHECK-NEXT: ret669 %tmp3 = icmp ule <8 x i8> %A, %B670 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>671 ret <8 x i8> %tmp4672}673 674; LS implemented as HS, so check reversed operands.675define <16 x i8> @cmls16xi8(<16 x i8> %A, <16 x i8> %B) {676; CHECK-LABEL: cmls16xi8:677; CHECK: // %bb.0:678; CHECK-NEXT: cmhs v0.16b, v1.16b, v0.16b679; CHECK-NEXT: ret680 %tmp3 = icmp ule <16 x i8> %A, %B681 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>682 ret <16 x i8> %tmp4683}684 685; LS implemented as HS, so check reversed operands.686define <4 x i16> @cmls4xi16(<4 x i16> %A, <4 x i16> %B) {687; CHECK-LABEL: cmls4xi16:688; CHECK: // %bb.0:689; CHECK-NEXT: cmhs v0.4h, v1.4h, v0.4h690; CHECK-NEXT: ret691 %tmp3 = icmp ule <4 x i16> %A, %B692 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>693 ret <4 x i16> %tmp4694}695 696; LS implemented as HS, so check reversed operands.697define <8 x i16> @cmls8xi16(<8 x i16> %A, <8 x i16> %B) {698; CHECK-LABEL: cmls8xi16:699; CHECK: // %bb.0:700; CHECK-NEXT: cmhs v0.8h, v1.8h, v0.8h701; CHECK-NEXT: ret702 %tmp3 = icmp ule <8 x i16> %A, %B703 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>704 ret <8 x i16> %tmp4705}706 707; LS implemented as HS, so check reversed operands.708define <2 x i32> @cmls2xi32(<2 x i32> %A, <2 x i32> %B) {709; CHECK-LABEL: cmls2xi32:710; CHECK: // %bb.0:711; CHECK-NEXT: cmhs v0.2s, v1.2s, v0.2s712; CHECK-NEXT: ret713 %tmp3 = icmp ule <2 x i32> %A, %B714 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>715 ret <2 x i32> %tmp4716}717 718; LS implemented as HS, so check reversed operands.719define <4 x i32> @cmls4xi32(<4 x i32> %A, <4 x i32> %B) {720; CHECK-LABEL: cmls4xi32:721; CHECK: // %bb.0:722; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s723; CHECK-NEXT: ret724 %tmp3 = icmp ule <4 x i32> %A, %B725 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>726 ret <4 x i32> %tmp4727}728 729; LS implemented as HS, so check reversed operands.730define <2 x i64> @cmls2xi64(<2 x i64> %A, <2 x i64> %B) {731; CHECK-LABEL: cmls2xi64:732; CHECK: // %bb.0:733; CHECK-NEXT: cmhs v0.2d, v1.2d, v0.2d734; CHECK-NEXT: ret735 %tmp3 = icmp ule <2 x i64> %A, %B736 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>737 ret <2 x i64> %tmp4738}739 740define <8 x i8> @cmtst8xi8(<8 x i8> %A, <8 x i8> %B) {741; CHECK-LABEL: cmtst8xi8:742; CHECK: // %bb.0:743; CHECK-NEXT: cmtst v0.8b, v0.8b, v1.8b744; CHECK-NEXT: ret745 %tmp3 = and <8 x i8> %A, %B746 %tmp4 = icmp ne <8 x i8> %tmp3, zeroinitializer747 %tmp5 = sext <8 x i1> %tmp4 to <8 x i8>748 ret <8 x i8> %tmp5749}750 751define <16 x i8> @cmtst16xi8(<16 x i8> %A, <16 x i8> %B) {752; CHECK-LABEL: cmtst16xi8:753; CHECK: // %bb.0:754; CHECK-NEXT: cmtst v0.16b, v0.16b, v1.16b755; CHECK-NEXT: ret756 %tmp3 = and <16 x i8> %A, %B757 %tmp4 = icmp ne <16 x i8> %tmp3, zeroinitializer758 %tmp5 = sext <16 x i1> %tmp4 to <16 x i8>759 ret <16 x i8> %tmp5760}761 762define <4 x i16> @cmtst4xi16(<4 x i16> %A, <4 x i16> %B) {763; CHECK-LABEL: cmtst4xi16:764; CHECK: // %bb.0:765; CHECK-NEXT: cmtst v0.4h, v0.4h, v1.4h766; CHECK-NEXT: ret767 %tmp3 = and <4 x i16> %A, %B768 %tmp4 = icmp ne <4 x i16> %tmp3, zeroinitializer769 %tmp5 = sext <4 x i1> %tmp4 to <4 x i16>770 ret <4 x i16> %tmp5771}772 773define <8 x i16> @cmtst8xi16(<8 x i16> %A, <8 x i16> %B) {774; CHECK-LABEL: cmtst8xi16:775; CHECK: // %bb.0:776; CHECK-NEXT: cmtst v0.8h, v0.8h, v1.8h777; CHECK-NEXT: ret778 %tmp3 = and <8 x i16> %A, %B779 %tmp4 = icmp ne <8 x i16> %tmp3, zeroinitializer780 %tmp5 = sext <8 x i1> %tmp4 to <8 x i16>781 ret <8 x i16> %tmp5782}783 784define <2 x i32> @cmtst2xi32(<2 x i32> %A, <2 x i32> %B) {785; CHECK-LABEL: cmtst2xi32:786; CHECK: // %bb.0:787; CHECK-NEXT: cmtst v0.2s, v0.2s, v1.2s788; CHECK-NEXT: ret789 %tmp3 = and <2 x i32> %A, %B790 %tmp4 = icmp ne <2 x i32> %tmp3, zeroinitializer791 %tmp5 = sext <2 x i1> %tmp4 to <2 x i32>792 ret <2 x i32> %tmp5793}794 795define <4 x i32> @cmtst4xi32(<4 x i32> %A, <4 x i32> %B) {796; CHECK-LABEL: cmtst4xi32:797; CHECK: // %bb.0:798; CHECK-NEXT: cmtst v0.4s, v0.4s, v1.4s799; CHECK-NEXT: ret800 %tmp3 = and <4 x i32> %A, %B801 %tmp4 = icmp ne <4 x i32> %tmp3, zeroinitializer802 %tmp5 = sext <4 x i1> %tmp4 to <4 x i32>803 ret <4 x i32> %tmp5804}805 806define <2 x i64> @cmtst2xi64(<2 x i64> %A, <2 x i64> %B) {807; CHECK-LABEL: cmtst2xi64:808; CHECK: // %bb.0:809; CHECK-NEXT: cmtst v0.2d, v0.2d, v1.2d810; CHECK-NEXT: ret811 %tmp3 = and <2 x i64> %A, %B812 %tmp4 = icmp ne <2 x i64> %tmp3, zeroinitializer813 %tmp5 = sext <2 x i1> %tmp4 to <2 x i64>814 ret <2 x i64> %tmp5815}816 817 818 819define <8 x i8> @cmeqz8xi8(<8 x i8> %A) {820; CHECK-LABEL: cmeqz8xi8:821; CHECK: // %bb.0:822; CHECK-NEXT: cmeq v0.8b, v0.8b, #0823; CHECK-NEXT: ret824 %tmp3 = icmp eq <8 x i8> %A, zeroinitializer825 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>826 ret <8 x i8> %tmp4827}828 829define <16 x i8> @cmeqz16xi8(<16 x i8> %A) {830; CHECK-LABEL: cmeqz16xi8:831; CHECK: // %bb.0:832; CHECK-NEXT: cmeq v0.16b, v0.16b, #0833; CHECK-NEXT: ret834 %tmp3 = icmp eq <16 x i8> %A, zeroinitializer835 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>836 ret <16 x i8> %tmp4837}838 839define <4 x i16> @cmeqz4xi16(<4 x i16> %A) {840; CHECK-LABEL: cmeqz4xi16:841; CHECK: // %bb.0:842; CHECK-NEXT: cmeq v0.4h, v0.4h, #0843; CHECK-NEXT: ret844 %tmp3 = icmp eq <4 x i16> %A, zeroinitializer845 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>846 ret <4 x i16> %tmp4847}848 849define <8 x i16> @cmeqz8xi16(<8 x i16> %A) {850; CHECK-LABEL: cmeqz8xi16:851; CHECK: // %bb.0:852; CHECK-NEXT: cmeq v0.8h, v0.8h, #0853; CHECK-NEXT: ret854 %tmp3 = icmp eq <8 x i16> %A, zeroinitializer855 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>856 ret <8 x i16> %tmp4857}858 859define <2 x i32> @cmeqz2xi32(<2 x i32> %A) {860; CHECK-LABEL: cmeqz2xi32:861; CHECK: // %bb.0:862; CHECK-NEXT: cmeq v0.2s, v0.2s, #0863; CHECK-NEXT: ret864 %tmp3 = icmp eq <2 x i32> %A, zeroinitializer865 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>866 ret <2 x i32> %tmp4867}868 869define <4 x i32> @cmeqz4xi32(<4 x i32> %A) {870; CHECK-LABEL: cmeqz4xi32:871; CHECK: // %bb.0:872; CHECK-NEXT: cmeq v0.4s, v0.4s, #0873; CHECK-NEXT: ret874 %tmp3 = icmp eq <4 x i32> %A, zeroinitializer875 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>876 ret <4 x i32> %tmp4877}878 879define <2 x i64> @cmeqz2xi64(<2 x i64> %A) {880; CHECK-LABEL: cmeqz2xi64:881; CHECK: // %bb.0:882; CHECK-NEXT: cmeq v0.2d, v0.2d, #0883; CHECK-NEXT: ret884 %tmp3 = icmp eq <2 x i64> %A, zeroinitializer885 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>886 ret <2 x i64> %tmp4887}888 889 890define <8 x i8> @cmgez8xi8(<8 x i8> %A) {891; CHECK-LABEL: cmgez8xi8:892; CHECK: // %bb.0:893; CHECK-NEXT: cmge v0.8b, v0.8b, #0894; CHECK-NEXT: ret895 %tmp3 = icmp sge <8 x i8> %A, zeroinitializer896 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>897 ret <8 x i8> %tmp4898}899 900define <16 x i8> @cmgez16xi8(<16 x i8> %A) {901; CHECK-LABEL: cmgez16xi8:902; CHECK: // %bb.0:903; CHECK-NEXT: cmge v0.16b, v0.16b, #0904; CHECK-NEXT: ret905 %tmp3 = icmp sge <16 x i8> %A, zeroinitializer906 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>907 ret <16 x i8> %tmp4908}909 910define <4 x i16> @cmgez4xi16(<4 x i16> %A) {911; CHECK-LABEL: cmgez4xi16:912; CHECK: // %bb.0:913; CHECK-NEXT: cmge v0.4h, v0.4h, #0914; CHECK-NEXT: ret915 %tmp3 = icmp sge <4 x i16> %A, zeroinitializer916 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>917 ret <4 x i16> %tmp4918}919 920define <8 x i16> @cmgez8xi16(<8 x i16> %A) {921; CHECK-LABEL: cmgez8xi16:922; CHECK: // %bb.0:923; CHECK-NEXT: cmge v0.8h, v0.8h, #0924; CHECK-NEXT: ret925 %tmp3 = icmp sge <8 x i16> %A, zeroinitializer926 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>927 ret <8 x i16> %tmp4928}929 930define <2 x i32> @cmgez2xi32(<2 x i32> %A) {931; CHECK-LABEL: cmgez2xi32:932; CHECK: // %bb.0:933; CHECK-NEXT: cmge v0.2s, v0.2s, #0934; CHECK-NEXT: ret935 %tmp3 = icmp sge <2 x i32> %A, zeroinitializer936 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>937 ret <2 x i32> %tmp4938}939 940define <4 x i32> @cmgez4xi32(<4 x i32> %A) {941; CHECK-LABEL: cmgez4xi32:942; CHECK: // %bb.0:943; CHECK-NEXT: cmge v0.4s, v0.4s, #0944; CHECK-NEXT: ret945 %tmp3 = icmp sge <4 x i32> %A, zeroinitializer946 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>947 ret <4 x i32> %tmp4948}949 950define <2 x i64> @cmgez2xi64(<2 x i64> %A) {951; CHECK-LABEL: cmgez2xi64:952; CHECK: // %bb.0:953; CHECK-NEXT: cmge v0.2d, v0.2d, #0954; CHECK-NEXT: ret955 %tmp3 = icmp sge <2 x i64> %A, zeroinitializer956 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>957 ret <2 x i64> %tmp4958}959 960 961define <8 x i8> @cmgez8xi8_alt(<8 x i8> %A) {962; CHECK-SD-LABEL: cmgez8xi8_alt:963; CHECK-SD: // %bb.0:964; CHECK-SD-NEXT: cmge v0.8b, v0.8b, #0965; CHECK-SD-NEXT: ret966;967; CHECK-GI-LABEL: cmgez8xi8_alt:968; CHECK-GI: // %bb.0:969; CHECK-GI-NEXT: cmlt v0.8b, v0.8b, #0970; CHECK-GI-NEXT: mvn v0.8b, v0.8b971; CHECK-GI-NEXT: ret972 %sign = ashr <8 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>973 %not = xor <8 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>974 ret <8 x i8> %not975}976 977define <16 x i8> @cmgez16xi8_alt(<16 x i8> %A) {978; CHECK-SD-LABEL: cmgez16xi8_alt:979; CHECK-SD: // %bb.0:980; CHECK-SD-NEXT: cmge v0.16b, v0.16b, #0981; CHECK-SD-NEXT: ret982;983; CHECK-GI-LABEL: cmgez16xi8_alt:984; CHECK-GI: // %bb.0:985; CHECK-GI-NEXT: cmlt v0.16b, v0.16b, #0986; CHECK-GI-NEXT: mvn v0.16b, v0.16b987; CHECK-GI-NEXT: ret988 %sign = ashr <16 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>989 %not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>990 ret <16 x i8> %not991}992 993define <4 x i16> @cmgez4xi16_alt(<4 x i16> %A) {994; CHECK-SD-LABEL: cmgez4xi16_alt:995; CHECK-SD: // %bb.0:996; CHECK-SD-NEXT: cmge v0.4h, v0.4h, #0997; CHECK-SD-NEXT: ret998;999; CHECK-GI-LABEL: cmgez4xi16_alt:1000; CHECK-GI: // %bb.0:1001; CHECK-GI-NEXT: cmlt v0.4h, v0.4h, #01002; CHECK-GI-NEXT: mvn v0.8b, v0.8b1003; CHECK-GI-NEXT: ret1004 %sign = ashr <4 x i16> %A, <i16 15, i16 15, i16 15, i16 15>1005 %not = xor <4 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1>1006 ret <4 x i16> %not1007}1008 1009define <8 x i16> @cmgez8xi16_alt(<8 x i16> %A) {1010; CHECK-SD-LABEL: cmgez8xi16_alt:1011; CHECK-SD: // %bb.0:1012; CHECK-SD-NEXT: cmge v0.8h, v0.8h, #01013; CHECK-SD-NEXT: ret1014;1015; CHECK-GI-LABEL: cmgez8xi16_alt:1016; CHECK-GI: // %bb.0:1017; CHECK-GI-NEXT: cmlt v0.8h, v0.8h, #01018; CHECK-GI-NEXT: mvn v0.16b, v0.16b1019; CHECK-GI-NEXT: ret1020 %sign = ashr <8 x i16> %A, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>1021 %not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1022 ret <8 x i16> %not1023}1024 1025define <2 x i32> @cmgez2xi32_alt(<2 x i32> %A) {1026; CHECK-SD-LABEL: cmgez2xi32_alt:1027; CHECK-SD: // %bb.0:1028; CHECK-SD-NEXT: cmge v0.2s, v0.2s, #01029; CHECK-SD-NEXT: ret1030;1031; CHECK-GI-LABEL: cmgez2xi32_alt:1032; CHECK-GI: // %bb.0:1033; CHECK-GI-NEXT: cmlt v0.2s, v0.2s, #01034; CHECK-GI-NEXT: mvn v0.8b, v0.8b1035; CHECK-GI-NEXT: ret1036 %sign = ashr <2 x i32> %A, <i32 31, i32 31>1037 %not = xor <2 x i32> %sign, <i32 -1, i32 -1>1038 ret <2 x i32> %not1039}1040 1041define <4 x i32> @cmgez4xi32_alt(<4 x i32> %A) {1042; CHECK-SD-LABEL: cmgez4xi32_alt:1043; CHECK-SD: // %bb.0:1044; CHECK-SD-NEXT: cmge v0.4s, v0.4s, #01045; CHECK-SD-NEXT: ret1046;1047; CHECK-GI-LABEL: cmgez4xi32_alt:1048; CHECK-GI: // %bb.0:1049; CHECK-GI-NEXT: cmlt v0.4s, v0.4s, #01050; CHECK-GI-NEXT: mvn v0.16b, v0.16b1051; CHECK-GI-NEXT: ret1052 %sign = ashr <4 x i32> %A, <i32 31, i32 31, i32 31, i32 31>1053 %not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1>1054 ret <4 x i32> %not1055}1056 1057define <2 x i64> @cmgez2xi64_alt(<2 x i64> %A) {1058; CHECK-SD-LABEL: cmgez2xi64_alt:1059; CHECK-SD: // %bb.0:1060; CHECK-SD-NEXT: cmge v0.2d, v0.2d, #01061; CHECK-SD-NEXT: ret1062;1063; CHECK-GI-LABEL: cmgez2xi64_alt:1064; CHECK-GI: // %bb.0:1065; CHECK-GI-NEXT: cmlt v0.2d, v0.2d, #01066; CHECK-GI-NEXT: mvn v0.16b, v0.16b1067; CHECK-GI-NEXT: ret1068 %sign = ashr <2 x i64> %A, <i64 63, i64 63>1069 %not = xor <2 x i64> %sign, <i64 -1, i64 -1>1070 ret <2 x i64> %not1071}1072 1073define <8 x i8> @cmgez8xi8_alt2(<8 x i8> %A) {1074; CHECK-LABEL: cmgez8xi8_alt2:1075; CHECK: // %bb.0:1076; CHECK-NEXT: cmge v0.8b, v0.8b, #01077; CHECK-NEXT: ret1078 %tmp3 = icmp sgt <8 x i8> %A, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1079 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1080 ret <8 x i8> %tmp41081}1082 1083define <16 x i8> @cmgez16xi8_alt2(<16 x i8> %A) {1084; CHECK-LABEL: cmgez16xi8_alt2:1085; CHECK: // %bb.0:1086; CHECK-NEXT: cmge v0.16b, v0.16b, #01087; CHECK-NEXT: ret1088 %tmp3 = icmp sgt <16 x i8> %A, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>1089 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1090 ret <16 x i8> %tmp41091}1092 1093define <4 x i16> @cmgez4xi16_alt2(<4 x i16> %A) {1094; CHECK-LABEL: cmgez4xi16_alt2:1095; CHECK: // %bb.0:1096; CHECK-NEXT: cmge v0.4h, v0.4h, #01097; CHECK-NEXT: ret1098 %tmp3 = icmp sgt <4 x i16> %A, <i16 -1, i16 -1, i16 -1, i16 -1>1099 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1100 ret <4 x i16> %tmp41101}1102 1103define <8 x i16> @cmgez8xi16_alt2(<8 x i16> %A) {1104; CHECK-LABEL: cmgez8xi16_alt2:1105; CHECK: // %bb.0:1106; CHECK-NEXT: cmge v0.8h, v0.8h, #01107; CHECK-NEXT: ret1108 %tmp3 = icmp sgt <8 x i16> %A, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>1109 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1110 ret <8 x i16> %tmp41111}1112 1113define <2 x i32> @cmgez2xi32_alt2(<2 x i32> %A) {1114; CHECK-LABEL: cmgez2xi32_alt2:1115; CHECK: // %bb.0:1116; CHECK-NEXT: cmge v0.2s, v0.2s, #01117; CHECK-NEXT: ret1118 %tmp3 = icmp sgt <2 x i32> %A, <i32 -1, i32 -1>1119 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1120 ret <2 x i32> %tmp41121}1122 1123define <4 x i32> @cmgez4xi32_alt2(<4 x i32> %A) {1124; CHECK-LABEL: cmgez4xi32_alt2:1125; CHECK: // %bb.0:1126; CHECK-NEXT: cmge v0.4s, v0.4s, #01127; CHECK-NEXT: ret1128 %tmp3 = icmp sgt <4 x i32> %A, <i32 -1, i32 -1, i32 -1, i32 -1>1129 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1130 ret <4 x i32> %tmp41131}1132 1133define <2 x i64> @cmgez2xi64_alt2(<2 x i64> %A) {1134; CHECK-LABEL: cmgez2xi64_alt2:1135; CHECK: // %bb.0:1136; CHECK-NEXT: cmge v0.2d, v0.2d, #01137; CHECK-NEXT: ret1138 %tmp3 = icmp sgt <2 x i64> %A, <i64 -1, i64 -1>1139 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1140 ret <2 x i64> %tmp41141}1142 1143 1144define <8 x i8> @cmgtz8xi8(<8 x i8> %A) {1145; CHECK-LABEL: cmgtz8xi8:1146; CHECK: // %bb.0:1147; CHECK-NEXT: cmgt v0.8b, v0.8b, #01148; CHECK-NEXT: ret1149 %tmp3 = icmp sgt <8 x i8> %A, zeroinitializer1150 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1151 ret <8 x i8> %tmp41152}1153 1154define <16 x i8> @cmgtz16xi8(<16 x i8> %A) {1155; CHECK-LABEL: cmgtz16xi8:1156; CHECK: // %bb.0:1157; CHECK-NEXT: cmgt v0.16b, v0.16b, #01158; CHECK-NEXT: ret1159 %tmp3 = icmp sgt <16 x i8> %A, zeroinitializer1160 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1161 ret <16 x i8> %tmp41162}1163 1164define <4 x i16> @cmgtz4xi16(<4 x i16> %A) {1165; CHECK-LABEL: cmgtz4xi16:1166; CHECK: // %bb.0:1167; CHECK-NEXT: cmgt v0.4h, v0.4h, #01168; CHECK-NEXT: ret1169 %tmp3 = icmp sgt <4 x i16> %A, zeroinitializer1170 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1171 ret <4 x i16> %tmp41172}1173 1174define <8 x i16> @cmgtz8xi16(<8 x i16> %A) {1175; CHECK-LABEL: cmgtz8xi16:1176; CHECK: // %bb.0:1177; CHECK-NEXT: cmgt v0.8h, v0.8h, #01178; CHECK-NEXT: ret1179 %tmp3 = icmp sgt <8 x i16> %A, zeroinitializer1180 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1181 ret <8 x i16> %tmp41182}1183 1184define <2 x i32> @cmgtz2xi32(<2 x i32> %A) {1185; CHECK-LABEL: cmgtz2xi32:1186; CHECK: // %bb.0:1187; CHECK-NEXT: cmgt v0.2s, v0.2s, #01188; CHECK-NEXT: ret1189 %tmp3 = icmp sgt <2 x i32> %A, zeroinitializer1190 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1191 ret <2 x i32> %tmp41192}1193 1194define <4 x i32> @cmgtz4xi32(<4 x i32> %A) {1195; CHECK-LABEL: cmgtz4xi32:1196; CHECK: // %bb.0:1197; CHECK-NEXT: cmgt v0.4s, v0.4s, #01198; CHECK-NEXT: ret1199 %tmp3 = icmp sgt <4 x i32> %A, zeroinitializer1200 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1201 ret <4 x i32> %tmp41202}1203 1204define <2 x i64> @cmgtz2xi64(<2 x i64> %A) {1205; CHECK-LABEL: cmgtz2xi64:1206; CHECK: // %bb.0:1207; CHECK-NEXT: cmgt v0.2d, v0.2d, #01208; CHECK-NEXT: ret1209 %tmp3 = icmp sgt <2 x i64> %A, zeroinitializer1210 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1211 ret <2 x i64> %tmp41212}1213 1214define <8 x i8> @cmlez8xi8(<8 x i8> %A) {1215; CHECK-LABEL: cmlez8xi8:1216; CHECK: // %bb.0:1217; CHECK-NEXT: cmle v0.8b, v0.8b, #01218; CHECK-NEXT: ret1219 %tmp3 = icmp sle <8 x i8> %A, zeroinitializer1220 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1221 ret <8 x i8> %tmp41222}1223 1224define <16 x i8> @cmlez16xi8(<16 x i8> %A) {1225; CHECK-LABEL: cmlez16xi8:1226; CHECK: // %bb.0:1227; CHECK-NEXT: cmle v0.16b, v0.16b, #01228; CHECK-NEXT: ret1229 %tmp3 = icmp sle <16 x i8> %A, zeroinitializer1230 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1231 ret <16 x i8> %tmp41232}1233 1234define <4 x i16> @cmlez4xi16(<4 x i16> %A) {1235; CHECK-LABEL: cmlez4xi16:1236; CHECK: // %bb.0:1237; CHECK-NEXT: cmle v0.4h, v0.4h, #01238; CHECK-NEXT: ret1239 %tmp3 = icmp sle <4 x i16> %A, zeroinitializer1240 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1241 ret <4 x i16> %tmp41242}1243 1244define <8 x i16> @cmlez8xi16(<8 x i16> %A) {1245; CHECK-LABEL: cmlez8xi16:1246; CHECK: // %bb.0:1247; CHECK-NEXT: cmle v0.8h, v0.8h, #01248; CHECK-NEXT: ret1249 %tmp3 = icmp sle <8 x i16> %A, zeroinitializer1250 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1251 ret <8 x i16> %tmp41252}1253 1254define <2 x i32> @cmlez2xi32(<2 x i32> %A) {1255; CHECK-LABEL: cmlez2xi32:1256; CHECK: // %bb.0:1257; CHECK-NEXT: cmle v0.2s, v0.2s, #01258; CHECK-NEXT: ret1259 %tmp3 = icmp sle <2 x i32> %A, zeroinitializer1260 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1261 ret <2 x i32> %tmp41262}1263 1264define <4 x i32> @cmlez4xi32(<4 x i32> %A) {1265; CHECK-LABEL: cmlez4xi32:1266; CHECK: // %bb.0:1267; CHECK-NEXT: cmle v0.4s, v0.4s, #01268; CHECK-NEXT: ret1269 %tmp3 = icmp sle <4 x i32> %A, zeroinitializer1270 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1271 ret <4 x i32> %tmp41272}1273 1274define <2 x i64> @cmlez2xi64(<2 x i64> %A) {1275; CHECK-LABEL: cmlez2xi64:1276; CHECK: // %bb.0:1277; CHECK-NEXT: cmle v0.2d, v0.2d, #01278; CHECK-NEXT: ret1279 %tmp3 = icmp sle <2 x i64> %A, zeroinitializer1280 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1281 ret <2 x i64> %tmp41282}1283 1284define <8 x i8> @cmlez8xi8_alt(<8 x i8> %A) {1285; CHECK-SD-LABEL: cmlez8xi8_alt:1286; CHECK-SD: // %bb.0:1287; CHECK-SD-NEXT: cmle v0.8b, v0.8b, #01288; CHECK-SD-NEXT: ret1289;1290; CHECK-GI-LABEL: cmlez8xi8_alt:1291; CHECK-GI: // %bb.0:1292; CHECK-GI-NEXT: movi v1.8b, #11293; CHECK-GI-NEXT: cmgt v0.8b, v1.8b, v0.8b1294; CHECK-GI-NEXT: ret1295 %tmp3 = icmp slt <8 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>1296 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1297 ret <8 x i8> %tmp41298}1299 1300define <16 x i8> @cmlez16xi8_alt(<16 x i8> %A) {1301; CHECK-SD-LABEL: cmlez16xi8_alt:1302; CHECK-SD: // %bb.0:1303; CHECK-SD-NEXT: cmle v0.16b, v0.16b, #01304; CHECK-SD-NEXT: ret1305;1306; CHECK-GI-LABEL: cmlez16xi8_alt:1307; CHECK-GI: // %bb.0:1308; CHECK-GI-NEXT: movi v1.16b, #11309; CHECK-GI-NEXT: cmgt v0.16b, v1.16b, v0.16b1310; CHECK-GI-NEXT: ret1311 %tmp3 = icmp slt <16 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>1312 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1313 ret <16 x i8> %tmp41314}1315 1316define <4 x i16> @cmlez4xi16_alt(<4 x i16> %A) {1317; CHECK-SD-LABEL: cmlez4xi16_alt:1318; CHECK-SD: // %bb.0:1319; CHECK-SD-NEXT: cmle v0.4h, v0.4h, #01320; CHECK-SD-NEXT: ret1321;1322; CHECK-GI-LABEL: cmlez4xi16_alt:1323; CHECK-GI: // %bb.0:1324; CHECK-GI-NEXT: movi v1.4h, #11325; CHECK-GI-NEXT: cmgt v0.4h, v1.4h, v0.4h1326; CHECK-GI-NEXT: ret1327 %tmp3 = icmp slt <4 x i16> %A, <i16 1, i16 1, i16 1, i16 1>1328 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1329 ret <4 x i16> %tmp41330}1331 1332define <8 x i16> @cmlez8xi16_alt(<8 x i16> %A) {1333; CHECK-SD-LABEL: cmlez8xi16_alt:1334; CHECK-SD: // %bb.0:1335; CHECK-SD-NEXT: cmle v0.8h, v0.8h, #01336; CHECK-SD-NEXT: ret1337;1338; CHECK-GI-LABEL: cmlez8xi16_alt:1339; CHECK-GI: // %bb.0:1340; CHECK-GI-NEXT: movi v1.8h, #11341; CHECK-GI-NEXT: cmgt v0.8h, v1.8h, v0.8h1342; CHECK-GI-NEXT: ret1343 %tmp3 = icmp slt <8 x i16> %A, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1344 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1345 ret <8 x i16> %tmp41346}1347 1348define <2 x i32> @cmlez2xi32_alt(<2 x i32> %A) {1349; CHECK-SD-LABEL: cmlez2xi32_alt:1350; CHECK-SD: // %bb.0:1351; CHECK-SD-NEXT: cmle v0.2s, v0.2s, #01352; CHECK-SD-NEXT: ret1353;1354; CHECK-GI-LABEL: cmlez2xi32_alt:1355; CHECK-GI: // %bb.0:1356; CHECK-GI-NEXT: movi v1.2s, #11357; CHECK-GI-NEXT: cmgt v0.2s, v1.2s, v0.2s1358; CHECK-GI-NEXT: ret1359 %tmp3 = icmp slt <2 x i32> %A, <i32 1, i32 1>1360 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1361 ret <2 x i32> %tmp41362}1363 1364define <4 x i32> @cmlez4xi32_alt(<4 x i32> %A) {1365; CHECK-SD-LABEL: cmlez4xi32_alt:1366; CHECK-SD: // %bb.0:1367; CHECK-SD-NEXT: cmle v0.4s, v0.4s, #01368; CHECK-SD-NEXT: ret1369;1370; CHECK-GI-LABEL: cmlez4xi32_alt:1371; CHECK-GI: // %bb.0:1372; CHECK-GI-NEXT: movi v1.4s, #11373; CHECK-GI-NEXT: cmgt v0.4s, v1.4s, v0.4s1374; CHECK-GI-NEXT: ret1375 %tmp3 = icmp slt <4 x i32> %A, <i32 1, i32 1, i32 1, i32 1>1376 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1377 ret <4 x i32> %tmp41378}1379 1380define <2 x i64> @cmlez2xi64_alt(<2 x i64> %A) {1381; CHECK-SD-LABEL: cmlez2xi64_alt:1382; CHECK-SD: // %bb.0:1383; CHECK-SD-NEXT: cmle v0.2d, v0.2d, #01384; CHECK-SD-NEXT: ret1385;1386; CHECK-GI-LABEL: cmlez2xi64_alt:1387; CHECK-GI: // %bb.0:1388; CHECK-GI-NEXT: adrp x8, .LCPI125_01389; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI125_0]1390; CHECK-GI-NEXT: cmgt v0.2d, v1.2d, v0.2d1391; CHECK-GI-NEXT: ret1392 %tmp3 = icmp slt <2 x i64> %A, <i64 1, i64 1>1393 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1394 ret <2 x i64> %tmp41395}1396 1397define <8 x i8> @cmltz8xi8(<8 x i8> %A) {1398; CHECK-LABEL: cmltz8xi8:1399; CHECK: // %bb.0:1400; CHECK-NEXT: cmlt v0.8b, v0.8b, #01401; CHECK-NEXT: ret1402 %tmp3 = icmp slt <8 x i8> %A, zeroinitializer1403 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1404 ret <8 x i8> %tmp41405}1406 1407define <16 x i8> @cmltz16xi8(<16 x i8> %A) {1408; CHECK-LABEL: cmltz16xi8:1409; CHECK: // %bb.0:1410; CHECK-NEXT: cmlt v0.16b, v0.16b, #01411; CHECK-NEXT: ret1412 %tmp3 = icmp slt <16 x i8> %A, zeroinitializer1413 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1414 ret <16 x i8> %tmp41415}1416 1417define <4 x i16> @cmltz4xi16(<4 x i16> %A) {1418; CHECK-LABEL: cmltz4xi16:1419; CHECK: // %bb.0:1420; CHECK-NEXT: cmlt v0.4h, v0.4h, #01421; CHECK-NEXT: ret1422 %tmp3 = icmp slt <4 x i16> %A, zeroinitializer1423 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1424 ret <4 x i16> %tmp41425}1426 1427define <8 x i16> @cmltz8xi16(<8 x i16> %A) {1428; CHECK-LABEL: cmltz8xi16:1429; CHECK: // %bb.0:1430; CHECK-NEXT: cmlt v0.8h, v0.8h, #01431; CHECK-NEXT: ret1432 %tmp3 = icmp slt <8 x i16> %A, zeroinitializer1433 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1434 ret <8 x i16> %tmp41435}1436 1437define <2 x i32> @cmltz2xi32(<2 x i32> %A) {1438; CHECK-LABEL: cmltz2xi32:1439; CHECK: // %bb.0:1440; CHECK-NEXT: cmlt v0.2s, v0.2s, #01441; CHECK-NEXT: ret1442 %tmp3 = icmp slt <2 x i32> %A, zeroinitializer1443 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1444 ret <2 x i32> %tmp41445}1446 1447define <4 x i32> @cmltz4xi32(<4 x i32> %A) {1448; CHECK-LABEL: cmltz4xi32:1449; CHECK: // %bb.0:1450; CHECK-NEXT: cmlt v0.4s, v0.4s, #01451; CHECK-NEXT: ret1452 %tmp3 = icmp slt <4 x i32> %A, zeroinitializer1453 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1454 ret <4 x i32> %tmp41455}1456 1457define <2 x i64> @cmltz2xi64(<2 x i64> %A) {1458; CHECK-LABEL: cmltz2xi64:1459; CHECK: // %bb.0:1460; CHECK-NEXT: cmlt v0.2d, v0.2d, #01461; CHECK-NEXT: ret1462 %tmp3 = icmp slt <2 x i64> %A, zeroinitializer1463 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1464 ret <2 x i64> %tmp41465}1466 1467define <8 x i1> @not_cmle8xi8(<8 x i8> %0) {1468; CHECK-SD-LABEL: not_cmle8xi8:1469; CHECK-SD: // %bb.0:1470; CHECK-SD-NEXT: movi v1.2s, #11471; CHECK-SD-NEXT: cmgt v0.8b, v1.8b, v0.8b1472; CHECK-SD-NEXT: ret1473;1474; CHECK-GI-LABEL: not_cmle8xi8:1475; CHECK-GI: // %bb.0:1476; CHECK-GI-NEXT: adrp x8, .LCPI133_01477; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI133_0]1478; CHECK-GI-NEXT: cmgt v0.8b, v1.8b, v0.8b1479; CHECK-GI-NEXT: ret1480 %cmp.i = icmp slt <8 x i8> %0, <i8 1, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0>1481 ret <8 x i1> %cmp.i1482}1483 1484define <4 x i1> @not_cmle16xi8(<4 x i32> %0) {1485; CHECK-SD-LABEL: not_cmle16xi8:1486; CHECK-SD: // %bb.0: // %entry1487; CHECK-SD-NEXT: movi v1.8h, #11488; CHECK-SD-NEXT: cmgt v0.4s, v1.4s, v0.4s1489; CHECK-SD-NEXT: xtn v0.4h, v0.4s1490; CHECK-SD-NEXT: ret1491;1492; CHECK-GI-LABEL: not_cmle16xi8:1493; CHECK-GI: // %bb.0: // %entry1494; CHECK-GI-NEXT: adrp x8, .LCPI134_01495; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI134_0]1496; CHECK-GI-NEXT: cmgt v0.4s, v1.4s, v0.4s1497; CHECK-GI-NEXT: xtn v0.4h, v0.4s1498; CHECK-GI-NEXT: ret1499entry:1500 %bc = bitcast <16 x i8> <i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0> to <4 x i32>1501 %cmp.i = icmp slt <4 x i32> %0, %bc1502 ret <4 x i1> %cmp.i1503}1504 1505define <8 x i8> @cmltz8xi8_alt(<8 x i8> %A) {1506; CHECK-LABEL: cmltz8xi8_alt:1507; CHECK: // %bb.0:1508; CHECK-NEXT: cmlt v0.8b, v0.8b, #01509; CHECK-NEXT: ret1510 %A.lobit = ashr <8 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>1511 ret <8 x i8> %A.lobit1512}1513 1514define <16 x i8> @cmltz16xi8_alt(<16 x i8> %A) {1515; CHECK-LABEL: cmltz16xi8_alt:1516; CHECK: // %bb.0:1517; CHECK-NEXT: cmlt v0.16b, v0.16b, #01518; CHECK-NEXT: ret1519 %A.lobit = ashr <16 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>1520 ret <16 x i8> %A.lobit1521}1522 1523define <4 x i16> @cmltz4xi16_alt(<4 x i16> %A) {1524; CHECK-LABEL: cmltz4xi16_alt:1525; CHECK: // %bb.0:1526; CHECK-NEXT: cmlt v0.4h, v0.4h, #01527; CHECK-NEXT: ret1528 %A.lobit = ashr <4 x i16> %A, <i16 15, i16 15, i16 15, i16 15>1529 ret <4 x i16> %A.lobit1530}1531 1532define <8 x i16> @cmltz8xi16_alt(<8 x i16> %A) {1533; CHECK-LABEL: cmltz8xi16_alt:1534; CHECK: // %bb.0:1535; CHECK-NEXT: cmlt v0.8h, v0.8h, #01536; CHECK-NEXT: ret1537 %A.lobit = ashr <8 x i16> %A, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>1538 ret <8 x i16> %A.lobit1539}1540 1541define <2 x i32> @cmltz2xi32_alt(<2 x i32> %A) {1542; CHECK-LABEL: cmltz2xi32_alt:1543; CHECK: // %bb.0:1544; CHECK-NEXT: cmlt v0.2s, v0.2s, #01545; CHECK-NEXT: ret1546 %A.lobit = ashr <2 x i32> %A, <i32 31, i32 31>1547 ret <2 x i32> %A.lobit1548}1549 1550define <4 x i32> @cmltz4xi32_alt(<4 x i32> %A) {1551; CHECK-LABEL: cmltz4xi32_alt:1552; CHECK: // %bb.0:1553; CHECK-NEXT: cmlt v0.4s, v0.4s, #01554; CHECK-NEXT: ret1555 %A.lobit = ashr <4 x i32> %A, <i32 31, i32 31, i32 31, i32 31>1556 ret <4 x i32> %A.lobit1557}1558 1559define <2 x i64> @cmltz2xi64_alt(<2 x i64> %A) {1560; CHECK-LABEL: cmltz2xi64_alt:1561; CHECK: // %bb.0:1562; CHECK-NEXT: cmlt v0.2d, v0.2d, #01563; CHECK-NEXT: ret1564 %A.lobit = ashr <2 x i64> %A, <i64 63, i64 63>1565 ret <2 x i64> %A.lobit1566}1567 1568define <8 x i8> @cmneqz8xi8(<8 x i8> %A) {1569; CHECK-LABEL: cmneqz8xi8:1570; CHECK: // %bb.0:1571; CHECK-NEXT: cmtst v0.8b, v0.8b, v0.8b1572; CHECK-NEXT: ret1573 %tmp3 = icmp ne <8 x i8> %A, zeroinitializer1574 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1575 ret <8 x i8> %tmp41576}1577 1578define <16 x i8> @cmneqz16xi8(<16 x i8> %A) {1579; CHECK-LABEL: cmneqz16xi8:1580; CHECK: // %bb.0:1581; CHECK-NEXT: cmtst v0.16b, v0.16b, v0.16b1582; CHECK-NEXT: ret1583 %tmp3 = icmp ne <16 x i8> %A, zeroinitializer1584 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1585 ret <16 x i8> %tmp41586}1587 1588define <4 x i16> @cmneqz4xi16(<4 x i16> %A) {1589; CHECK-LABEL: cmneqz4xi16:1590; CHECK: // %bb.0:1591; CHECK-NEXT: cmtst v0.4h, v0.4h, v0.4h1592; CHECK-NEXT: ret1593 %tmp3 = icmp ne <4 x i16> %A, zeroinitializer1594 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1595 ret <4 x i16> %tmp41596}1597 1598define <8 x i16> @cmneqz8xi16(<8 x i16> %A) {1599; CHECK-LABEL: cmneqz8xi16:1600; CHECK: // %bb.0:1601; CHECK-NEXT: cmtst v0.8h, v0.8h, v0.8h1602; CHECK-NEXT: ret1603 %tmp3 = icmp ne <8 x i16> %A, zeroinitializer1604 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1605 ret <8 x i16> %tmp41606}1607 1608define <2 x i32> @cmneqz2xi32(<2 x i32> %A) {1609; CHECK-LABEL: cmneqz2xi32:1610; CHECK: // %bb.0:1611; CHECK-NEXT: cmtst v0.2s, v0.2s, v0.2s1612; CHECK-NEXT: ret1613 %tmp3 = icmp ne <2 x i32> %A, zeroinitializer1614 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1615 ret <2 x i32> %tmp41616}1617 1618define <4 x i32> @cmneqz4xi32(<4 x i32> %A) {1619; CHECK-LABEL: cmneqz4xi32:1620; CHECK: // %bb.0:1621; CHECK-NEXT: cmtst v0.4s, v0.4s, v0.4s1622; CHECK-NEXT: ret1623 %tmp3 = icmp ne <4 x i32> %A, zeroinitializer1624 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1625 ret <4 x i32> %tmp41626}1627 1628define <2 x i64> @cmneqz2xi64(<2 x i64> %A) {1629; CHECK-LABEL: cmneqz2xi64:1630; CHECK: // %bb.0:1631; CHECK-NEXT: cmtst v0.2d, v0.2d, v0.2d1632; CHECK-NEXT: ret1633 %tmp3 = icmp ne <2 x i64> %A, zeroinitializer1634 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1635 ret <2 x i64> %tmp41636}1637 1638define <8 x i8> @cmhsz8xi8(<8 x i8> %A) {1639; CHECK-LABEL: cmhsz8xi8:1640; CHECK: // %bb.0:1641; CHECK-NEXT: movi v1.8b, #21642; CHECK-NEXT: cmhs v0.8b, v0.8b, v1.8b1643; CHECK-NEXT: ret1644 %tmp3 = icmp uge <8 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>1645 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1646 ret <8 x i8> %tmp41647}1648 1649define <16 x i8> @cmhsz16xi8(<16 x i8> %A) {1650; CHECK-LABEL: cmhsz16xi8:1651; CHECK: // %bb.0:1652; CHECK-NEXT: movi v1.16b, #21653; CHECK-NEXT: cmhs v0.16b, v0.16b, v1.16b1654; CHECK-NEXT: ret1655 %tmp3 = icmp uge <16 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>1656 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1657 ret <16 x i8> %tmp41658}1659 1660define <4 x i16> @cmhsz4xi16(<4 x i16> %A) {1661; CHECK-LABEL: cmhsz4xi16:1662; CHECK: // %bb.0:1663; CHECK-NEXT: movi v1.4h, #21664; CHECK-NEXT: cmhs v0.4h, v0.4h, v1.4h1665; CHECK-NEXT: ret1666 %tmp3 = icmp uge <4 x i16> %A, <i16 2, i16 2, i16 2, i16 2>1667 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1668 ret <4 x i16> %tmp41669}1670 1671define <8 x i16> @cmhsz8xi16(<8 x i16> %A) {1672; CHECK-LABEL: cmhsz8xi16:1673; CHECK: // %bb.0:1674; CHECK-NEXT: movi v1.8h, #21675; CHECK-NEXT: cmhs v0.8h, v0.8h, v1.8h1676; CHECK-NEXT: ret1677 %tmp3 = icmp uge <8 x i16> %A, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>1678 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1679 ret <8 x i16> %tmp41680}1681 1682define <2 x i32> @cmhsz2xi32(<2 x i32> %A) {1683; CHECK-LABEL: cmhsz2xi32:1684; CHECK: // %bb.0:1685; CHECK-NEXT: movi v1.2s, #21686; CHECK-NEXT: cmhs v0.2s, v0.2s, v1.2s1687; CHECK-NEXT: ret1688 %tmp3 = icmp uge <2 x i32> %A, <i32 2, i32 2>1689 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1690 ret <2 x i32> %tmp41691}1692 1693define <4 x i32> @cmhsz4xi32(<4 x i32> %A) {1694; CHECK-LABEL: cmhsz4xi32:1695; CHECK: // %bb.0:1696; CHECK-NEXT: movi v1.4s, #21697; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s1698; CHECK-NEXT: ret1699 %tmp3 = icmp uge <4 x i32> %A, <i32 2, i32 2, i32 2, i32 2>1700 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1701 ret <4 x i32> %tmp41702}1703 1704define <2 x i64> @cmhsz2xi64(<2 x i64> %A) {1705; CHECK-SD-LABEL: cmhsz2xi64:1706; CHECK-SD: // %bb.0:1707; CHECK-SD-NEXT: mov w8, #2 // =0x21708; CHECK-SD-NEXT: dup v1.2d, x81709; CHECK-SD-NEXT: cmhs v0.2d, v0.2d, v1.2d1710; CHECK-SD-NEXT: ret1711;1712; CHECK-GI-LABEL: cmhsz2xi64:1713; CHECK-GI: // %bb.0:1714; CHECK-GI-NEXT: adrp x8, .LCPI155_01715; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI155_0]1716; CHECK-GI-NEXT: cmhs v0.2d, v0.2d, v1.2d1717; CHECK-GI-NEXT: ret1718 %tmp3 = icmp uge <2 x i64> %A, <i64 2, i64 2>1719 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1720 ret <2 x i64> %tmp41721}1722 1723 1724define <8 x i8> @cmhiz8xi8(<8 x i8> %A) {1725; CHECK-LABEL: cmhiz8xi8:1726; CHECK: // %bb.0:1727; CHECK-NEXT: movi v1.8b, #11728; CHECK-NEXT: cmhi v0.8b, v0.8b, v1.8b1729; CHECK-NEXT: ret1730 %tmp3 = icmp ugt <8 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>1731 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1732 ret <8 x i8> %tmp41733}1734 1735define <16 x i8> @cmhiz16xi8(<16 x i8> %A) {1736; CHECK-LABEL: cmhiz16xi8:1737; CHECK: // %bb.0:1738; CHECK-NEXT: movi v1.16b, #11739; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b1740; CHECK-NEXT: ret1741 %tmp3 = icmp ugt <16 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>1742 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1743 ret <16 x i8> %tmp41744}1745 1746define <4 x i16> @cmhiz4xi16(<4 x i16> %A) {1747; CHECK-LABEL: cmhiz4xi16:1748; CHECK: // %bb.0:1749; CHECK-NEXT: movi v1.4h, #11750; CHECK-NEXT: cmhi v0.4h, v0.4h, v1.4h1751; CHECK-NEXT: ret1752 %tmp3 = icmp ugt <4 x i16> %A, <i16 1, i16 1, i16 1, i16 1>1753 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1754 ret <4 x i16> %tmp41755}1756 1757define <8 x i16> @cmhiz8xi16(<8 x i16> %A) {1758; CHECK-LABEL: cmhiz8xi16:1759; CHECK: // %bb.0:1760; CHECK-NEXT: movi v1.8h, #11761; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h1762; CHECK-NEXT: ret1763 %tmp3 = icmp ugt <8 x i16> %A, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>1764 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1765 ret <8 x i16> %tmp41766}1767 1768define <2 x i32> @cmhiz2xi32(<2 x i32> %A) {1769; CHECK-LABEL: cmhiz2xi32:1770; CHECK: // %bb.0:1771; CHECK-NEXT: movi v1.2s, #11772; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s1773; CHECK-NEXT: ret1774 %tmp3 = icmp ugt <2 x i32> %A, <i32 1, i32 1>1775 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1776 ret <2 x i32> %tmp41777}1778 1779define <4 x i32> @cmhiz4xi32(<4 x i32> %A) {1780; CHECK-LABEL: cmhiz4xi32:1781; CHECK: // %bb.0:1782; CHECK-NEXT: movi v1.4s, #11783; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s1784; CHECK-NEXT: ret1785 %tmp3 = icmp ugt <4 x i32> %A, <i32 1, i32 1, i32 1, i32 1>1786 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1787 ret <4 x i32> %tmp41788}1789 1790define <2 x i64> @cmhiz2xi64(<2 x i64> %A) {1791; CHECK-SD-LABEL: cmhiz2xi64:1792; CHECK-SD: // %bb.0:1793; CHECK-SD-NEXT: mov w8, #1 // =0x11794; CHECK-SD-NEXT: dup v1.2d, x81795; CHECK-SD-NEXT: cmhi v0.2d, v0.2d, v1.2d1796; CHECK-SD-NEXT: ret1797;1798; CHECK-GI-LABEL: cmhiz2xi64:1799; CHECK-GI: // %bb.0:1800; CHECK-GI-NEXT: adrp x8, .LCPI162_01801; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI162_0]1802; CHECK-GI-NEXT: cmhi v0.2d, v0.2d, v1.2d1803; CHECK-GI-NEXT: ret1804 %tmp3 = icmp ugt <2 x i64> %A, <i64 1, i64 1>1805 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1806 ret <2 x i64> %tmp41807}1808 1809; LS implemented as HS, so check reversed operands.1810define <8 x i8> @cmlsz8xi8(<8 x i8> %A) {1811; CHECK-LABEL: cmlsz8xi8:1812; CHECK: // %bb.0:1813; CHECK-NEXT: movi v1.2d, #00000000000000001814; CHECK-NEXT: cmhs v0.8b, v1.8b, v0.8b1815; CHECK-NEXT: ret1816 %tmp3 = icmp ule <8 x i8> %A, zeroinitializer1817 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1818 ret <8 x i8> %tmp41819}1820 1821; LS implemented as HS, so check reversed operands.1822define <16 x i8> @cmlsz16xi8(<16 x i8> %A) {1823; CHECK-LABEL: cmlsz16xi8:1824; CHECK: // %bb.0:1825; CHECK-NEXT: movi v1.2d, #00000000000000001826; CHECK-NEXT: cmhs v0.16b, v1.16b, v0.16b1827; CHECK-NEXT: ret1828 %tmp3 = icmp ule <16 x i8> %A, zeroinitializer1829 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1830 ret <16 x i8> %tmp41831}1832 1833; LS implemented as HS, so check reversed operands.1834define <4 x i16> @cmlsz4xi16(<4 x i16> %A) {1835; CHECK-LABEL: cmlsz4xi16:1836; CHECK: // %bb.0:1837; CHECK-NEXT: movi v1.2d, #00000000000000001838; CHECK-NEXT: cmhs v0.4h, v1.4h, v0.4h1839; CHECK-NEXT: ret1840 %tmp3 = icmp ule <4 x i16> %A, zeroinitializer1841 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1842 ret <4 x i16> %tmp41843}1844 1845; LS implemented as HS, so check reversed operands.1846define <8 x i16> @cmlsz8xi16(<8 x i16> %A) {1847; CHECK-LABEL: cmlsz8xi16:1848; CHECK: // %bb.0:1849; CHECK-NEXT: movi v1.2d, #00000000000000001850; CHECK-NEXT: cmhs v0.8h, v1.8h, v0.8h1851; CHECK-NEXT: ret1852 %tmp3 = icmp ule <8 x i16> %A, zeroinitializer1853 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1854 ret <8 x i16> %tmp41855}1856 1857; LS implemented as HS, so check reversed operands.1858define <2 x i32> @cmlsz2xi32(<2 x i32> %A) {1859; CHECK-LABEL: cmlsz2xi32:1860; CHECK: // %bb.0:1861; CHECK-NEXT: movi v1.2d, #00000000000000001862; CHECK-NEXT: cmhs v0.2s, v1.2s, v0.2s1863; CHECK-NEXT: ret1864 %tmp3 = icmp ule <2 x i32> %A, zeroinitializer1865 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1866 ret <2 x i32> %tmp41867}1868 1869; LS implemented as HS, so check reversed operands.1870define <4 x i32> @cmlsz4xi32(<4 x i32> %A) {1871; CHECK-LABEL: cmlsz4xi32:1872; CHECK: // %bb.0:1873; CHECK-NEXT: movi v1.2d, #00000000000000001874; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s1875; CHECK-NEXT: ret1876 %tmp3 = icmp ule <4 x i32> %A, zeroinitializer1877 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1878 ret <4 x i32> %tmp41879}1880 1881; LS implemented as HS, so check reversed operands.1882define <2 x i64> @cmlsz2xi64(<2 x i64> %A) {1883; CHECK-LABEL: cmlsz2xi64:1884; CHECK: // %bb.0:1885; CHECK-NEXT: movi v1.2d, #00000000000000001886; CHECK-NEXT: cmhs v0.2d, v1.2d, v0.2d1887; CHECK-NEXT: ret1888 %tmp3 = icmp ule <2 x i64> %A, zeroinitializer1889 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1890 ret <2 x i64> %tmp41891}1892 1893; LO implemented as HI, so check reversed operands.1894define <8 x i8> @cmloz8xi8(<8 x i8> %A) {1895; CHECK-LABEL: cmloz8xi8:1896; CHECK: // %bb.0:1897; CHECK-NEXT: movi v1.8b, #21898; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b1899; CHECK-NEXT: ret1900 %tmp3 = icmp ult <8 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>1901 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>1902 ret <8 x i8> %tmp41903}1904 1905; LO implemented as HI, so check reversed operands.1906define <16 x i8> @cmloz16xi8(<16 x i8> %A) {1907; CHECK-LABEL: cmloz16xi8:1908; CHECK: // %bb.0:1909; CHECK-NEXT: movi v1.16b, #21910; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b1911; CHECK-NEXT: ret1912 %tmp3 = icmp ult <16 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>1913 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>1914 ret <16 x i8> %tmp41915}1916 1917; LO implemented as HI, so check reversed operands.1918define <4 x i16> @cmloz4xi16(<4 x i16> %A) {1919; CHECK-LABEL: cmloz4xi16:1920; CHECK: // %bb.0:1921; CHECK-NEXT: movi v1.4h, #21922; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h1923; CHECK-NEXT: ret1924 %tmp3 = icmp ult <4 x i16> %A, <i16 2, i16 2, i16 2, i16 2>1925 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>1926 ret <4 x i16> %tmp41927}1928 1929; LO implemented as HI, so check reversed operands.1930define <8 x i16> @cmloz8xi16(<8 x i16> %A) {1931; CHECK-LABEL: cmloz8xi16:1932; CHECK: // %bb.0:1933; CHECK-NEXT: movi v1.8h, #21934; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h1935; CHECK-NEXT: ret1936 %tmp3 = icmp ult <8 x i16> %A, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>1937 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>1938 ret <8 x i16> %tmp41939}1940 1941; LO implemented as HI, so check reversed operands.1942define <2 x i32> @cmloz2xi32(<2 x i32> %A) {1943; CHECK-LABEL: cmloz2xi32:1944; CHECK: // %bb.0:1945; CHECK-NEXT: movi v1.2s, #21946; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s1947; CHECK-NEXT: ret1948 %tmp3 = icmp ult <2 x i32> %A, <i32 2, i32 2>1949 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1950 ret <2 x i32> %tmp41951}1952 1953; LO implemented as HI, so check reversed operands.1954define <4 x i32> @cmloz4xi32(<4 x i32> %A) {1955; CHECK-LABEL: cmloz4xi32:1956; CHECK: // %bb.0:1957; CHECK-NEXT: movi v1.4s, #21958; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s1959; CHECK-NEXT: ret1960 %tmp3 = icmp ult <4 x i32> %A, <i32 2, i32 2, i32 2, i32 2>1961 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>1962 ret <4 x i32> %tmp41963}1964 1965; LO implemented as HI, so check reversed operands.1966define <2 x i64> @cmloz2xi64(<2 x i64> %A) {1967; CHECK-SD-LABEL: cmloz2xi64:1968; CHECK-SD: // %bb.0:1969; CHECK-SD-NEXT: mov w8, #2 // =0x21970; CHECK-SD-NEXT: dup v1.2d, x81971; CHECK-SD-NEXT: cmhi v0.2d, v1.2d, v0.2d1972; CHECK-SD-NEXT: ret1973;1974; CHECK-GI-LABEL: cmloz2xi64:1975; CHECK-GI: // %bb.0:1976; CHECK-GI-NEXT: adrp x8, .LCPI176_01977; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI176_0]1978; CHECK-GI-NEXT: cmhi v0.2d, v1.2d, v0.2d1979; CHECK-GI-NEXT: ret1980 %tmp3 = icmp ult <2 x i64> %A, <i64 2, i64 2>1981 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>1982 ret <2 x i64> %tmp41983}1984 1985define <2 x i32> @fcmoeq2xfloat(<2 x float> %A, <2 x float> %B) {1986; CHECK-LABEL: fcmoeq2xfloat:1987; CHECK: // %bb.0:1988; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s1989; CHECK-NEXT: ret1990 %tmp3 = fcmp oeq <2 x float> %A, %B1991 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>1992 ret <2 x i32> %tmp41993}1994 1995define <4 x i32> @fcmoeq4xfloat(<4 x float> %A, <4 x float> %B) {1996; CHECK-LABEL: fcmoeq4xfloat:1997; CHECK: // %bb.0:1998; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s1999; CHECK-NEXT: ret2000 %tmp3 = fcmp oeq <4 x float> %A, %B2001 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2002 ret <4 x i32> %tmp42003}2004define <2 x i64> @fcmoeq2xdouble(<2 x double> %A, <2 x double> %B) {2005; CHECK-LABEL: fcmoeq2xdouble:2006; CHECK: // %bb.0:2007; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d2008; CHECK-NEXT: ret2009 %tmp3 = fcmp oeq <2 x double> %A, %B2010 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2011 ret <2 x i64> %tmp42012}2013 2014define <2 x i32> @fcmoge2xfloat(<2 x float> %A, <2 x float> %B) {2015; CHECK-LABEL: fcmoge2xfloat:2016; CHECK: // %bb.0:2017; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s2018; CHECK-NEXT: ret2019 %tmp3 = fcmp oge <2 x float> %A, %B2020 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2021 ret <2 x i32> %tmp42022}2023 2024define <4 x i32> @fcmoge4xfloat(<4 x float> %A, <4 x float> %B) {2025; CHECK-LABEL: fcmoge4xfloat:2026; CHECK: // %bb.0:2027; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s2028; CHECK-NEXT: ret2029 %tmp3 = fcmp oge <4 x float> %A, %B2030 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2031 ret <4 x i32> %tmp42032}2033define <2 x i64> @fcmoge2xdouble(<2 x double> %A, <2 x double> %B) {2034; CHECK-LABEL: fcmoge2xdouble:2035; CHECK: // %bb.0:2036; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d2037; CHECK-NEXT: ret2038 %tmp3 = fcmp oge <2 x double> %A, %B2039 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2040 ret <2 x i64> %tmp42041}2042 2043define <2 x i32> @fcmogt2xfloat(<2 x float> %A, <2 x float> %B) {2044; CHECK-LABEL: fcmogt2xfloat:2045; CHECK: // %bb.0:2046; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s2047; CHECK-NEXT: ret2048 %tmp3 = fcmp ogt <2 x float> %A, %B2049 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2050 ret <2 x i32> %tmp42051}2052 2053define <4 x i32> @fcmogt4xfloat(<4 x float> %A, <4 x float> %B) {2054; CHECK-LABEL: fcmogt4xfloat:2055; CHECK: // %bb.0:2056; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s2057; CHECK-NEXT: ret2058 %tmp3 = fcmp ogt <4 x float> %A, %B2059 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2060 ret <4 x i32> %tmp42061}2062define <2 x i64> @fcmogt2xdouble(<2 x double> %A, <2 x double> %B) {2063; CHECK-LABEL: fcmogt2xdouble:2064; CHECK: // %bb.0:2065; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d2066; CHECK-NEXT: ret2067 %tmp3 = fcmp ogt <2 x double> %A, %B2068 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2069 ret <2 x i64> %tmp42070}2071 2072; OLE implemented as OGE, so check reversed operands.2073define <2 x i32> @fcmole2xfloat(<2 x float> %A, <2 x float> %B) {2074; CHECK-LABEL: fcmole2xfloat:2075; CHECK: // %bb.0:2076; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s2077; CHECK-NEXT: ret2078 %tmp3 = fcmp ole <2 x float> %A, %B2079 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2080 ret <2 x i32> %tmp42081}2082 2083; OLE implemented as OGE, so check reversed operands.2084define <4 x i32> @fcmole4xfloat(<4 x float> %A, <4 x float> %B) {2085; CHECK-LABEL: fcmole4xfloat:2086; CHECK: // %bb.0:2087; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s2088; CHECK-NEXT: ret2089 %tmp3 = fcmp ole <4 x float> %A, %B2090 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2091 ret <4 x i32> %tmp42092}2093 2094; OLE implemented as OGE, so check reversed operands.2095define <2 x i64> @fcmole2xdouble(<2 x double> %A, <2 x double> %B) {2096; CHECK-LABEL: fcmole2xdouble:2097; CHECK: // %bb.0:2098; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d2099; CHECK-NEXT: ret2100 %tmp3 = fcmp ole <2 x double> %A, %B2101 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2102 ret <2 x i64> %tmp42103}2104 2105; OLE implemented as OGE, so check reversed operands.2106define <2 x i32> @fcmolt2xfloat(<2 x float> %A, <2 x float> %B) {2107; CHECK-LABEL: fcmolt2xfloat:2108; CHECK: // %bb.0:2109; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s2110; CHECK-NEXT: ret2111 %tmp3 = fcmp olt <2 x float> %A, %B2112 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2113 ret <2 x i32> %tmp42114}2115 2116; OLE implemented as OGE, so check reversed operands.2117define <4 x i32> @fcmolt4xfloat(<4 x float> %A, <4 x float> %B) {2118; CHECK-LABEL: fcmolt4xfloat:2119; CHECK: // %bb.0:2120; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s2121; CHECK-NEXT: ret2122 %tmp3 = fcmp olt <4 x float> %A, %B2123 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2124 ret <4 x i32> %tmp42125}2126 2127; OLE implemented as OGE, so check reversed operands.2128define <2 x i64> @fcmolt2xdouble(<2 x double> %A, <2 x double> %B) {2129; CHECK-LABEL: fcmolt2xdouble:2130; CHECK: // %bb.0:2131; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d2132; CHECK-NEXT: ret2133 %tmp3 = fcmp olt <2 x double> %A, %B2134 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2135 ret <2 x i64> %tmp42136}2137 2138; ONE = OGT | OLT, OLT implemented as OGT so check reversed operands2139define <2 x i32> @fcmone2xfloat(<2 x float> %A, <2 x float> %B) {2140; CHECK-LABEL: fcmone2xfloat:2141; CHECK: // %bb.0:2142; CHECK-NEXT: fcmgt v2.2s, v0.2s, v1.2s2143; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s2144; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b2145; CHECK-NEXT: ret2146 %tmp3 = fcmp one <2 x float> %A, %B2147 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2148 ret <2 x i32> %tmp42149}2150 2151; ONE = OGT | OLT, OLT implemented as OGT so check reversed operands2152define <4 x i32> @fcmone4xfloat(<4 x float> %A, <4 x float> %B) {2153; CHECK-LABEL: fcmone4xfloat:2154; CHECK: // %bb.0:2155; CHECK-NEXT: fcmgt v2.4s, v0.4s, v1.4s2156; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s2157; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2158; CHECK-NEXT: ret2159 %tmp3 = fcmp one <4 x float> %A, %B2160 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2161 ret <4 x i32> %tmp42162}2163 2164; ONE = OGT | OLT, OLT implemented as OGT so check reversed operands2165; todo check reversed operands2166define <2 x i64> @fcmone2xdouble(<2 x double> %A, <2 x double> %B) {2167; CHECK-LABEL: fcmone2xdouble:2168; CHECK: // %bb.0:2169; CHECK-NEXT: fcmgt v2.2d, v0.2d, v1.2d2170; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d2171; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2172; CHECK-NEXT: ret2173 %tmp3 = fcmp one <2 x double> %A, %B2174 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2175 ret <2 x i64> %tmp42176}2177 2178; ORD = OGE | OLT, OLT implemented as OGT, so check reversed operands.2179define <2 x i32> @fcmord2xfloat(<2 x float> %A, <2 x float> %B) {2180; CHECK-LABEL: fcmord2xfloat:2181; CHECK: // %bb.0:2182; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s2183; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s2184; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b2185; CHECK-NEXT: ret2186 %tmp3 = fcmp ord <2 x float> %A, %B2187 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2188 ret <2 x i32> %tmp42189}2190 2191; ORD = OGE | OLT, OLT implemented as OGT, so check reversed operands.2192define <4 x i32> @fcmord4xfloat(<4 x float> %A, <4 x float> %B) {2193; CHECK-LABEL: fcmord4xfloat:2194; CHECK: // %bb.0:2195; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s2196; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s2197; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2198; CHECK-NEXT: ret2199 %tmp3 = fcmp ord <4 x float> %A, %B2200 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2201 ret <4 x i32> %tmp42202}2203 2204; ORD = OGE | OLT, OLT implemented as OGT, so check reversed operands.2205define <2 x i64> @fcmord2xdouble(<2 x double> %A, <2 x double> %B) {2206; CHECK-LABEL: fcmord2xdouble:2207; CHECK: // %bb.0:2208; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d2209; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d2210; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2211; CHECK-NEXT: ret2212 %tmp3 = fcmp ord <2 x double> %A, %B2213 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2214 ret <2 x i64> %tmp42215}2216 2217 2218; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.2219define <2 x i32> @fcmuno2xfloat(<2 x float> %A, <2 x float> %B) {2220; CHECK-LABEL: fcmuno2xfloat:2221; CHECK: // %bb.0:2222; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s2223; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s2224; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b2225; CHECK-NEXT: mvn v0.8b, v0.8b2226; CHECK-NEXT: ret2227 %tmp3 = fcmp uno <2 x float> %A, %B2228 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2229 ret <2 x i32> %tmp42230}2231 2232; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.2233define <4 x i32> @fcmuno4xfloat(<4 x float> %A, <4 x float> %B) {2234; CHECK-LABEL: fcmuno4xfloat:2235; CHECK: // %bb.0:2236; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s2237; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s2238; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2239; CHECK-NEXT: mvn v0.16b, v0.16b2240; CHECK-NEXT: ret2241 %tmp3 = fcmp uno <4 x float> %A, %B2242 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2243 ret <4 x i32> %tmp42244}2245 2246; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.2247define <2 x i64> @fcmuno2xdouble(<2 x double> %A, <2 x double> %B) {2248; CHECK-LABEL: fcmuno2xdouble:2249; CHECK: // %bb.0:2250; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d2251; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d2252; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2253; CHECK-NEXT: mvn v0.16b, v0.16b2254; CHECK-NEXT: ret2255 %tmp3 = fcmp uno <2 x double> %A, %B2256 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2257 ret <2 x i64> %tmp42258}2259 2260; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands2261define <2 x i32> @fcmueq2xfloat(<2 x float> %A, <2 x float> %B) {2262; CHECK-LABEL: fcmueq2xfloat:2263; CHECK: // %bb.0:2264; CHECK-NEXT: fcmgt v2.2s, v0.2s, v1.2s2265; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s2266; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b2267; CHECK-NEXT: mvn v0.8b, v0.8b2268; CHECK-NEXT: ret2269 %tmp3 = fcmp ueq <2 x float> %A, %B2270 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2271 ret <2 x i32> %tmp42272}2273 2274; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands2275define <4 x i32> @fcmueq4xfloat(<4 x float> %A, <4 x float> %B) {2276; CHECK-LABEL: fcmueq4xfloat:2277; CHECK: // %bb.0:2278; CHECK-NEXT: fcmgt v2.4s, v0.4s, v1.4s2279; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s2280; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2281; CHECK-NEXT: mvn v0.16b, v0.16b2282; CHECK-NEXT: ret2283 %tmp3 = fcmp ueq <4 x float> %A, %B2284 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2285 ret <4 x i32> %tmp42286}2287 2288; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands2289define <2 x i64> @fcmueq2xdouble(<2 x double> %A, <2 x double> %B) {2290; CHECK-LABEL: fcmueq2xdouble:2291; CHECK: // %bb.0:2292; CHECK-NEXT: fcmgt v2.2d, v0.2d, v1.2d2293; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d2294; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b2295; CHECK-NEXT: mvn v0.16b, v0.16b2296; CHECK-NEXT: ret2297 %tmp3 = fcmp ueq <2 x double> %A, %B2298 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2299 ret <2 x i64> %tmp42300}2301 2302; UGE = ULE with swapped operands, ULE implemented as !OGT.2303define <2 x i32> @fcmuge2xfloat(<2 x float> %A, <2 x float> %B) {2304; CHECK-LABEL: fcmuge2xfloat:2305; CHECK: // %bb.0:2306; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s2307; CHECK-NEXT: mvn v0.8b, v0.8b2308; CHECK-NEXT: ret2309 %tmp3 = fcmp uge <2 x float> %A, %B2310 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2311 ret <2 x i32> %tmp42312}2313 2314; UGE = ULE with swapped operands, ULE implemented as !OGT.2315define <4 x i32> @fcmuge4xfloat(<4 x float> %A, <4 x float> %B) {2316; CHECK-LABEL: fcmuge4xfloat:2317; CHECK: // %bb.0:2318; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s2319; CHECK-NEXT: mvn v0.16b, v0.16b2320; CHECK-NEXT: ret2321 %tmp3 = fcmp uge <4 x float> %A, %B2322 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2323 ret <4 x i32> %tmp42324}2325 2326; UGE = ULE with swapped operands, ULE implemented as !OGT.2327define <2 x i64> @fcmuge2xdouble(<2 x double> %A, <2 x double> %B) {2328; CHECK-LABEL: fcmuge2xdouble:2329; CHECK: // %bb.0:2330; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d2331; CHECK-NEXT: mvn v0.16b, v0.16b2332; CHECK-NEXT: ret2333 %tmp3 = fcmp uge <2 x double> %A, %B2334 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2335 ret <2 x i64> %tmp42336}2337 2338; UGT = ULT with swapped operands, ULT implemented as !OGE.2339define <2 x i32> @fcmugt2xfloat(<2 x float> %A, <2 x float> %B) {2340; CHECK-LABEL: fcmugt2xfloat:2341; CHECK: // %bb.0:2342; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s2343; CHECK-NEXT: mvn v0.8b, v0.8b2344; CHECK-NEXT: ret2345 %tmp3 = fcmp ugt <2 x float> %A, %B2346 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2347 ret <2 x i32> %tmp42348}2349 2350; UGT = ULT with swapped operands, ULT implemented as !OGE.2351define <4 x i32> @fcmugt4xfloat(<4 x float> %A, <4 x float> %B) {2352; CHECK-LABEL: fcmugt4xfloat:2353; CHECK: // %bb.0:2354; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s2355; CHECK-NEXT: mvn v0.16b, v0.16b2356; CHECK-NEXT: ret2357 %tmp3 = fcmp ugt <4 x float> %A, %B2358 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2359 ret <4 x i32> %tmp42360}2361 2362define <2 x i64> @fcmugt2xdouble(<2 x double> %A, <2 x double> %B) {2363; CHECK-LABEL: fcmugt2xdouble:2364; CHECK: // %bb.0:2365; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d2366; CHECK-NEXT: mvn v0.16b, v0.16b2367; CHECK-NEXT: ret2368 %tmp3 = fcmp ugt <2 x double> %A, %B2369 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2370 ret <2 x i64> %tmp42371}2372 2373; ULE implemented as !OGT.2374define <2 x i32> @fcmule2xfloat(<2 x float> %A, <2 x float> %B) {2375; CHECK-LABEL: fcmule2xfloat:2376; CHECK: // %bb.0:2377; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s2378; CHECK-NEXT: mvn v0.8b, v0.8b2379; CHECK-NEXT: ret2380 %tmp3 = fcmp ule <2 x float> %A, %B2381 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2382 ret <2 x i32> %tmp42383}2384 2385; ULE implemented as !OGT.2386define <4 x i32> @fcmule4xfloat(<4 x float> %A, <4 x float> %B) {2387; CHECK-LABEL: fcmule4xfloat:2388; CHECK: // %bb.0:2389; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s2390; CHECK-NEXT: mvn v0.16b, v0.16b2391; CHECK-NEXT: ret2392 %tmp3 = fcmp ule <4 x float> %A, %B2393 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2394 ret <4 x i32> %tmp42395}2396 2397; ULE implemented as !OGT.2398define <2 x i64> @fcmule2xdouble(<2 x double> %A, <2 x double> %B) {2399; CHECK-LABEL: fcmule2xdouble:2400; CHECK: // %bb.0:2401; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d2402; CHECK-NEXT: mvn v0.16b, v0.16b2403; CHECK-NEXT: ret2404 %tmp3 = fcmp ule <2 x double> %A, %B2405 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2406 ret <2 x i64> %tmp42407}2408 2409; ULT implemented as !OGE.2410define <2 x i32> @fcmult2xfloat(<2 x float> %A, <2 x float> %B) {2411; CHECK-LABEL: fcmult2xfloat:2412; CHECK: // %bb.0:2413; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s2414; CHECK-NEXT: mvn v0.8b, v0.8b2415; CHECK-NEXT: ret2416 %tmp3 = fcmp ult <2 x float> %A, %B2417 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2418 ret <2 x i32> %tmp42419}2420 2421; ULT implemented as !OGE.2422define <4 x i32> @fcmult4xfloat(<4 x float> %A, <4 x float> %B) {2423; CHECK-LABEL: fcmult4xfloat:2424; CHECK: // %bb.0:2425; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s2426; CHECK-NEXT: mvn v0.16b, v0.16b2427; CHECK-NEXT: ret2428 %tmp3 = fcmp ult <4 x float> %A, %B2429 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2430 ret <4 x i32> %tmp42431}2432 2433; ULT implemented as !OGE.2434define <2 x i64> @fcmult2xdouble(<2 x double> %A, <2 x double> %B) {2435; CHECK-LABEL: fcmult2xdouble:2436; CHECK: // %bb.0:2437; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d2438; CHECK-NEXT: mvn v0.16b, v0.16b2439; CHECK-NEXT: ret2440 %tmp3 = fcmp ult <2 x double> %A, %B2441 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2442 ret <2 x i64> %tmp42443}2444 2445; UNE = !OEQ.2446define <2 x i32> @fcmune2xfloat(<2 x float> %A, <2 x float> %B) {2447; CHECK-LABEL: fcmune2xfloat:2448; CHECK: // %bb.0:2449; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s2450; CHECK-NEXT: mvn v0.8b, v0.8b2451; CHECK-NEXT: ret2452 %tmp3 = fcmp une <2 x float> %A, %B2453 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2454 ret <2 x i32> %tmp42455}2456 2457; UNE = !OEQ.2458define <4 x i32> @fcmune4xfloat(<4 x float> %A, <4 x float> %B) {2459; CHECK-LABEL: fcmune4xfloat:2460; CHECK: // %bb.0:2461; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s2462; CHECK-NEXT: mvn v0.16b, v0.16b2463; CHECK-NEXT: ret2464 %tmp3 = fcmp une <4 x float> %A, %B2465 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2466 ret <4 x i32> %tmp42467}2468 2469; UNE = !OEQ.2470define <2 x i64> @fcmune2xdouble(<2 x double> %A, <2 x double> %B) {2471; CHECK-LABEL: fcmune2xdouble:2472; CHECK: // %bb.0:2473; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d2474; CHECK-NEXT: mvn v0.16b, v0.16b2475; CHECK-NEXT: ret2476 %tmp3 = fcmp une <2 x double> %A, %B2477 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2478 ret <2 x i64> %tmp42479}2480 2481define <2 x i32> @fcmal2xfloat(<2 x float> %A, <2 x float> %B) {2482; CHECK-SD-LABEL: fcmal2xfloat:2483; CHECK-SD: // %bb.0:2484; CHECK-SD-NEXT: movi v0.2d, #0xffffffffffffffff2485; CHECK-SD-NEXT: ret2486;2487; CHECK-GI-LABEL: fcmal2xfloat:2488; CHECK-GI: // %bb.0:2489; CHECK-GI-NEXT: movi v0.2s, #12490; CHECK-GI-NEXT: shl v0.2s, v0.2s, #312491; CHECK-GI-NEXT: cmlt v0.2s, v0.2s, #02492; CHECK-GI-NEXT: ret2493 %tmp3 = fcmp true <2 x float> %A, %B2494 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2495 ret <2 x i32> %tmp42496}2497 2498define <4 x i32> @fcmal4xfloat(<4 x float> %A, <4 x float> %B) {2499; CHECK-SD-LABEL: fcmal4xfloat:2500; CHECK-SD: // %bb.0:2501; CHECK-SD-NEXT: movi v0.2d, #0xffffffffffffffff2502; CHECK-SD-NEXT: ret2503;2504; CHECK-GI-LABEL: fcmal4xfloat:2505; CHECK-GI: // %bb.0:2506; CHECK-GI-NEXT: mov w8, #1 // =0x12507; CHECK-GI-NEXT: dup v0.2s, w82508; CHECK-GI-NEXT: mov v0.d[1], v0.d[0]2509; CHECK-GI-NEXT: shl v0.4s, v0.4s, #312510; CHECK-GI-NEXT: cmlt v0.4s, v0.4s, #02511; CHECK-GI-NEXT: ret2512 %tmp3 = fcmp true <4 x float> %A, %B2513 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2514 ret <4 x i32> %tmp42515}2516define <2 x i64> @fcmal2xdouble(<2 x double> %A, <2 x double> %B) {2517; CHECK-SD-LABEL: fcmal2xdouble:2518; CHECK-SD: // %bb.0:2519; CHECK-SD-NEXT: movi v0.2d, #0xffffffffffffffff2520; CHECK-SD-NEXT: ret2521;2522; CHECK-GI-LABEL: fcmal2xdouble:2523; CHECK-GI: // %bb.0:2524; CHECK-GI-NEXT: adrp x8, .LCPI221_02525; CHECK-GI-NEXT: ldr q0, [x8, :lo12:.LCPI221_0]2526; CHECK-GI-NEXT: shl v0.2d, v0.2d, #632527; CHECK-GI-NEXT: cmlt v0.2d, v0.2d, #02528; CHECK-GI-NEXT: ret2529 %tmp3 = fcmp true <2 x double> %A, %B2530 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2531 ret <2 x i64> %tmp42532}2533 2534define <2 x i32> @fcmnv2xfloat(<2 x float> %A, <2 x float> %B) {2535; CHECK-LABEL: fcmnv2xfloat:2536; CHECK: // %bb.0:2537; CHECK-NEXT: movi v0.2d, #00000000000000002538; CHECK-NEXT: ret2539 %tmp3 = fcmp false <2 x float> %A, %B2540 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2541 ret <2 x i32> %tmp42542}2543 2544define <4 x i32> @fcmnv4xfloat(<4 x float> %A, <4 x float> %B) {2545; CHECK-SD-LABEL: fcmnv4xfloat:2546; CHECK-SD: // %bb.0:2547; CHECK-SD-NEXT: movi v0.2d, #00000000000000002548; CHECK-SD-NEXT: ret2549;2550; CHECK-GI-LABEL: fcmnv4xfloat:2551; CHECK-GI: // %bb.0:2552; CHECK-GI-NEXT: mov w8, #0 // =0x02553; CHECK-GI-NEXT: fmov s0, w82554; CHECK-GI-NEXT: mov v0.s[1], w82555; CHECK-GI-NEXT: mov v0.d[1], v0.d[0]2556; CHECK-GI-NEXT: shl v0.4s, v0.4s, #312557; CHECK-GI-NEXT: cmlt v0.4s, v0.4s, #02558; CHECK-GI-NEXT: ret2559 %tmp3 = fcmp false <4 x float> %A, %B2560 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2561 ret <4 x i32> %tmp42562}2563define <2 x i64> @fcmnv2xdouble(<2 x double> %A, <2 x double> %B) {2564; CHECK-LABEL: fcmnv2xdouble:2565; CHECK: // %bb.0:2566; CHECK-NEXT: movi v0.2d, #00000000000000002567; CHECK-NEXT: ret2568 %tmp3 = fcmp false <2 x double> %A, %B2569 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2570 ret <2 x i64> %tmp42571}2572 2573define <2 x i32> @fcmoeqz2xfloat(<2 x float> %A) {2574; CHECK-LABEL: fcmoeqz2xfloat:2575; CHECK: // %bb.0:2576; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.02577; CHECK-NEXT: ret2578 %tmp3 = fcmp oeq <2 x float> %A, zeroinitializer2579 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2580 ret <2 x i32> %tmp42581}2582 2583define <4 x i32> @fcmoeqz4xfloat(<4 x float> %A) {2584; CHECK-LABEL: fcmoeqz4xfloat:2585; CHECK: // %bb.0:2586; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.02587; CHECK-NEXT: ret2588 %tmp3 = fcmp oeq <4 x float> %A, zeroinitializer2589 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2590 ret <4 x i32> %tmp42591}2592define <2 x i64> @fcmoeqz2xdouble(<2 x double> %A) {2593; CHECK-LABEL: fcmoeqz2xdouble:2594; CHECK: // %bb.0:2595; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.02596; CHECK-NEXT: ret2597 %tmp3 = fcmp oeq <2 x double> %A, zeroinitializer2598 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2599 ret <2 x i64> %tmp42600}2601 2602 2603define <2 x i32> @fcmogez2xfloat(<2 x float> %A) {2604; CHECK-LABEL: fcmogez2xfloat:2605; CHECK: // %bb.0:2606; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.02607; CHECK-NEXT: ret2608 %tmp3 = fcmp oge <2 x float> %A, zeroinitializer2609 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2610 ret <2 x i32> %tmp42611}2612 2613define <4 x i32> @fcmogez4xfloat(<4 x float> %A) {2614; CHECK-LABEL: fcmogez4xfloat:2615; CHECK: // %bb.0:2616; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.02617; CHECK-NEXT: ret2618 %tmp3 = fcmp oge <4 x float> %A, zeroinitializer2619 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2620 ret <4 x i32> %tmp42621}2622define <2 x i64> @fcmogez2xdouble(<2 x double> %A) {2623; CHECK-LABEL: fcmogez2xdouble:2624; CHECK: // %bb.0:2625; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.02626; CHECK-NEXT: ret2627 %tmp3 = fcmp oge <2 x double> %A, zeroinitializer2628 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2629 ret <2 x i64> %tmp42630}2631 2632define <2 x i32> @fcmogtz2xfloat(<2 x float> %A) {2633; CHECK-LABEL: fcmogtz2xfloat:2634; CHECK: // %bb.0:2635; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.02636; CHECK-NEXT: ret2637 %tmp3 = fcmp ogt <2 x float> %A, zeroinitializer2638 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2639 ret <2 x i32> %tmp42640}2641 2642define <4 x i32> @fcmogtz4xfloat(<4 x float> %A) {2643; CHECK-LABEL: fcmogtz4xfloat:2644; CHECK: // %bb.0:2645; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.02646; CHECK-NEXT: ret2647 %tmp3 = fcmp ogt <4 x float> %A, zeroinitializer2648 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2649 ret <4 x i32> %tmp42650}2651define <2 x i64> @fcmogtz2xdouble(<2 x double> %A) {2652; CHECK-LABEL: fcmogtz2xdouble:2653; CHECK: // %bb.0:2654; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.02655; CHECK-NEXT: ret2656 %tmp3 = fcmp ogt <2 x double> %A, zeroinitializer2657 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2658 ret <2 x i64> %tmp42659}2660 2661define <2 x i32> @fcmoltz2xfloat(<2 x float> %A) {2662; CHECK-LABEL: fcmoltz2xfloat:2663; CHECK: // %bb.0:2664; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.02665; CHECK-NEXT: ret2666 %tmp3 = fcmp olt <2 x float> %A, zeroinitializer2667 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2668 ret <2 x i32> %tmp42669}2670 2671define <4 x i32> @fcmoltz4xfloat(<4 x float> %A) {2672; CHECK-LABEL: fcmoltz4xfloat:2673; CHECK: // %bb.0:2674; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.02675; CHECK-NEXT: ret2676 %tmp3 = fcmp olt <4 x float> %A, zeroinitializer2677 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2678 ret <4 x i32> %tmp42679}2680 2681define <2 x i64> @fcmoltz2xdouble(<2 x double> %A) {2682; CHECK-LABEL: fcmoltz2xdouble:2683; CHECK: // %bb.0:2684; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.02685; CHECK-NEXT: ret2686 %tmp3 = fcmp olt <2 x double> %A, zeroinitializer2687 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2688 ret <2 x i64> %tmp42689}2690 2691define <2 x i32> @fcmolez2xfloat(<2 x float> %A) {2692; CHECK-LABEL: fcmolez2xfloat:2693; CHECK: // %bb.0:2694; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.02695; CHECK-NEXT: ret2696 %tmp3 = fcmp ole <2 x float> %A, zeroinitializer2697 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2698 ret <2 x i32> %tmp42699}2700 2701define <4 x i32> @fcmolez4xfloat(<4 x float> %A) {2702; CHECK-LABEL: fcmolez4xfloat:2703; CHECK: // %bb.0:2704; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.02705; CHECK-NEXT: ret2706 %tmp3 = fcmp ole <4 x float> %A, zeroinitializer2707 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2708 ret <4 x i32> %tmp42709}2710 2711define <2 x i64> @fcmolez2xdouble(<2 x double> %A) {2712; CHECK-LABEL: fcmolez2xdouble:2713; CHECK: // %bb.0:2714; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.02715; CHECK-NEXT: ret2716 %tmp3 = fcmp ole <2 x double> %A, zeroinitializer2717 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2718 ret <2 x i64> %tmp42719}2720 2721; ONE with zero = OLT | OGT2722define <2 x i32> @fcmonez2xfloat(<2 x float> %A) {2723; CHECK-LABEL: fcmonez2xfloat:2724; CHECK: // %bb.0:2725; CHECK-NEXT: fcmgt v1.2s, v0.2s, #0.02726; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.02727; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b2728; CHECK-NEXT: ret2729 %tmp3 = fcmp one <2 x float> %A, zeroinitializer2730 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2731 ret <2 x i32> %tmp42732}2733 2734; ONE with zero = OLT | OGT2735define <4 x i32> @fcmonez4xfloat(<4 x float> %A) {2736; CHECK-LABEL: fcmonez4xfloat:2737; CHECK: // %bb.0:2738; CHECK-NEXT: fcmgt v1.4s, v0.4s, #0.02739; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.02740; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b2741; CHECK-NEXT: ret2742 %tmp3 = fcmp one <4 x float> %A, zeroinitializer2743 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2744 ret <4 x i32> %tmp42745}2746 2747; ONE with zero = OLT | OGT2748define <2 x i64> @fcmonez2xdouble(<2 x double> %A) {2749; CHECK-LABEL: fcmonez2xdouble:2750; CHECK: // %bb.0:2751; CHECK-NEXT: fcmgt v1.2d, v0.2d, #0.02752; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.02753; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b2754; CHECK-NEXT: ret2755 %tmp3 = fcmp one <2 x double> %A, zeroinitializer2756 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2757 ret <2 x i64> %tmp42758}2759 2760; ORD A, zero = EQ A, A2761define <2 x i32> @fcmordz2xfloat(<2 x float> %A) {2762; CHECK-LABEL: fcmordz2xfloat:2763; CHECK: // %bb.0:2764; CHECK-NEXT: fcmeq v0.2s, v0.2s, v0.2s2765; CHECK-NEXT: ret2766 %tmp3 = fcmp ord <2 x float> %A, zeroinitializer2767 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2768 ret <2 x i32> %tmp42769}2770 2771; ORD A, zero = EQ A, A2772define <4 x i32> @fcmordz4xfloat(<4 x float> %A) {2773; CHECK-LABEL: fcmordz4xfloat:2774; CHECK: // %bb.0:2775; CHECK-NEXT: fcmeq v0.4s, v0.4s, v0.4s2776; CHECK-NEXT: ret2777 %tmp3 = fcmp ord <4 x float> %A, zeroinitializer2778 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2779 ret <4 x i32> %tmp42780}2781 2782; ORD A, zero = EQ A, A2783define <2 x i64> @fcmordz2xdouble(<2 x double> %A) {2784; CHECK-LABEL: fcmordz2xdouble:2785; CHECK: // %bb.0:2786; CHECK-NEXT: fcmeq v0.2d, v0.2d, v0.2d2787; CHECK-NEXT: ret2788 %tmp3 = fcmp ord <2 x double> %A, zeroinitializer2789 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2790 ret <2 x i64> %tmp42791}2792 2793; UEQ with zero = !ONE = !(OLT |OGT)2794define <2 x i32> @fcmueqz2xfloat(<2 x float> %A) {2795; CHECK-LABEL: fcmueqz2xfloat:2796; CHECK: // %bb.0:2797; CHECK-NEXT: fcmgt v1.2s, v0.2s, #0.02798; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.02799; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b2800; CHECK-NEXT: mvn v0.8b, v0.8b2801; CHECK-NEXT: ret2802 %tmp3 = fcmp ueq <2 x float> %A, zeroinitializer2803 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2804 ret <2 x i32> %tmp42805}2806 2807; UEQ with zero = !ONE = !(OLT |OGT)2808define <4 x i32> @fcmueqz4xfloat(<4 x float> %A) {2809; CHECK-LABEL: fcmueqz4xfloat:2810; CHECK: // %bb.0:2811; CHECK-NEXT: fcmgt v1.4s, v0.4s, #0.02812; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.02813; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b2814; CHECK-NEXT: mvn v0.16b, v0.16b2815; CHECK-NEXT: ret2816 %tmp3 = fcmp ueq <4 x float> %A, zeroinitializer2817 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2818 ret <4 x i32> %tmp42819}2820 2821; UEQ with zero = !ONE = !(OLT |OGT)2822define <2 x i64> @fcmueqz2xdouble(<2 x double> %A) {2823; CHECK-LABEL: fcmueqz2xdouble:2824; CHECK: // %bb.0:2825; CHECK-NEXT: fcmgt v1.2d, v0.2d, #0.02826; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.02827; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b2828; CHECK-NEXT: mvn v0.16b, v0.16b2829; CHECK-NEXT: ret2830 %tmp3 = fcmp ueq <2 x double> %A, zeroinitializer2831 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2832 ret <2 x i64> %tmp42833}2834 2835; UGE with zero = !OLT2836define <2 x i32> @fcmugez2xfloat(<2 x float> %A) {2837; CHECK-LABEL: fcmugez2xfloat:2838; CHECK: // %bb.0:2839; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.02840; CHECK-NEXT: mvn v0.8b, v0.8b2841; CHECK-NEXT: ret2842 %tmp3 = fcmp uge <2 x float> %A, zeroinitializer2843 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2844 ret <2 x i32> %tmp42845}2846 2847; UGE with zero = !OLT2848define <4 x i32> @fcmugez4xfloat(<4 x float> %A) {2849; CHECK-LABEL: fcmugez4xfloat:2850; CHECK: // %bb.0:2851; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.02852; CHECK-NEXT: mvn v0.16b, v0.16b2853; CHECK-NEXT: ret2854 %tmp3 = fcmp uge <4 x float> %A, zeroinitializer2855 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2856 ret <4 x i32> %tmp42857}2858 2859; UGE with zero = !OLT2860define <2 x i64> @fcmugez2xdouble(<2 x double> %A) {2861; CHECK-LABEL: fcmugez2xdouble:2862; CHECK: // %bb.0:2863; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.02864; CHECK-NEXT: mvn v0.16b, v0.16b2865; CHECK-NEXT: ret2866 %tmp3 = fcmp uge <2 x double> %A, zeroinitializer2867 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2868 ret <2 x i64> %tmp42869}2870 2871; UGT with zero = !OLE2872define <2 x i32> @fcmugtz2xfloat(<2 x float> %A) {2873; CHECK-LABEL: fcmugtz2xfloat:2874; CHECK: // %bb.0:2875; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.02876; CHECK-NEXT: mvn v0.8b, v0.8b2877; CHECK-NEXT: ret2878 %tmp3 = fcmp ugt <2 x float> %A, zeroinitializer2879 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2880 ret <2 x i32> %tmp42881}2882 2883; UGT with zero = !OLE2884define <4 x i32> @fcmugtz4xfloat(<4 x float> %A) {2885; CHECK-LABEL: fcmugtz4xfloat:2886; CHECK: // %bb.0:2887; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.02888; CHECK-NEXT: mvn v0.16b, v0.16b2889; CHECK-NEXT: ret2890 %tmp3 = fcmp ugt <4 x float> %A, zeroinitializer2891 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2892 ret <4 x i32> %tmp42893}2894 2895; UGT with zero = !OLE2896define <2 x i64> @fcmugtz2xdouble(<2 x double> %A) {2897; CHECK-LABEL: fcmugtz2xdouble:2898; CHECK: // %bb.0:2899; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.02900; CHECK-NEXT: mvn v0.16b, v0.16b2901; CHECK-NEXT: ret2902 %tmp3 = fcmp ugt <2 x double> %A, zeroinitializer2903 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2904 ret <2 x i64> %tmp42905}2906 2907; ULT with zero = !OGE2908define <2 x i32> @fcmultz2xfloat(<2 x float> %A) {2909; CHECK-LABEL: fcmultz2xfloat:2910; CHECK: // %bb.0:2911; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.02912; CHECK-NEXT: mvn v0.8b, v0.8b2913; CHECK-NEXT: ret2914 %tmp3 = fcmp ult <2 x float> %A, zeroinitializer2915 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2916 ret <2 x i32> %tmp42917}2918 2919define <4 x i32> @fcmultz4xfloat(<4 x float> %A) {2920; CHECK-LABEL: fcmultz4xfloat:2921; CHECK: // %bb.0:2922; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.02923; CHECK-NEXT: mvn v0.16b, v0.16b2924; CHECK-NEXT: ret2925 %tmp3 = fcmp ult <4 x float> %A, zeroinitializer2926 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2927 ret <4 x i32> %tmp42928}2929 2930define <2 x i64> @fcmultz2xdouble(<2 x double> %A) {2931; CHECK-LABEL: fcmultz2xdouble:2932; CHECK: // %bb.0:2933; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.02934; CHECK-NEXT: mvn v0.16b, v0.16b2935; CHECK-NEXT: ret2936 %tmp3 = fcmp ult <2 x double> %A, zeroinitializer2937 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2938 ret <2 x i64> %tmp42939}2940 2941; ULE with zero = !OGT2942define <2 x i32> @fcmulez2xfloat(<2 x float> %A) {2943; CHECK-LABEL: fcmulez2xfloat:2944; CHECK: // %bb.0:2945; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.02946; CHECK-NEXT: mvn v0.8b, v0.8b2947; CHECK-NEXT: ret2948 %tmp3 = fcmp ule <2 x float> %A, zeroinitializer2949 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2950 ret <2 x i32> %tmp42951}2952 2953; ULE with zero = !OGT2954define <4 x i32> @fcmulez4xfloat(<4 x float> %A) {2955; CHECK-LABEL: fcmulez4xfloat:2956; CHECK: // %bb.0:2957; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.02958; CHECK-NEXT: mvn v0.16b, v0.16b2959; CHECK-NEXT: ret2960 %tmp3 = fcmp ule <4 x float> %A, zeroinitializer2961 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2962 ret <4 x i32> %tmp42963}2964 2965; ULE with zero = !OGT2966define <2 x i64> @fcmulez2xdouble(<2 x double> %A) {2967; CHECK-LABEL: fcmulez2xdouble:2968; CHECK: // %bb.0:2969; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.02970; CHECK-NEXT: mvn v0.16b, v0.16b2971; CHECK-NEXT: ret2972 %tmp3 = fcmp ule <2 x double> %A, zeroinitializer2973 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>2974 ret <2 x i64> %tmp42975}2976 2977; UNE with zero = !OEQ with zero2978define <2 x i32> @fcmunez2xfloat(<2 x float> %A) {2979; CHECK-LABEL: fcmunez2xfloat:2980; CHECK: // %bb.0:2981; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.02982; CHECK-NEXT: mvn v0.8b, v0.8b2983; CHECK-NEXT: ret2984 %tmp3 = fcmp une <2 x float> %A, zeroinitializer2985 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>2986 ret <2 x i32> %tmp42987}2988 2989; UNE with zero = !OEQ with zero2990define <4 x i32> @fcmunez4xfloat(<4 x float> %A) {2991; CHECK-LABEL: fcmunez4xfloat:2992; CHECK: // %bb.0:2993; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.02994; CHECK-NEXT: mvn v0.16b, v0.16b2995; CHECK-NEXT: ret2996 %tmp3 = fcmp une <4 x float> %A, zeroinitializer2997 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>2998 ret <4 x i32> %tmp42999}3000 3001; UNE with zero = !OEQ with zero3002define <2 x i64> @fcmunez2xdouble(<2 x double> %A) {3003; CHECK-LABEL: fcmunez2xdouble:3004; CHECK: // %bb.0:3005; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.03006; CHECK-NEXT: mvn v0.16b, v0.16b3007; CHECK-NEXT: ret3008 %tmp3 = fcmp une <2 x double> %A, zeroinitializer3009 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3010 ret <2 x i64> %tmp43011}3012 3013; UNO A, zero = !(ORD A, zero) = !(EQ A, A)3014define <2 x i32> @fcmunoz2xfloat(<2 x float> %A) {3015; CHECK-LABEL: fcmunoz2xfloat:3016; CHECK: // %bb.0:3017; CHECK-NEXT: fcmeq v0.2s, v0.2s, v0.2s3018; CHECK-NEXT: mvn v0.8b, v0.8b3019; CHECK-NEXT: ret3020 %tmp3 = fcmp uno <2 x float> %A, zeroinitializer3021 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3022 ret <2 x i32> %tmp43023}3024 3025; UNO A, zero = !(ORD A, zero) = !(EQ A, A)3026define <4 x i32> @fcmunoz4xfloat(<4 x float> %A) {3027; CHECK-LABEL: fcmunoz4xfloat:3028; CHECK: // %bb.0:3029; CHECK-NEXT: fcmeq v0.4s, v0.4s, v0.4s3030; CHECK-NEXT: mvn v0.16b, v0.16b3031; CHECK-NEXT: ret3032 %tmp3 = fcmp uno <4 x float> %A, zeroinitializer3033 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3034 ret <4 x i32> %tmp43035}3036 3037; UNO A, zero = !(ORD A, zero) = !(EQ A, A)3038define <2 x i64> @fcmunoz2xdouble(<2 x double> %A) {3039; CHECK-LABEL: fcmunoz2xdouble:3040; CHECK: // %bb.0:3041; CHECK-NEXT: fcmeq v0.2d, v0.2d, v0.2d3042; CHECK-NEXT: mvn v0.16b, v0.16b3043; CHECK-NEXT: ret3044 %tmp3 = fcmp uno <2 x double> %A, zeroinitializer3045 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3046 ret <2 x i64> %tmp43047 3048}3049 3050define <2 x i32> @fcmoeq2xfloat_fast(<2 x float> %A, <2 x float> %B) {3051; CHECK-LABEL: fcmoeq2xfloat_fast:3052; CHECK: // %bb.0:3053; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s3054; CHECK-NEXT: ret3055 %tmp3 = fcmp fast oeq <2 x float> %A, %B3056 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3057 ret <2 x i32> %tmp43058}3059 3060define <4 x i32> @fcmoeq4xfloat_fast(<4 x float> %A, <4 x float> %B) {3061; CHECK-LABEL: fcmoeq4xfloat_fast:3062; CHECK: // %bb.0:3063; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s3064; CHECK-NEXT: ret3065 %tmp3 = fcmp fast oeq <4 x float> %A, %B3066 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3067 ret <4 x i32> %tmp43068}3069define <2 x i64> @fcmoeq2xdouble_fast(<2 x double> %A, <2 x double> %B) {3070; CHECK-LABEL: fcmoeq2xdouble_fast:3071; CHECK: // %bb.0:3072; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d3073; CHECK-NEXT: ret3074 %tmp3 = fcmp fast oeq <2 x double> %A, %B3075 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3076 ret <2 x i64> %tmp43077}3078 3079define <2 x i32> @fcmoge2xfloat_fast(<2 x float> %A, <2 x float> %B) {3080; CHECK-LABEL: fcmoge2xfloat_fast:3081; CHECK: // %bb.0:3082; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s3083; CHECK-NEXT: ret3084 %tmp3 = fcmp fast oge <2 x float> %A, %B3085 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3086 ret <2 x i32> %tmp43087}3088 3089define <4 x i32> @fcmoge4xfloat_fast(<4 x float> %A, <4 x float> %B) {3090; CHECK-LABEL: fcmoge4xfloat_fast:3091; CHECK: // %bb.0:3092; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s3093; CHECK-NEXT: ret3094 %tmp3 = fcmp fast oge <4 x float> %A, %B3095 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3096 ret <4 x i32> %tmp43097}3098define <2 x i64> @fcmoge2xdouble_fast(<2 x double> %A, <2 x double> %B) {3099; CHECK-LABEL: fcmoge2xdouble_fast:3100; CHECK: // %bb.0:3101; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d3102; CHECK-NEXT: ret3103 %tmp3 = fcmp fast oge <2 x double> %A, %B3104 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3105 ret <2 x i64> %tmp43106}3107 3108define <2 x i32> @fcmogt2xfloat_fast(<2 x float> %A, <2 x float> %B) {3109; CHECK-LABEL: fcmogt2xfloat_fast:3110; CHECK: // %bb.0:3111; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s3112; CHECK-NEXT: ret3113 %tmp3 = fcmp fast ogt <2 x float> %A, %B3114 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3115 ret <2 x i32> %tmp43116}3117 3118define <4 x i32> @fcmogt4xfloat_fast(<4 x float> %A, <4 x float> %B) {3119; CHECK-LABEL: fcmogt4xfloat_fast:3120; CHECK: // %bb.0:3121; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s3122; CHECK-NEXT: ret3123 %tmp3 = fcmp fast ogt <4 x float> %A, %B3124 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3125 ret <4 x i32> %tmp43126}3127define <2 x i64> @fcmogt2xdouble_fast(<2 x double> %A, <2 x double> %B) {3128; CHECK-LABEL: fcmogt2xdouble_fast:3129; CHECK: // %bb.0:3130; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d3131; CHECK-NEXT: ret3132 %tmp3 = fcmp fast ogt <2 x double> %A, %B3133 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3134 ret <2 x i64> %tmp43135}3136 3137define <2 x i32> @fcmole2xfloat_fast(<2 x float> %A, <2 x float> %B) {3138; CHECK-LABEL: fcmole2xfloat_fast:3139; CHECK: // %bb.0:3140; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s3141; CHECK-NEXT: ret3142 %tmp3 = fcmp fast ole <2 x float> %A, %B3143 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3144 ret <2 x i32> %tmp43145}3146 3147define <4 x i32> @fcmole4xfloat_fast(<4 x float> %A, <4 x float> %B) {3148; CHECK-LABEL: fcmole4xfloat_fast:3149; CHECK: // %bb.0:3150; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s3151; CHECK-NEXT: ret3152 %tmp3 = fcmp fast ole <4 x float> %A, %B3153 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3154 ret <4 x i32> %tmp43155}3156 3157define <2 x i64> @fcmole2xdouble_fast(<2 x double> %A, <2 x double> %B) {3158; CHECK-LABEL: fcmole2xdouble_fast:3159; CHECK: // %bb.0:3160; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d3161; CHECK-NEXT: ret3162 %tmp3 = fcmp fast ole <2 x double> %A, %B3163 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3164 ret <2 x i64> %tmp43165}3166 3167define <2 x i32> @fcmolt2xfloat_fast(<2 x float> %A, <2 x float> %B) {3168; CHECK-LABEL: fcmolt2xfloat_fast:3169; CHECK: // %bb.0:3170; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s3171; CHECK-NEXT: ret3172 %tmp3 = fcmp fast olt <2 x float> %A, %B3173 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3174 ret <2 x i32> %tmp43175}3176 3177define <4 x i32> @fcmolt4xfloat_fast(<4 x float> %A, <4 x float> %B) {3178; CHECK-LABEL: fcmolt4xfloat_fast:3179; CHECK: // %bb.0:3180; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s3181; CHECK-NEXT: ret3182 %tmp3 = fcmp fast olt <4 x float> %A, %B3183 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3184 ret <4 x i32> %tmp43185}3186 3187define <2 x i64> @fcmolt2xdouble_fast(<2 x double> %A, <2 x double> %B) {3188; CHECK-LABEL: fcmolt2xdouble_fast:3189; CHECK: // %bb.0:3190; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d3191; CHECK-NEXT: ret3192 %tmp3 = fcmp fast olt <2 x double> %A, %B3193 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3194 ret <2 x i64> %tmp43195}3196 3197define <2 x i32> @fcmone2xfloat_fast(<2 x float> %A, <2 x float> %B) {3198; CHECK-SD-LABEL: fcmone2xfloat_fast:3199; CHECK-SD: // %bb.0:3200; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, v1.2s3201; CHECK-SD-NEXT: mvn v0.8b, v0.8b3202; CHECK-SD-NEXT: ret3203;3204; CHECK-GI-LABEL: fcmone2xfloat_fast:3205; CHECK-GI: // %bb.0:3206; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s3207; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s3208; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b3209; CHECK-GI-NEXT: ret3210 %tmp3 = fcmp fast one <2 x float> %A, %B3211 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3212 ret <2 x i32> %tmp43213}3214 3215define <4 x i32> @fcmone4xfloat_fast(<4 x float> %A, <4 x float> %B) {3216; CHECK-SD-LABEL: fcmone4xfloat_fast:3217; CHECK-SD: // %bb.0:3218; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v1.4s3219; CHECK-SD-NEXT: mvn v0.16b, v0.16b3220; CHECK-SD-NEXT: ret3221;3222; CHECK-GI-LABEL: fcmone4xfloat_fast:3223; CHECK-GI: // %bb.0:3224; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s3225; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s3226; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b3227; CHECK-GI-NEXT: ret3228 %tmp3 = fcmp fast one <4 x float> %A, %B3229 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3230 ret <4 x i32> %tmp43231}3232 3233define <2 x i64> @fcmone2xdouble_fast(<2 x double> %A, <2 x double> %B) {3234; CHECK-SD-LABEL: fcmone2xdouble_fast:3235; CHECK-SD: // %bb.0:3236; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v1.2d3237; CHECK-SD-NEXT: mvn v0.16b, v0.16b3238; CHECK-SD-NEXT: ret3239;3240; CHECK-GI-LABEL: fcmone2xdouble_fast:3241; CHECK-GI: // %bb.0:3242; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d3243; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d3244; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b3245; CHECK-GI-NEXT: ret3246 %tmp3 = fcmp fast one <2 x double> %A, %B3247 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3248 ret <2 x i64> %tmp43249}3250 3251define <2 x i32> @fcmord2xfloat_fast(<2 x float> %A, <2 x float> %B) {3252; CHECK-LABEL: fcmord2xfloat_fast:3253; CHECK: // %bb.0:3254; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s3255; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s3256; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b3257; CHECK-NEXT: ret3258 %tmp3 = fcmp fast ord <2 x float> %A, %B3259 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3260 ret <2 x i32> %tmp43261}3262 3263define <4 x i32> @fcmord4xfloat_fast(<4 x float> %A, <4 x float> %B) {3264; CHECK-LABEL: fcmord4xfloat_fast:3265; CHECK: // %bb.0:3266; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s3267; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s3268; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b3269; CHECK-NEXT: ret3270 %tmp3 = fcmp fast ord <4 x float> %A, %B3271 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3272 ret <4 x i32> %tmp43273}3274 3275define <2 x i64> @fcmord2xdouble_fast(<2 x double> %A, <2 x double> %B) {3276; CHECK-LABEL: fcmord2xdouble_fast:3277; CHECK: // %bb.0:3278; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d3279; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d3280; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b3281; CHECK-NEXT: ret3282 %tmp3 = fcmp fast ord <2 x double> %A, %B3283 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3284 ret <2 x i64> %tmp43285}3286 3287 3288define <2 x i32> @fcmuno2xfloat_fast(<2 x float> %A, <2 x float> %B) {3289; CHECK-LABEL: fcmuno2xfloat_fast:3290; CHECK: // %bb.0:3291; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s3292; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s3293; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b3294; CHECK-NEXT: mvn v0.8b, v0.8b3295; CHECK-NEXT: ret3296 %tmp3 = fcmp fast uno <2 x float> %A, %B3297 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3298 ret <2 x i32> %tmp43299}3300 3301define <4 x i32> @fcmuno4xfloat_fast(<4 x float> %A, <4 x float> %B) {3302; CHECK-LABEL: fcmuno4xfloat_fast:3303; CHECK: // %bb.0:3304; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s3305; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s3306; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b3307; CHECK-NEXT: mvn v0.16b, v0.16b3308; CHECK-NEXT: ret3309 %tmp3 = fcmp fast uno <4 x float> %A, %B3310 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3311 ret <4 x i32> %tmp43312}3313 3314define <2 x i64> @fcmuno2xdouble_fast(<2 x double> %A, <2 x double> %B) {3315; CHECK-LABEL: fcmuno2xdouble_fast:3316; CHECK: // %bb.0:3317; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d3318; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d3319; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b3320; CHECK-NEXT: mvn v0.16b, v0.16b3321; CHECK-NEXT: ret3322 %tmp3 = fcmp fast uno <2 x double> %A, %B3323 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3324 ret <2 x i64> %tmp43325}3326 3327define <2 x i32> @fcmueq2xfloat_fast(<2 x float> %A, <2 x float> %B) {3328; CHECK-SD-LABEL: fcmueq2xfloat_fast:3329; CHECK-SD: // %bb.0:3330; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, v1.2s3331; CHECK-SD-NEXT: ret3332;3333; CHECK-GI-LABEL: fcmueq2xfloat_fast:3334; CHECK-GI: // %bb.0:3335; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s3336; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s3337; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b3338; CHECK-GI-NEXT: mvn v0.8b, v0.8b3339; CHECK-GI-NEXT: ret3340 %tmp3 = fcmp fast ueq <2 x float> %A, %B3341 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3342 ret <2 x i32> %tmp43343}3344 3345define <4 x i32> @fcmueq4xfloat_fast(<4 x float> %A, <4 x float> %B) {3346; CHECK-SD-LABEL: fcmueq4xfloat_fast:3347; CHECK-SD: // %bb.0:3348; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v1.4s3349; CHECK-SD-NEXT: ret3350;3351; CHECK-GI-LABEL: fcmueq4xfloat_fast:3352; CHECK-GI: // %bb.0:3353; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s3354; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s3355; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b3356; CHECK-GI-NEXT: mvn v0.16b, v0.16b3357; CHECK-GI-NEXT: ret3358 %tmp3 = fcmp fast ueq <4 x float> %A, %B3359 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3360 ret <4 x i32> %tmp43361}3362 3363define <2 x i64> @fcmueq2xdouble_fast(<2 x double> %A, <2 x double> %B) {3364; CHECK-SD-LABEL: fcmueq2xdouble_fast:3365; CHECK-SD: // %bb.0:3366; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v1.2d3367; CHECK-SD-NEXT: ret3368;3369; CHECK-GI-LABEL: fcmueq2xdouble_fast:3370; CHECK-GI: // %bb.0:3371; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d3372; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d3373; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b3374; CHECK-GI-NEXT: mvn v0.16b, v0.16b3375; CHECK-GI-NEXT: ret3376 %tmp3 = fcmp fast ueq <2 x double> %A, %B3377 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3378 ret <2 x i64> %tmp43379}3380 3381define <2 x i32> @fcmuge2xfloat_fast(<2 x float> %A, <2 x float> %B) {3382; CHECK-SD-LABEL: fcmuge2xfloat_fast:3383; CHECK-SD: // %bb.0:3384; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, v1.2s3385; CHECK-SD-NEXT: ret3386;3387; CHECK-GI-LABEL: fcmuge2xfloat_fast:3388; CHECK-GI: // %bb.0:3389; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s3390; CHECK-GI-NEXT: mvn v0.8b, v0.8b3391; CHECK-GI-NEXT: ret3392 %tmp3 = fcmp fast uge <2 x float> %A, %B3393 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3394 ret <2 x i32> %tmp43395}3396 3397define <4 x i32> @fcmuge4xfloat_fast(<4 x float> %A, <4 x float> %B) {3398; CHECK-SD-LABEL: fcmuge4xfloat_fast:3399; CHECK-SD: // %bb.0:3400; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, v1.4s3401; CHECK-SD-NEXT: ret3402;3403; CHECK-GI-LABEL: fcmuge4xfloat_fast:3404; CHECK-GI: // %bb.0:3405; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s3406; CHECK-GI-NEXT: mvn v0.16b, v0.16b3407; CHECK-GI-NEXT: ret3408 %tmp3 = fcmp fast uge <4 x float> %A, %B3409 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3410 ret <4 x i32> %tmp43411}3412 3413define <2 x i64> @fcmuge2xdouble_fast(<2 x double> %A, <2 x double> %B) {3414; CHECK-SD-LABEL: fcmuge2xdouble_fast:3415; CHECK-SD: // %bb.0:3416; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, v1.2d3417; CHECK-SD-NEXT: ret3418;3419; CHECK-GI-LABEL: fcmuge2xdouble_fast:3420; CHECK-GI: // %bb.0:3421; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d3422; CHECK-GI-NEXT: mvn v0.16b, v0.16b3423; CHECK-GI-NEXT: ret3424 %tmp3 = fcmp fast uge <2 x double> %A, %B3425 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3426 ret <2 x i64> %tmp43427}3428 3429define <2 x i32> @fcmugt2xfloat_fast(<2 x float> %A, <2 x float> %B) {3430; CHECK-SD-LABEL: fcmugt2xfloat_fast:3431; CHECK-SD: // %bb.0:3432; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, v1.2s3433; CHECK-SD-NEXT: ret3434;3435; CHECK-GI-LABEL: fcmugt2xfloat_fast:3436; CHECK-GI: // %bb.0:3437; CHECK-GI-NEXT: fcmge v0.2s, v1.2s, v0.2s3438; CHECK-GI-NEXT: mvn v0.8b, v0.8b3439; CHECK-GI-NEXT: ret3440 %tmp3 = fcmp fast ugt <2 x float> %A, %B3441 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3442 ret <2 x i32> %tmp43443}3444 3445define <4 x i32> @fcmugt4xfloat_fast(<4 x float> %A, <4 x float> %B) {3446; CHECK-SD-LABEL: fcmugt4xfloat_fast:3447; CHECK-SD: // %bb.0:3448; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, v1.4s3449; CHECK-SD-NEXT: ret3450;3451; CHECK-GI-LABEL: fcmugt4xfloat_fast:3452; CHECK-GI: // %bb.0:3453; CHECK-GI-NEXT: fcmge v0.4s, v1.4s, v0.4s3454; CHECK-GI-NEXT: mvn v0.16b, v0.16b3455; CHECK-GI-NEXT: ret3456 %tmp3 = fcmp fast ugt <4 x float> %A, %B3457 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3458 ret <4 x i32> %tmp43459}3460 3461define <2 x i64> @fcmugt2xdouble_fast(<2 x double> %A, <2 x double> %B) {3462; CHECK-SD-LABEL: fcmugt2xdouble_fast:3463; CHECK-SD: // %bb.0:3464; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, v1.2d3465; CHECK-SD-NEXT: ret3466;3467; CHECK-GI-LABEL: fcmugt2xdouble_fast:3468; CHECK-GI: // %bb.0:3469; CHECK-GI-NEXT: fcmge v0.2d, v1.2d, v0.2d3470; CHECK-GI-NEXT: mvn v0.16b, v0.16b3471; CHECK-GI-NEXT: ret3472 %tmp3 = fcmp fast ugt <2 x double> %A, %B3473 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3474 ret <2 x i64> %tmp43475}3476 3477define <2 x i32> @fcmule2xfloat_fast(<2 x float> %A, <2 x float> %B) {3478; CHECK-SD-LABEL: fcmule2xfloat_fast:3479; CHECK-SD: // %bb.0:3480; CHECK-SD-NEXT: fcmge v0.2s, v1.2s, v0.2s3481; CHECK-SD-NEXT: ret3482;3483; CHECK-GI-LABEL: fcmule2xfloat_fast:3484; CHECK-GI: // %bb.0:3485; CHECK-GI-NEXT: fcmgt v0.2s, v0.2s, v1.2s3486; CHECK-GI-NEXT: mvn v0.8b, v0.8b3487; CHECK-GI-NEXT: ret3488 %tmp3 = fcmp fast ule <2 x float> %A, %B3489 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3490 ret <2 x i32> %tmp43491}3492 3493define <4 x i32> @fcmule4xfloat_fast(<4 x float> %A, <4 x float> %B) {3494; CHECK-SD-LABEL: fcmule4xfloat_fast:3495; CHECK-SD: // %bb.0:3496; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s3497; CHECK-SD-NEXT: ret3498;3499; CHECK-GI-LABEL: fcmule4xfloat_fast:3500; CHECK-GI: // %bb.0:3501; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s3502; CHECK-GI-NEXT: mvn v0.16b, v0.16b3503; CHECK-GI-NEXT: ret3504 %tmp3 = fcmp fast ule <4 x float> %A, %B3505 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3506 ret <4 x i32> %tmp43507}3508 3509define <2 x i64> @fcmule2xdouble_fast(<2 x double> %A, <2 x double> %B) {3510; CHECK-SD-LABEL: fcmule2xdouble_fast:3511; CHECK-SD: // %bb.0:3512; CHECK-SD-NEXT: fcmge v0.2d, v1.2d, v0.2d3513; CHECK-SD-NEXT: ret3514;3515; CHECK-GI-LABEL: fcmule2xdouble_fast:3516; CHECK-GI: // %bb.0:3517; CHECK-GI-NEXT: fcmgt v0.2d, v0.2d, v1.2d3518; CHECK-GI-NEXT: mvn v0.16b, v0.16b3519; CHECK-GI-NEXT: ret3520 %tmp3 = fcmp fast ule <2 x double> %A, %B3521 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3522 ret <2 x i64> %tmp43523}3524 3525define <2 x i32> @fcmult2xfloat_fast(<2 x float> %A, <2 x float> %B) {3526; CHECK-SD-LABEL: fcmult2xfloat_fast:3527; CHECK-SD: // %bb.0:3528; CHECK-SD-NEXT: fcmgt v0.2s, v1.2s, v0.2s3529; CHECK-SD-NEXT: ret3530;3531; CHECK-GI-LABEL: fcmult2xfloat_fast:3532; CHECK-GI: // %bb.0:3533; CHECK-GI-NEXT: fcmge v0.2s, v0.2s, v1.2s3534; CHECK-GI-NEXT: mvn v0.8b, v0.8b3535; CHECK-GI-NEXT: ret3536 %tmp3 = fcmp fast ult <2 x float> %A, %B3537 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3538 ret <2 x i32> %tmp43539}3540 3541define <4 x i32> @fcmult4xfloat_fast(<4 x float> %A, <4 x float> %B) {3542; CHECK-SD-LABEL: fcmult4xfloat_fast:3543; CHECK-SD: // %bb.0:3544; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s3545; CHECK-SD-NEXT: ret3546;3547; CHECK-GI-LABEL: fcmult4xfloat_fast:3548; CHECK-GI: // %bb.0:3549; CHECK-GI-NEXT: fcmge v0.4s, v0.4s, v1.4s3550; CHECK-GI-NEXT: mvn v0.16b, v0.16b3551; CHECK-GI-NEXT: ret3552 %tmp3 = fcmp fast ult <4 x float> %A, %B3553 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3554 ret <4 x i32> %tmp43555}3556 3557define <2 x i64> @fcmult2xdouble_fast(<2 x double> %A, <2 x double> %B) {3558; CHECK-SD-LABEL: fcmult2xdouble_fast:3559; CHECK-SD: // %bb.0:3560; CHECK-SD-NEXT: fcmgt v0.2d, v1.2d, v0.2d3561; CHECK-SD-NEXT: ret3562;3563; CHECK-GI-LABEL: fcmult2xdouble_fast:3564; CHECK-GI: // %bb.0:3565; CHECK-GI-NEXT: fcmge v0.2d, v0.2d, v1.2d3566; CHECK-GI-NEXT: mvn v0.16b, v0.16b3567; CHECK-GI-NEXT: ret3568 %tmp3 = fcmp fast ult <2 x double> %A, %B3569 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3570 ret <2 x i64> %tmp43571}3572 3573define <2 x i32> @fcmune2xfloat_fast(<2 x float> %A, <2 x float> %B) {3574; CHECK-LABEL: fcmune2xfloat_fast:3575; CHECK: // %bb.0:3576; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s3577; CHECK-NEXT: mvn v0.8b, v0.8b3578; CHECK-NEXT: ret3579 %tmp3 = fcmp fast une <2 x float> %A, %B3580 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3581 ret <2 x i32> %tmp43582}3583 3584define <4 x i32> @fcmune4xfloat_fast(<4 x float> %A, <4 x float> %B) {3585; CHECK-LABEL: fcmune4xfloat_fast:3586; CHECK: // %bb.0:3587; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s3588; CHECK-NEXT: mvn v0.16b, v0.16b3589; CHECK-NEXT: ret3590 %tmp3 = fcmp fast une <4 x float> %A, %B3591 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3592 ret <4 x i32> %tmp43593}3594 3595define <2 x i64> @fcmune2xdouble_fast(<2 x double> %A, <2 x double> %B) {3596; CHECK-LABEL: fcmune2xdouble_fast:3597; CHECK: // %bb.0:3598; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d3599; CHECK-NEXT: mvn v0.16b, v0.16b3600; CHECK-NEXT: ret3601 %tmp3 = fcmp fast une <2 x double> %A, %B3602 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3603 ret <2 x i64> %tmp43604}3605 3606define <2 x i32> @fcmoeqz2xfloat_fast(<2 x float> %A) {3607; CHECK-LABEL: fcmoeqz2xfloat_fast:3608; CHECK: // %bb.0:3609; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.03610; CHECK-NEXT: ret3611 %tmp3 = fcmp fast oeq <2 x float> %A, zeroinitializer3612 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3613 ret <2 x i32> %tmp43614}3615 3616define <4 x i32> @fcmoeqz4xfloat_fast(<4 x float> %A) {3617; CHECK-LABEL: fcmoeqz4xfloat_fast:3618; CHECK: // %bb.0:3619; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.03620; CHECK-NEXT: ret3621 %tmp3 = fcmp fast oeq <4 x float> %A, zeroinitializer3622 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3623 ret <4 x i32> %tmp43624}3625define <2 x i64> @fcmoeqz2xdouble_fast(<2 x double> %A) {3626; CHECK-LABEL: fcmoeqz2xdouble_fast:3627; CHECK: // %bb.0:3628; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.03629; CHECK-NEXT: ret3630 %tmp3 = fcmp fast oeq <2 x double> %A, zeroinitializer3631 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3632 ret <2 x i64> %tmp43633}3634 3635 3636define <2 x i32> @fcmogez2xfloat_fast(<2 x float> %A) {3637; CHECK-LABEL: fcmogez2xfloat_fast:3638; CHECK: // %bb.0:3639; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.03640; CHECK-NEXT: ret3641 %tmp3 = fcmp fast oge <2 x float> %A, zeroinitializer3642 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3643 ret <2 x i32> %tmp43644}3645 3646define <4 x i32> @fcmogez4xfloat_fast(<4 x float> %A) {3647; CHECK-LABEL: fcmogez4xfloat_fast:3648; CHECK: // %bb.0:3649; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.03650; CHECK-NEXT: ret3651 %tmp3 = fcmp fast oge <4 x float> %A, zeroinitializer3652 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3653 ret <4 x i32> %tmp43654}3655define <2 x i64> @fcmogez2xdouble_fast(<2 x double> %A) {3656; CHECK-LABEL: fcmogez2xdouble_fast:3657; CHECK: // %bb.0:3658; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.03659; CHECK-NEXT: ret3660 %tmp3 = fcmp fast oge <2 x double> %A, zeroinitializer3661 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3662 ret <2 x i64> %tmp43663}3664 3665define <2 x i32> @fcmogtz2xfloat_fast(<2 x float> %A) {3666; CHECK-LABEL: fcmogtz2xfloat_fast:3667; CHECK: // %bb.0:3668; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.03669; CHECK-NEXT: ret3670 %tmp3 = fcmp fast ogt <2 x float> %A, zeroinitializer3671 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3672 ret <2 x i32> %tmp43673}3674 3675define <4 x i32> @fcmogtz4xfloat_fast(<4 x float> %A) {3676; CHECK-LABEL: fcmogtz4xfloat_fast:3677; CHECK: // %bb.0:3678; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.03679; CHECK-NEXT: ret3680 %tmp3 = fcmp fast ogt <4 x float> %A, zeroinitializer3681 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3682 ret <4 x i32> %tmp43683}3684define <2 x i64> @fcmogtz2xdouble_fast(<2 x double> %A) {3685; CHECK-LABEL: fcmogtz2xdouble_fast:3686; CHECK: // %bb.0:3687; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.03688; CHECK-NEXT: ret3689 %tmp3 = fcmp fast ogt <2 x double> %A, zeroinitializer3690 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3691 ret <2 x i64> %tmp43692}3693 3694define <2 x i32> @fcmoltz2xfloat_fast(<2 x float> %A) {3695; CHECK-LABEL: fcmoltz2xfloat_fast:3696; CHECK: // %bb.0:3697; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.03698; CHECK-NEXT: ret3699 %tmp3 = fcmp fast olt <2 x float> %A, zeroinitializer3700 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3701 ret <2 x i32> %tmp43702}3703 3704define <4 x i32> @fcmoltz4xfloat_fast(<4 x float> %A) {3705; CHECK-LABEL: fcmoltz4xfloat_fast:3706; CHECK: // %bb.0:3707; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.03708; CHECK-NEXT: ret3709 %tmp3 = fcmp fast olt <4 x float> %A, zeroinitializer3710 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3711 ret <4 x i32> %tmp43712}3713 3714define <2 x i64> @fcmoltz2xdouble_fast(<2 x double> %A) {3715; CHECK-LABEL: fcmoltz2xdouble_fast:3716; CHECK: // %bb.0:3717; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.03718; CHECK-NEXT: ret3719 %tmp3 = fcmp fast olt <2 x double> %A, zeroinitializer3720 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3721 ret <2 x i64> %tmp43722}3723 3724define <2 x i32> @fcmolez2xfloat_fast(<2 x float> %A) {3725; CHECK-LABEL: fcmolez2xfloat_fast:3726; CHECK: // %bb.0:3727; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.03728; CHECK-NEXT: ret3729 %tmp3 = fcmp fast ole <2 x float> %A, zeroinitializer3730 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3731 ret <2 x i32> %tmp43732}3733 3734define <4 x i32> @fcmolez4xfloat_fast(<4 x float> %A) {3735; CHECK-LABEL: fcmolez4xfloat_fast:3736; CHECK: // %bb.0:3737; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.03738; CHECK-NEXT: ret3739 %tmp3 = fcmp fast ole <4 x float> %A, zeroinitializer3740 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3741 ret <4 x i32> %tmp43742}3743 3744define <2 x i64> @fcmolez2xdouble_fast(<2 x double> %A) {3745; CHECK-LABEL: fcmolez2xdouble_fast:3746; CHECK: // %bb.0:3747; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.03748; CHECK-NEXT: ret3749 %tmp3 = fcmp fast ole <2 x double> %A, zeroinitializer3750 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3751 ret <2 x i64> %tmp43752}3753 3754define <2 x i32> @fcmonez2xfloat_fast(<2 x float> %A) {3755; CHECK-SD-LABEL: fcmonez2xfloat_fast:3756; CHECK-SD: // %bb.0:3757; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, #0.03758; CHECK-SD-NEXT: mvn v0.8b, v0.8b3759; CHECK-SD-NEXT: ret3760;3761; CHECK-GI-LABEL: fcmonez2xfloat_fast:3762; CHECK-GI: // %bb.0:3763; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.03764; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.03765; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b3766; CHECK-GI-NEXT: ret3767 %tmp3 = fcmp fast one <2 x float> %A, zeroinitializer3768 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3769 ret <2 x i32> %tmp43770}3771 3772define <4 x i32> @fcmonez4xfloat_fast(<4 x float> %A) {3773; CHECK-SD-LABEL: fcmonez4xfloat_fast:3774; CHECK-SD: // %bb.0:3775; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, #0.03776; CHECK-SD-NEXT: mvn v0.16b, v0.16b3777; CHECK-SD-NEXT: ret3778;3779; CHECK-GI-LABEL: fcmonez4xfloat_fast:3780; CHECK-GI: // %bb.0:3781; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.03782; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.03783; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b3784; CHECK-GI-NEXT: ret3785 %tmp3 = fcmp fast one <4 x float> %A, zeroinitializer3786 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3787 ret <4 x i32> %tmp43788}3789 3790define <2 x i64> @fcmonez2xdouble_fast(<2 x double> %A) {3791; CHECK-SD-LABEL: fcmonez2xdouble_fast:3792; CHECK-SD: // %bb.0:3793; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, #0.03794; CHECK-SD-NEXT: mvn v0.16b, v0.16b3795; CHECK-SD-NEXT: ret3796;3797; CHECK-GI-LABEL: fcmonez2xdouble_fast:3798; CHECK-GI: // %bb.0:3799; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.03800; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.03801; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b3802; CHECK-GI-NEXT: ret3803 %tmp3 = fcmp fast one <2 x double> %A, zeroinitializer3804 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3805 ret <2 x i64> %tmp43806}3807 3808define <2 x i32> @fcmordz2xfloat_fast(<2 x float> %A) {3809; CHECK-LABEL: fcmordz2xfloat_fast:3810; CHECK: // %bb.0:3811; CHECK-NEXT: fcmeq v0.2s, v0.2s, v0.2s3812; CHECK-NEXT: ret3813 %tmp3 = fcmp fast ord <2 x float> %A, zeroinitializer3814 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3815 ret <2 x i32> %tmp43816}3817 3818define <4 x i32> @fcmordz4xfloat_fast(<4 x float> %A) {3819; CHECK-LABEL: fcmordz4xfloat_fast:3820; CHECK: // %bb.0:3821; CHECK-NEXT: fcmeq v0.4s, v0.4s, v0.4s3822; CHECK-NEXT: ret3823 %tmp3 = fcmp fast ord <4 x float> %A, zeroinitializer3824 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3825 ret <4 x i32> %tmp43826}3827 3828define <2 x i64> @fcmordz2xdouble_fast(<2 x double> %A) {3829; CHECK-LABEL: fcmordz2xdouble_fast:3830; CHECK: // %bb.0:3831; CHECK-NEXT: fcmeq v0.2d, v0.2d, v0.2d3832; CHECK-NEXT: ret3833 %tmp3 = fcmp fast ord <2 x double> %A, zeroinitializer3834 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3835 ret <2 x i64> %tmp43836}3837 3838define <2 x i32> @fcmueqz2xfloat_fast(<2 x float> %A) {3839; CHECK-SD-LABEL: fcmueqz2xfloat_fast:3840; CHECK-SD: // %bb.0:3841; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, #0.03842; CHECK-SD-NEXT: ret3843;3844; CHECK-GI-LABEL: fcmueqz2xfloat_fast:3845; CHECK-GI: // %bb.0:3846; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.03847; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.03848; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b3849; CHECK-GI-NEXT: mvn v0.8b, v0.8b3850; CHECK-GI-NEXT: ret3851 %tmp3 = fcmp fast ueq <2 x float> %A, zeroinitializer3852 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3853 ret <2 x i32> %tmp43854}3855 3856define <4 x i32> @fcmueqz4xfloat_fast(<4 x float> %A) {3857; CHECK-SD-LABEL: fcmueqz4xfloat_fast:3858; CHECK-SD: // %bb.0:3859; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, #0.03860; CHECK-SD-NEXT: ret3861;3862; CHECK-GI-LABEL: fcmueqz4xfloat_fast:3863; CHECK-GI: // %bb.0:3864; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.03865; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.03866; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b3867; CHECK-GI-NEXT: mvn v0.16b, v0.16b3868; CHECK-GI-NEXT: ret3869 %tmp3 = fcmp fast ueq <4 x float> %A, zeroinitializer3870 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3871 ret <4 x i32> %tmp43872}3873 3874define <2 x i64> @fcmueqz2xdouble_fast(<2 x double> %A) {3875; CHECK-SD-LABEL: fcmueqz2xdouble_fast:3876; CHECK-SD: // %bb.0:3877; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, #0.03878; CHECK-SD-NEXT: ret3879;3880; CHECK-GI-LABEL: fcmueqz2xdouble_fast:3881; CHECK-GI: // %bb.0:3882; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.03883; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.03884; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b3885; CHECK-GI-NEXT: mvn v0.16b, v0.16b3886; CHECK-GI-NEXT: ret3887 %tmp3 = fcmp fast ueq <2 x double> %A, zeroinitializer3888 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3889 ret <2 x i64> %tmp43890}3891 3892define <2 x i32> @fcmugez2xfloat_fast(<2 x float> %A) {3893; CHECK-SD-LABEL: fcmugez2xfloat_fast:3894; CHECK-SD: // %bb.0:3895; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, #0.03896; CHECK-SD-NEXT: ret3897;3898; CHECK-GI-LABEL: fcmugez2xfloat_fast:3899; CHECK-GI: // %bb.0:3900; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.03901; CHECK-GI-NEXT: mvn v0.8b, v0.8b3902; CHECK-GI-NEXT: ret3903 %tmp3 = fcmp fast uge <2 x float> %A, zeroinitializer3904 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3905 ret <2 x i32> %tmp43906}3907 3908define <4 x i32> @fcmugez4xfloat_fast(<4 x float> %A) {3909; CHECK-SD-LABEL: fcmugez4xfloat_fast:3910; CHECK-SD: // %bb.0:3911; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, #0.03912; CHECK-SD-NEXT: ret3913;3914; CHECK-GI-LABEL: fcmugez4xfloat_fast:3915; CHECK-GI: // %bb.0:3916; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.03917; CHECK-GI-NEXT: mvn v0.16b, v0.16b3918; CHECK-GI-NEXT: ret3919 %tmp3 = fcmp fast uge <4 x float> %A, zeroinitializer3920 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3921 ret <4 x i32> %tmp43922}3923 3924define <2 x i64> @fcmugez2xdouble_fast(<2 x double> %A) {3925; CHECK-SD-LABEL: fcmugez2xdouble_fast:3926; CHECK-SD: // %bb.0:3927; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, #0.03928; CHECK-SD-NEXT: ret3929;3930; CHECK-GI-LABEL: fcmugez2xdouble_fast:3931; CHECK-GI: // %bb.0:3932; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.03933; CHECK-GI-NEXT: mvn v0.16b, v0.16b3934; CHECK-GI-NEXT: ret3935 %tmp3 = fcmp fast uge <2 x double> %A, zeroinitializer3936 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3937 ret <2 x i64> %tmp43938}3939 3940define <2 x i32> @fcmugtz2xfloat_fast(<2 x float> %A) {3941; CHECK-SD-LABEL: fcmugtz2xfloat_fast:3942; CHECK-SD: // %bb.0:3943; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, #0.03944; CHECK-SD-NEXT: ret3945;3946; CHECK-GI-LABEL: fcmugtz2xfloat_fast:3947; CHECK-GI: // %bb.0:3948; CHECK-GI-NEXT: fcmle v0.2s, v0.2s, #0.03949; CHECK-GI-NEXT: mvn v0.8b, v0.8b3950; CHECK-GI-NEXT: ret3951 %tmp3 = fcmp fast ugt <2 x float> %A, zeroinitializer3952 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>3953 ret <2 x i32> %tmp43954}3955 3956define <4 x i32> @fcmugtz4xfloat_fast(<4 x float> %A) {3957; CHECK-SD-LABEL: fcmugtz4xfloat_fast:3958; CHECK-SD: // %bb.0:3959; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, #0.03960; CHECK-SD-NEXT: ret3961;3962; CHECK-GI-LABEL: fcmugtz4xfloat_fast:3963; CHECK-GI: // %bb.0:3964; CHECK-GI-NEXT: fcmle v0.4s, v0.4s, #0.03965; CHECK-GI-NEXT: mvn v0.16b, v0.16b3966; CHECK-GI-NEXT: ret3967 %tmp3 = fcmp fast ugt <4 x float> %A, zeroinitializer3968 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>3969 ret <4 x i32> %tmp43970}3971 3972define <2 x i64> @fcmugtz2xdouble_fast(<2 x double> %A) {3973; CHECK-SD-LABEL: fcmugtz2xdouble_fast:3974; CHECK-SD: // %bb.0:3975; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, #0.03976; CHECK-SD-NEXT: ret3977;3978; CHECK-GI-LABEL: fcmugtz2xdouble_fast:3979; CHECK-GI: // %bb.0:3980; CHECK-GI-NEXT: fcmle v0.2d, v0.2d, #0.03981; CHECK-GI-NEXT: mvn v0.16b, v0.16b3982; CHECK-GI-NEXT: ret3983 %tmp3 = fcmp fast ugt <2 x double> %A, zeroinitializer3984 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>3985 ret <2 x i64> %tmp43986}3987 3988define <2 x i32> @fcmultz2xfloat_fast(<2 x float> %A) {3989; CHECK-SD-LABEL: fcmultz2xfloat_fast:3990; CHECK-SD: // %bb.0:3991; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.03992; CHECK-SD-NEXT: ret3993;3994; CHECK-GI-LABEL: fcmultz2xfloat_fast:3995; CHECK-GI: // %bb.0:3996; CHECK-GI-NEXT: fcmge v0.2s, v0.2s, #0.03997; CHECK-GI-NEXT: mvn v0.8b, v0.8b3998; CHECK-GI-NEXT: ret3999 %tmp3 = fcmp fast ult <2 x float> %A, zeroinitializer4000 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>4001 ret <2 x i32> %tmp44002}4003 4004define <4 x i32> @fcmultz4xfloat_fast(<4 x float> %A) {4005; CHECK-SD-LABEL: fcmultz4xfloat_fast:4006; CHECK-SD: // %bb.0:4007; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.04008; CHECK-SD-NEXT: ret4009;4010; CHECK-GI-LABEL: fcmultz4xfloat_fast:4011; CHECK-GI: // %bb.0:4012; CHECK-GI-NEXT: fcmge v0.4s, v0.4s, #0.04013; CHECK-GI-NEXT: mvn v0.16b, v0.16b4014; CHECK-GI-NEXT: ret4015 %tmp3 = fcmp fast ult <4 x float> %A, zeroinitializer4016 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>4017 ret <4 x i32> %tmp44018}4019 4020define <2 x i64> @fcmultz2xdouble_fast(<2 x double> %A) {4021; CHECK-SD-LABEL: fcmultz2xdouble_fast:4022; CHECK-SD: // %bb.0:4023; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.04024; CHECK-SD-NEXT: ret4025;4026; CHECK-GI-LABEL: fcmultz2xdouble_fast:4027; CHECK-GI: // %bb.0:4028; CHECK-GI-NEXT: fcmge v0.2d, v0.2d, #0.04029; CHECK-GI-NEXT: mvn v0.16b, v0.16b4030; CHECK-GI-NEXT: ret4031 %tmp3 = fcmp fast ult <2 x double> %A, zeroinitializer4032 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>4033 ret <2 x i64> %tmp44034}4035 4036; ULE with zero = !OGT4037define <2 x i32> @fcmulez2xfloat_fast(<2 x float> %A) {4038; CHECK-SD-LABEL: fcmulez2xfloat_fast:4039; CHECK-SD: // %bb.0:4040; CHECK-SD-NEXT: fcmle v0.2s, v0.2s, #0.04041; CHECK-SD-NEXT: ret4042;4043; CHECK-GI-LABEL: fcmulez2xfloat_fast:4044; CHECK-GI: // %bb.0:4045; CHECK-GI-NEXT: fcmgt v0.2s, v0.2s, #0.04046; CHECK-GI-NEXT: mvn v0.8b, v0.8b4047; CHECK-GI-NEXT: ret4048 %tmp3 = fcmp fast ule <2 x float> %A, zeroinitializer4049 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>4050 ret <2 x i32> %tmp44051}4052 4053define <4 x i32> @fcmulez4xfloat_fast(<4 x float> %A) {4054; CHECK-SD-LABEL: fcmulez4xfloat_fast:4055; CHECK-SD: // %bb.0:4056; CHECK-SD-NEXT: fcmle v0.4s, v0.4s, #0.04057; CHECK-SD-NEXT: ret4058;4059; CHECK-GI-LABEL: fcmulez4xfloat_fast:4060; CHECK-GI: // %bb.0:4061; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, #0.04062; CHECK-GI-NEXT: mvn v0.16b, v0.16b4063; CHECK-GI-NEXT: ret4064 %tmp3 = fcmp fast ule <4 x float> %A, zeroinitializer4065 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>4066 ret <4 x i32> %tmp44067}4068 4069define <2 x i64> @fcmulez2xdouble_fast(<2 x double> %A) {4070; CHECK-SD-LABEL: fcmulez2xdouble_fast:4071; CHECK-SD: // %bb.0:4072; CHECK-SD-NEXT: fcmle v0.2d, v0.2d, #0.04073; CHECK-SD-NEXT: ret4074;4075; CHECK-GI-LABEL: fcmulez2xdouble_fast:4076; CHECK-GI: // %bb.0:4077; CHECK-GI-NEXT: fcmgt v0.2d, v0.2d, #0.04078; CHECK-GI-NEXT: mvn v0.16b, v0.16b4079; CHECK-GI-NEXT: ret4080 %tmp3 = fcmp fast ule <2 x double> %A, zeroinitializer4081 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>4082 ret <2 x i64> %tmp44083}4084 4085define <2 x i32> @fcmunez2xfloat_fast(<2 x float> %A) {4086; CHECK-LABEL: fcmunez2xfloat_fast:4087; CHECK: // %bb.0:4088; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.04089; CHECK-NEXT: mvn v0.8b, v0.8b4090; CHECK-NEXT: ret4091 %tmp3 = fcmp fast une <2 x float> %A, zeroinitializer4092 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>4093 ret <2 x i32> %tmp44094}4095 4096define <4 x i32> @fcmunez4xfloat_fast(<4 x float> %A) {4097; CHECK-LABEL: fcmunez4xfloat_fast:4098; CHECK: // %bb.0:4099; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.04100; CHECK-NEXT: mvn v0.16b, v0.16b4101; CHECK-NEXT: ret4102 %tmp3 = fcmp fast une <4 x float> %A, zeroinitializer4103 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>4104 ret <4 x i32> %tmp44105}4106 4107define <2 x i64> @fcmunez2xdouble_fast(<2 x double> %A) {4108; CHECK-LABEL: fcmunez2xdouble_fast:4109; CHECK: // %bb.0:4110; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.04111; CHECK-NEXT: mvn v0.16b, v0.16b4112; CHECK-NEXT: ret4113 %tmp3 = fcmp fast une <2 x double> %A, zeroinitializer4114 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>4115 ret <2 x i64> %tmp44116}4117 4118define <2 x i32> @fcmunoz2xfloat_fast(<2 x float> %A) {4119; CHECK-LABEL: fcmunoz2xfloat_fast:4120; CHECK: // %bb.0:4121; CHECK-NEXT: fcmeq v0.2s, v0.2s, v0.2s4122; CHECK-NEXT: mvn v0.8b, v0.8b4123; CHECK-NEXT: ret4124 %tmp3 = fcmp fast uno <2 x float> %A, zeroinitializer4125 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>4126 ret <2 x i32> %tmp44127}4128 4129define <4 x i32> @fcmunoz4xfloat_fast(<4 x float> %A) {4130; CHECK-LABEL: fcmunoz4xfloat_fast:4131; CHECK: // %bb.0:4132; CHECK-NEXT: fcmeq v0.4s, v0.4s, v0.4s4133; CHECK-NEXT: mvn v0.16b, v0.16b4134; CHECK-NEXT: ret4135 %tmp3 = fcmp fast uno <4 x float> %A, zeroinitializer4136 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>4137 ret <4 x i32> %tmp44138}4139 4140define <2 x i64> @fcmunoz2xdouble_fast(<2 x double> %A) {4141; CHECK-LABEL: fcmunoz2xdouble_fast:4142; CHECK: // %bb.0:4143; CHECK-NEXT: fcmeq v0.2d, v0.2d, v0.2d4144; CHECK-NEXT: mvn v0.16b, v0.16b4145; CHECK-NEXT: ret4146 %tmp3 = fcmp fast uno <2 x double> %A, zeroinitializer4147 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>4148 ret <2 x i64> %tmp44149 4150}4151 4152; Test SETCC fast-math flags are propagated when combining zext(setcc).4153define <4 x i32> @fcmule4xfloat_fast_zext(<4 x float> %A, <4 x float> %B) {4154; CHECK-SD-LABEL: fcmule4xfloat_fast_zext:4155; CHECK-SD: // %bb.0:4156; CHECK-SD-NEXT: movi v2.4s, #14157; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s4158; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b4159; CHECK-SD-NEXT: ret4160;4161; CHECK-GI-LABEL: fcmule4xfloat_fast_zext:4162; CHECK-GI: // %bb.0:4163; CHECK-GI-NEXT: movi v2.4s, #14164; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s4165; CHECK-GI-NEXT: bic v0.16b, v2.16b, v0.16b4166; CHECK-GI-NEXT: ret4167 %tmp3 = fcmp fast ule <4 x float> %A, %B4168 %tmp4 = zext <4 x i1> %tmp3 to <4 x i32>4169 ret <4 x i32> %tmp44170}4171 4172; Test SETCC fast-math flags are propagated when combining aext(setcc).4173define <4 x i1> @fcmule4xfloat_fast_aext(<4 x float> %A, <4 x float> %B) {4174; CHECK-SD-LABEL: fcmule4xfloat_fast_aext:4175; CHECK-SD: // %bb.0:4176; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s4177; CHECK-SD-NEXT: xtn v0.4h, v0.4s4178; CHECK-SD-NEXT: ret4179;4180; CHECK-GI-LABEL: fcmule4xfloat_fast_aext:4181; CHECK-GI: // %bb.0:4182; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s4183; CHECK-GI-NEXT: mvn v0.16b, v0.16b4184; CHECK-GI-NEXT: xtn v0.4h, v0.4s4185; CHECK-GI-NEXT: ret4186 %tmp3 = fcmp fast ule <4 x float> %A, %B4187 ret <4 x i1> %tmp34188}4189 4190define <4 x i64> @fcmoeq4xdouble(<4 x double> %A, <4 x double> %B) {4191; CHECK-SD-LABEL: fcmoeq4xdouble:4192; CHECK-SD: // %bb.0:4193; CHECK-SD-NEXT: fcmeq v1.2d, v1.2d, v3.2d4194; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v2.2d4195; CHECK-SD-NEXT: ret4196;4197; CHECK-GI-LABEL: fcmoeq4xdouble:4198; CHECK-GI: // %bb.0:4199; CHECK-GI-NEXT: fcmeq v0.2d, v0.2d, v2.2d4200; CHECK-GI-NEXT: fcmeq v1.2d, v1.2d, v3.2d4201; CHECK-GI-NEXT: ret4202 %tmp3 = fcmp oeq <4 x double> %A, %B4203 %tmp4 = sext <4 x i1> %tmp3 to <4 x i64>4204 ret <4 x i64> %tmp44205}4206 4207define <8 x i32> @fcmoeq8xfloat(<8 x float> %A, <8 x float> %B) {4208; CHECK-SD-LABEL: fcmoeq8xfloat:4209; CHECK-SD: // %bb.0:4210; CHECK-SD-NEXT: fcmeq v1.4s, v1.4s, v3.4s4211; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v2.4s4212; CHECK-SD-NEXT: ret4213;4214; CHECK-GI-LABEL: fcmoeq8xfloat:4215; CHECK-GI: // %bb.0:4216; CHECK-GI-NEXT: fcmeq v0.4s, v0.4s, v2.4s4217; CHECK-GI-NEXT: fcmeq v1.4s, v1.4s, v3.4s4218; CHECK-GI-NEXT: ret4219 %tmp3 = fcmp oeq <8 x float> %A, %B4220 %tmp4 = sext <8 x i1> %tmp3 to <8 x i32>4221 ret <8 x i32> %tmp44222}4223