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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple aarch64-none-linux-gnu -mattr=+dotprod < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple aarch64-none-linux-gnu -mattr=+dotprod -global-isel < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5declare <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32>, <8 x i8>, <8 x i8>)6declare <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>)7declare <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32>, <8 x i8>, <8 x i8>)8declare <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>)9 10define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) #0 {11; CHECK-LABEL: test_vdot_u32:12; CHECK: // %bb.0: // %entry13; CHECK-NEXT: udot v0.2s, v1.8b, v2.8b14; CHECK-NEXT: ret15entry:16 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) #217 ret <2 x i32> %vdot1.i18}19 20define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) #0 {21; CHECK-LABEL: test_vdotq_u32:22; CHECK: // %bb.0: // %entry23; CHECK-NEXT: udot v0.4s, v1.16b, v2.16b24; CHECK-NEXT: ret25entry:26 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) #227 ret <4 x i32> %vdot1.i28}29 30define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) #0 {31; CHECK-LABEL: test_vdot_s32:32; CHECK: // %bb.0: // %entry33; CHECK-NEXT: sdot v0.2s, v1.8b, v2.8b34; CHECK-NEXT: ret35entry:36 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) #237 ret <2 x i32> %vdot1.i38}39 40define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) #0 {41; CHECK-LABEL: test_vdotq_s32:42; CHECK: // %bb.0: // %entry43; CHECK-NEXT: sdot v0.4s, v1.16b, v2.16b44; CHECK-NEXT: ret45entry:46 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) #247 ret <4 x i32> %vdot1.i48}49 50 51define <2 x i32> @test_vdot_u32_zero(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) #0 {52; CHECK-SD-LABEL: test_vdot_u32_zero:53; CHECK-SD: // %bb.0: // %entry54; CHECK-SD-NEXT: udot v0.2s, v1.8b, v2.8b55; CHECK-SD-NEXT: ret56;57; CHECK-GI-LABEL: test_vdot_u32_zero:58; CHECK-GI: // %bb.0: // %entry59; CHECK-GI-NEXT: movi v3.2d, #000000000000000060; CHECK-GI-NEXT: udot v3.2s, v1.8b, v2.8b61; CHECK-GI-NEXT: add v0.2s, v3.2s, v0.2s62; CHECK-GI-NEXT: ret63entry:64 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> zeroinitializer, <8 x i8> %b, <8 x i8> %c) #265 %ret = add <2 x i32> %vdot1.i, %a66 ret <2 x i32> %ret67}68 69define <4 x i32> @test_vdotq_u32_zero(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) #0 {70; CHECK-SD-LABEL: test_vdotq_u32_zero:71; CHECK-SD: // %bb.0: // %entry72; CHECK-SD-NEXT: udot v0.4s, v1.16b, v2.16b73; CHECK-SD-NEXT: ret74;75; CHECK-GI-LABEL: test_vdotq_u32_zero:76; CHECK-GI: // %bb.0: // %entry77; CHECK-GI-NEXT: movi v3.2d, #000000000000000078; CHECK-GI-NEXT: udot v3.4s, v1.16b, v2.16b79; CHECK-GI-NEXT: add v0.4s, v3.4s, v0.4s80; CHECK-GI-NEXT: ret81entry:82 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> zeroinitializer, <16 x i8> %b, <16 x i8> %c) #283 %ret = add <4 x i32> %vdot1.i, %a84 ret <4 x i32> %ret85}86 87define <2 x i32> @test_vdot_s32_zero(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) #0 {88; CHECK-SD-LABEL: test_vdot_s32_zero:89; CHECK-SD: // %bb.0: // %entry90; CHECK-SD-NEXT: sdot v0.2s, v1.8b, v2.8b91; CHECK-SD-NEXT: ret92;93; CHECK-GI-LABEL: test_vdot_s32_zero:94; CHECK-GI: // %bb.0: // %entry95; CHECK-GI-NEXT: movi v3.2d, #000000000000000096; CHECK-GI-NEXT: sdot v3.2s, v1.8b, v2.8b97; CHECK-GI-NEXT: add v0.2s, v3.2s, v0.2s98; CHECK-GI-NEXT: ret99entry:100 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> zeroinitializer, <8 x i8> %b, <8 x i8> %c) #2101 %ret = add <2 x i32> %vdot1.i, %a102 ret <2 x i32> %ret103}104 105define <4 x i32> @test_vdotq_s32_zero(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) #0 {106; CHECK-SD-LABEL: test_vdotq_s32_zero:107; CHECK-SD: // %bb.0: // %entry108; CHECK-SD-NEXT: sdot v0.4s, v1.16b, v2.16b109; CHECK-SD-NEXT: ret110;111; CHECK-GI-LABEL: test_vdotq_s32_zero:112; CHECK-GI: // %bb.0: // %entry113; CHECK-GI-NEXT: movi v3.2d, #0000000000000000114; CHECK-GI-NEXT: sdot v3.4s, v1.16b, v2.16b115; CHECK-GI-NEXT: add v0.4s, v3.4s, v0.4s116; CHECK-GI-NEXT: ret117entry:118 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> zeroinitializer, <16 x i8> %b, <16 x i8> %c) #2119 %ret = add <4 x i32> %vdot1.i, %a120 ret <4 x i32> %ret121}122 123 124define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) {125; CHECK-LABEL: test_vdot_lane_u32:126; CHECK: // %bb.0: // %entry127; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2128; CHECK-NEXT: udot v0.2s, v1.8b, v2.4b[1]129; CHECK-NEXT: ret130entry:131 %.cast = bitcast <8 x i8> %c to <2 x i32>132 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <2 x i32> <i32 1, i32 1>133 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>134 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %.cast5) #2135 ret <2 x i32> %vdot1.i136}137 138define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) {139; CHECK-LABEL: test_vdotq_lane_u32:140; CHECK: // %bb.0: // %entry141; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2142; CHECK-NEXT: udot v0.4s, v1.16b, v2.4b[1]143; CHECK-NEXT: ret144entry:145 %.cast = bitcast <8 x i8> %c to <2 x i32>146 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>147 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>148 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2149 ret <4 x i32> %vdot1.i150}151 152define <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) {153; CHECK-LABEL: test_vdot_laneq_u32:154; CHECK: // %bb.0: // %entry155; CHECK-NEXT: udot v0.2s, v1.8b, v2.4b[1]156; CHECK-NEXT: ret157entry:158 %.cast = bitcast <16 x i8> %c to <4 x i32>159 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <2 x i32> <i32 1, i32 1>160 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>161 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %.cast5) #2162 ret <2 x i32> %vdot1.i163}164 165define <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) {166; CHECK-LABEL: test_vdotq_laneq_u32:167; CHECK: // %bb.0: // %entry168; CHECK-NEXT: udot v0.4s, v1.16b, v2.4b[1]169; CHECK-NEXT: ret170entry:171 %.cast = bitcast <16 x i8> %c to <4 x i32>172 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>173 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>174 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2175 ret <4 x i32> %vdot1.i176}177 178 179define <2 x i32> @test_vdot_lane_u32_zero(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) {180; CHECK-SD-LABEL: test_vdot_lane_u32_zero:181; CHECK-SD: // %bb.0: // %entry182; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2183; CHECK-SD-NEXT: udot v0.2s, v1.8b, v2.4b[1]184; CHECK-SD-NEXT: ret185;186; CHECK-GI-LABEL: test_vdot_lane_u32_zero:187; CHECK-GI: // %bb.0: // %entry188; CHECK-GI-NEXT: movi v3.2d, #0000000000000000189; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2190; CHECK-GI-NEXT: udot v3.2s, v1.8b, v2.4b[1]191; CHECK-GI-NEXT: add v0.2s, v3.2s, v0.2s192; CHECK-GI-NEXT: ret193entry:194 %.cast = bitcast <8 x i8> %c to <2 x i32>195 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <2 x i32> <i32 1, i32 1>196 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>197 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> zeroinitializer, <8 x i8> %b, <8 x i8> %.cast5) #2198 %ret = add <2 x i32> %vdot1.i, %a199 ret <2 x i32> %ret200}201 202define <4 x i32> @test_vdotq_lane_u32_zero(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) {203; CHECK-SD-LABEL: test_vdotq_lane_u32_zero:204; CHECK-SD: // %bb.0: // %entry205; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2206; CHECK-SD-NEXT: udot v0.4s, v1.16b, v2.4b[1]207; CHECK-SD-NEXT: ret208;209; CHECK-GI-LABEL: test_vdotq_lane_u32_zero:210; CHECK-GI: // %bb.0: // %entry211; CHECK-GI-NEXT: movi v3.2d, #0000000000000000212; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2213; CHECK-GI-NEXT: udot v3.4s, v1.16b, v2.4b[1]214; CHECK-GI-NEXT: add v0.4s, v3.4s, v0.4s215; CHECK-GI-NEXT: ret216entry:217 %.cast = bitcast <8 x i8> %c to <2 x i32>218 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>219 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>220 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> zeroinitializer, <16 x i8> %b, <16 x i8> %.cast3) #2221 %ret = add <4 x i32> %vdot1.i, %a222 ret <4 x i32> %ret223}224 225define <2 x i32> @test_vdot_laneq_u32_zero(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) {226; CHECK-SD-LABEL: test_vdot_laneq_u32_zero:227; CHECK-SD: // %bb.0: // %entry228; CHECK-SD-NEXT: udot v0.2s, v1.8b, v2.4b[1]229; CHECK-SD-NEXT: ret230;231; CHECK-GI-LABEL: test_vdot_laneq_u32_zero:232; CHECK-GI: // %bb.0: // %entry233; CHECK-GI-NEXT: movi v3.2d, #0000000000000000234; CHECK-GI-NEXT: udot v3.2s, v1.8b, v2.4b[1]235; CHECK-GI-NEXT: add v0.2s, v3.2s, v0.2s236; CHECK-GI-NEXT: ret237entry:238 %.cast = bitcast <16 x i8> %c to <4 x i32>239 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <2 x i32> <i32 1, i32 1>240 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>241 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> zeroinitializer, <8 x i8> %b, <8 x i8> %.cast5) #2242 %ret = add <2 x i32> %vdot1.i, %a243 ret <2 x i32> %ret244}245 246define <4 x i32> @test_vdotq_laneq_u32_zero(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) {247; CHECK-SD-LABEL: test_vdotq_laneq_u32_zero:248; CHECK-SD: // %bb.0: // %entry249; CHECK-SD-NEXT: udot v0.4s, v1.16b, v2.4b[1]250; CHECK-SD-NEXT: ret251;252; CHECK-GI-LABEL: test_vdotq_laneq_u32_zero:253; CHECK-GI: // %bb.0: // %entry254; CHECK-GI-NEXT: movi v3.2d, #0000000000000000255; CHECK-GI-NEXT: udot v3.4s, v1.16b, v2.4b[1]256; CHECK-GI-NEXT: add v0.4s, v3.4s, v0.4s257; CHECK-GI-NEXT: ret258entry:259 %.cast = bitcast <16 x i8> %c to <4 x i32>260 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>261 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>262 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> zeroinitializer, <16 x i8> %b, <16 x i8> %.cast3) #2263 %ret = add <4 x i32> %vdot1.i, %a264 ret <4 x i32> %ret265}266 267 268define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) {269; CHECK-LABEL: test_vdot_lane_s32:270; CHECK: // %bb.0: // %entry271; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2272; CHECK-NEXT: sdot v0.2s, v1.8b, v2.4b[1]273; CHECK-NEXT: ret274entry:275 %.cast = bitcast <8 x i8> %c to <2 x i32>276 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <2 x i32> <i32 1, i32 1>277 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>278 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %.cast5) #2279 ret <2 x i32> %vdot1.i280}281 282define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) {283; CHECK-LABEL: test_vdotq_lane_s32:284; CHECK: // %bb.0: // %entry285; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2286; CHECK-NEXT: sdot v0.4s, v1.16b, v2.4b[1]287; CHECK-NEXT: ret288entry:289 %.cast = bitcast <8 x i8> %c to <2 x i32>290 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>291 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>292 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2293 ret <4 x i32> %vdot1.i294}295 296define <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) {297; CHECK-LABEL: test_vdot_laneq_s32:298; CHECK: // %bb.0: // %entry299; CHECK-NEXT: sdot v0.2s, v1.8b, v2.4b[1]300; CHECK-NEXT: ret301entry:302 %.cast = bitcast <16 x i8> %c to <4 x i32>303 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <2 x i32> <i32 1, i32 1>304 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>305 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %.cast5) #2306 ret <2 x i32> %vdot1.i307}308 309define <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) {310; CHECK-LABEL: test_vdotq_laneq_s32:311; CHECK: // %bb.0: // %entry312; CHECK-NEXT: sdot v0.4s, v1.16b, v2.4b[1]313; CHECK-NEXT: ret314entry:315 %.cast = bitcast <16 x i8> %c to <4 x i32>316 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>317 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>318 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %.cast3) #2319 ret <4 x i32> %vdot1.i320}321 322 323define <2 x i32> @test_vdot_lane_s32_zero(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c) {324; CHECK-SD-LABEL: test_vdot_lane_s32_zero:325; CHECK-SD: // %bb.0: // %entry326; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2327; CHECK-SD-NEXT: sdot v0.2s, v1.8b, v2.4b[1]328; CHECK-SD-NEXT: ret329;330; CHECK-GI-LABEL: test_vdot_lane_s32_zero:331; CHECK-GI: // %bb.0: // %entry332; CHECK-GI-NEXT: movi v3.2d, #0000000000000000333; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2334; CHECK-GI-NEXT: sdot v3.2s, v1.8b, v2.4b[1]335; CHECK-GI-NEXT: add v0.2s, v3.2s, v0.2s336; CHECK-GI-NEXT: ret337entry:338 %.cast = bitcast <8 x i8> %c to <2 x i32>339 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <2 x i32> <i32 1, i32 1>340 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>341 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> zeroinitializer, <8 x i8> %b, <8 x i8> %.cast5) #2342 %ret = add <2 x i32> %vdot1.i, %a343 ret <2 x i32> %ret344}345 346define <4 x i32> @test_vdotq_lane_s32_zero(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c) {347; CHECK-SD-LABEL: test_vdotq_lane_s32_zero:348; CHECK-SD: // %bb.0: // %entry349; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2350; CHECK-SD-NEXT: sdot v0.4s, v1.16b, v2.4b[1]351; CHECK-SD-NEXT: ret352;353; CHECK-GI-LABEL: test_vdotq_lane_s32_zero:354; CHECK-GI: // %bb.0: // %entry355; CHECK-GI-NEXT: movi v3.2d, #0000000000000000356; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q2357; CHECK-GI-NEXT: sdot v3.4s, v1.16b, v2.4b[1]358; CHECK-GI-NEXT: add v0.4s, v3.4s, v0.4s359; CHECK-GI-NEXT: ret360entry:361 %.cast = bitcast <8 x i8> %c to <2 x i32>362 %shuffle = shufflevector <2 x i32> %.cast, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>363 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>364 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> zeroinitializer, <16 x i8> %b, <16 x i8> %.cast3) #2365 %ret = add <4 x i32> %vdot1.i, %a366 ret <4 x i32> %ret367}368 369define <2 x i32> @test_vdot_laneq_s32_zero(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c) {370; CHECK-SD-LABEL: test_vdot_laneq_s32_zero:371; CHECK-SD: // %bb.0: // %entry372; CHECK-SD-NEXT: sdot v0.2s, v1.8b, v2.4b[1]373; CHECK-SD-NEXT: ret374;375; CHECK-GI-LABEL: test_vdot_laneq_s32_zero:376; CHECK-GI: // %bb.0: // %entry377; CHECK-GI-NEXT: movi v3.2d, #0000000000000000378; CHECK-GI-NEXT: sdot v3.2s, v1.8b, v2.4b[1]379; CHECK-GI-NEXT: add v0.2s, v3.2s, v0.2s380; CHECK-GI-NEXT: ret381entry:382 %.cast = bitcast <16 x i8> %c to <4 x i32>383 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <2 x i32> <i32 1, i32 1>384 %.cast5 = bitcast <2 x i32> %shuffle to <8 x i8>385 %vdot1.i = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> zeroinitializer, <8 x i8> %b, <8 x i8> %.cast5) #2386 %ret = add <2 x i32> %vdot1.i, %a387 ret <2 x i32> %ret388}389 390define <4 x i32> @test_vdotq_laneq_s32_zero(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c) {391; CHECK-SD-LABEL: test_vdotq_laneq_s32_zero:392; CHECK-SD: // %bb.0: // %entry393; CHECK-SD-NEXT: sdot v0.4s, v1.16b, v2.4b[1]394; CHECK-SD-NEXT: ret395;396; CHECK-GI-LABEL: test_vdotq_laneq_s32_zero:397; CHECK-GI: // %bb.0: // %entry398; CHECK-GI-NEXT: movi v3.2d, #0000000000000000399; CHECK-GI-NEXT: sdot v3.4s, v1.16b, v2.4b[1]400; CHECK-GI-NEXT: add v0.4s, v3.4s, v0.4s401; CHECK-GI-NEXT: ret402entry:403 %.cast = bitcast <16 x i8> %c to <4 x i32>404 %shuffle = shufflevector <4 x i32> %.cast, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>405 %.cast3 = bitcast <4 x i32> %shuffle to <16 x i8>406 %vdot1.i = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> zeroinitializer, <16 x i8> %b, <16 x i8> %.cast3) #2407 %ret = add <4 x i32> %vdot1.i, %a408 ret <4 x i32> %ret409}410;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:411; CHECK-GI: {{.*}}412; CHECK-SD: {{.*}}413