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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc < %s -mtriple=aarch64 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple=aarch64 -global-isel -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define <4 x i16> @addls_v8i8_0(<8 x i8> %s0, <8 x i8> %s1) {6; CHECK-SD-LABEL: addls_v8i8_0:7; CHECK-SD: // %bb.0: // %entry8; CHECK-SD-NEXT: saddl v0.8h, v0.8b, v1.8b9; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q010; CHECK-SD-NEXT: ret11;12; CHECK-GI-LABEL: addls_v8i8_0:13; CHECK-GI: // %bb.0: // %entry14; CHECK-GI-NEXT: sshll v0.8h, v0.8b, #015; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #016; CHECK-GI-NEXT: add v0.4h, v0.4h, v1.4h17; CHECK-GI-NEXT: ret18entry:19 %s0s = sext <8 x i8> %s0 to <8 x i16>20 %s1s = sext <8 x i8> %s1 to <8 x i16>21 %t0 = shufflevector <8 x i16> %s0s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>22 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>23 %m = add <4 x i16> %t0, %t124 ret <4 x i16> %m25}26 27define <4 x i16> @addws_v8i8_0(<4 x i16> %s0, <8 x i8> %s1) {28; CHECK-SD-LABEL: addws_v8i8_0:29; CHECK-SD: // %bb.0: // %entry30; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q031; CHECK-SD-NEXT: saddw v0.8h, v0.8h, v1.8b32; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q033; CHECK-SD-NEXT: ret34;35; CHECK-GI-LABEL: addws_v8i8_0:36; CHECK-GI: // %bb.0: // %entry37; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #038; CHECK-GI-NEXT: add v0.4h, v0.4h, v1.4h39; CHECK-GI-NEXT: ret40entry:41 %s1s = sext <8 x i8> %s1 to <8 x i16>42 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>43 %m = add <4 x i16> %s0, %t144 ret <4 x i16> %m45}46 47define <4 x i16> @addlu_v8i8_0(<8 x i8> %s0, <8 x i8> %s1) {48; CHECK-SD-LABEL: addlu_v8i8_0:49; CHECK-SD: // %bb.0: // %entry50; CHECK-SD-NEXT: uaddl v0.8h, v0.8b, v1.8b51; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q052; CHECK-SD-NEXT: ret53;54; CHECK-GI-LABEL: addlu_v8i8_0:55; CHECK-GI: // %bb.0: // %entry56; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #057; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #058; CHECK-GI-NEXT: add v0.4h, v0.4h, v1.4h59; CHECK-GI-NEXT: ret60entry:61 %s0s = zext <8 x i8> %s0 to <8 x i16>62 %s1s = zext <8 x i8> %s1 to <8 x i16>63 %t0 = shufflevector <8 x i16> %s0s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>64 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>65 %m = add <4 x i16> %t0, %t166 ret <4 x i16> %m67}68 69define <4 x i16> @addwu_v8i8_0(<4 x i16> %s0, <8 x i8> %s1) {70; CHECK-SD-LABEL: addwu_v8i8_0:71; CHECK-SD: // %bb.0: // %entry72; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q073; CHECK-SD-NEXT: uaddw v0.8h, v0.8h, v1.8b74; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q075; CHECK-SD-NEXT: ret76;77; CHECK-GI-LABEL: addwu_v8i8_0:78; CHECK-GI: // %bb.0: // %entry79; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #080; CHECK-GI-NEXT: add v0.4h, v0.4h, v1.4h81; CHECK-GI-NEXT: ret82entry:83 %s1s = zext <8 x i8> %s1 to <8 x i16>84 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>85 %m = add <4 x i16> %s0, %t186 ret <4 x i16> %m87}88 89define <4 x i16> @subls_v8i8_0(<8 x i8> %s0, <8 x i8> %s1) {90; CHECK-SD-LABEL: subls_v8i8_0:91; CHECK-SD: // %bb.0: // %entry92; CHECK-SD-NEXT: ssubl v0.8h, v0.8b, v1.8b93; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q094; CHECK-SD-NEXT: ret95;96; CHECK-GI-LABEL: subls_v8i8_0:97; CHECK-GI: // %bb.0: // %entry98; CHECK-GI-NEXT: sshll v0.8h, v0.8b, #099; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #0100; CHECK-GI-NEXT: sub v0.4h, v0.4h, v1.4h101; CHECK-GI-NEXT: ret102entry:103 %s0s = sext <8 x i8> %s0 to <8 x i16>104 %s1s = sext <8 x i8> %s1 to <8 x i16>105 %t0 = shufflevector <8 x i16> %s0s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>106 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>107 %m = sub <4 x i16> %t0, %t1108 ret <4 x i16> %m109}110 111define <4 x i16> @subws_v8i8_0(<4 x i16> %s0, <8 x i8> %s1) {112; CHECK-SD-LABEL: subws_v8i8_0:113; CHECK-SD: // %bb.0: // %entry114; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0115; CHECK-SD-NEXT: ssubw v0.8h, v0.8h, v1.8b116; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0117; CHECK-SD-NEXT: ret118;119; CHECK-GI-LABEL: subws_v8i8_0:120; CHECK-GI: // %bb.0: // %entry121; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #0122; CHECK-GI-NEXT: sub v0.4h, v0.4h, v1.4h123; CHECK-GI-NEXT: ret124entry:125 %s1s = sext <8 x i8> %s1 to <8 x i16>126 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>127 %m = sub <4 x i16> %s0, %t1128 ret <4 x i16> %m129}130 131define <4 x i16> @sublu_v8i8_0(<8 x i8> %s0, <8 x i8> %s1) {132; CHECK-SD-LABEL: sublu_v8i8_0:133; CHECK-SD: // %bb.0: // %entry134; CHECK-SD-NEXT: usubl v0.8h, v0.8b, v1.8b135; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0136; CHECK-SD-NEXT: ret137;138; CHECK-GI-LABEL: sublu_v8i8_0:139; CHECK-GI: // %bb.0: // %entry140; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0141; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0142; CHECK-GI-NEXT: sub v0.4h, v0.4h, v1.4h143; CHECK-GI-NEXT: ret144entry:145 %s0s = zext <8 x i8> %s0 to <8 x i16>146 %s1s = zext <8 x i8> %s1 to <8 x i16>147 %t0 = shufflevector <8 x i16> %s0s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>148 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>149 %m = sub <4 x i16> %t0, %t1150 ret <4 x i16> %m151}152 153define <4 x i16> @subwu_v8i8_0(<4 x i16> %s0, <8 x i8> %s1) {154; CHECK-SD-LABEL: subwu_v8i8_0:155; CHECK-SD: // %bb.0: // %entry156; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0157; CHECK-SD-NEXT: usubw v0.8h, v0.8h, v1.8b158; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0159; CHECK-SD-NEXT: ret160;161; CHECK-GI-LABEL: subwu_v8i8_0:162; CHECK-GI: // %bb.0: // %entry163; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0164; CHECK-GI-NEXT: sub v0.4h, v0.4h, v1.4h165; CHECK-GI-NEXT: ret166entry:167 %s1s = zext <8 x i8> %s1 to <8 x i16>168 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>169 %m = sub <4 x i16> %s0, %t1170 ret <4 x i16> %m171}172 173define <4 x i16> @mulls_v8i8_0(<8 x i8> %s0, <8 x i8> %s1) {174; CHECK-SD-LABEL: mulls_v8i8_0:175; CHECK-SD: // %bb.0: // %entry176; CHECK-SD-NEXT: smull v0.8h, v0.8b, v1.8b177; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0178; CHECK-SD-NEXT: ret179;180; CHECK-GI-LABEL: mulls_v8i8_0:181; CHECK-GI: // %bb.0: // %entry182; CHECK-GI-NEXT: sshll v0.8h, v0.8b, #0183; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #0184; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h185; CHECK-GI-NEXT: ret186entry:187 %s0s = sext <8 x i8> %s0 to <8 x i16>188 %s1s = sext <8 x i8> %s1 to <8 x i16>189 %t0 = shufflevector <8 x i16> %s0s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>190 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>191 %m = mul <4 x i16> %t0, %t1192 ret <4 x i16> %m193}194 195define <4 x i16> @mulws_v8i8_0(<4 x i16> %s0, <8 x i8> %s1) {196; CHECK-LABEL: mulws_v8i8_0:197; CHECK: // %bb.0: // %entry198; CHECK-NEXT: sshll v1.8h, v1.8b, #0199; CHECK-NEXT: mul v0.4h, v0.4h, v1.4h200; CHECK-NEXT: ret201entry:202 %s1s = sext <8 x i8> %s1 to <8 x i16>203 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>204 %m = mul <4 x i16> %s0, %t1205 ret <4 x i16> %m206}207 208define <4 x i16> @mullu_v8i8_0(<8 x i8> %s0, <8 x i8> %s1) {209; CHECK-SD-LABEL: mullu_v8i8_0:210; CHECK-SD: // %bb.0: // %entry211; CHECK-SD-NEXT: umull v0.8h, v0.8b, v1.8b212; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0213; CHECK-SD-NEXT: ret214;215; CHECK-GI-LABEL: mullu_v8i8_0:216; CHECK-GI: // %bb.0: // %entry217; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0218; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0219; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h220; CHECK-GI-NEXT: ret221entry:222 %s0s = zext <8 x i8> %s0 to <8 x i16>223 %s1s = zext <8 x i8> %s1 to <8 x i16>224 %t0 = shufflevector <8 x i16> %s0s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>225 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>226 %m = mul <4 x i16> %t0, %t1227 ret <4 x i16> %m228}229 230define <4 x i16> @mulwu_v8i8_0(<4 x i16> %s0, <8 x i8> %s1) {231; CHECK-LABEL: mulwu_v8i8_0:232; CHECK: // %bb.0: // %entry233; CHECK-NEXT: ushll v1.8h, v1.8b, #0234; CHECK-NEXT: mul v0.4h, v0.4h, v1.4h235; CHECK-NEXT: ret236entry:237 %s1s = zext <8 x i8> %s1 to <8 x i16>238 %t1 = shufflevector <8 x i16> %s1s, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>239 %m = mul <4 x i16> %s0, %t1240 ret <4 x i16> %m241}242 243define <2 x i32> @addls_v4i16_0(<4 x i16> %s0, <4 x i16> %s1) {244; CHECK-SD-LABEL: addls_v4i16_0:245; CHECK-SD: // %bb.0: // %entry246; CHECK-SD-NEXT: saddl v0.4s, v0.4h, v1.4h247; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0248; CHECK-SD-NEXT: ret249;250; CHECK-GI-LABEL: addls_v4i16_0:251; CHECK-GI: // %bb.0: // %entry252; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0253; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0254; CHECK-GI-NEXT: add v0.2s, v0.2s, v1.2s255; CHECK-GI-NEXT: ret256entry:257 %s0s = sext <4 x i16> %s0 to <4 x i32>258 %s1s = sext <4 x i16> %s1 to <4 x i32>259 %t0 = shufflevector <4 x i32> %s0s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>260 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>261 %m = add <2 x i32> %t0, %t1262 ret <2 x i32> %m263}264 265define <2 x i32> @addws_v4i16_0(<2 x i32> %s0, <4 x i16> %s1) {266; CHECK-SD-LABEL: addws_v4i16_0:267; CHECK-SD: // %bb.0: // %entry268; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0269; CHECK-SD-NEXT: saddw v0.4s, v0.4s, v1.4h270; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0271; CHECK-SD-NEXT: ret272;273; CHECK-GI-LABEL: addws_v4i16_0:274; CHECK-GI: // %bb.0: // %entry275; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0276; CHECK-GI-NEXT: add v0.2s, v0.2s, v1.2s277; CHECK-GI-NEXT: ret278entry:279 %s1s = sext <4 x i16> %s1 to <4 x i32>280 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>281 %m = add <2 x i32> %s0, %t1282 ret <2 x i32> %m283}284 285define <2 x i32> @addlu_v4i16_0(<4 x i16> %s0, <4 x i16> %s1) {286; CHECK-SD-LABEL: addlu_v4i16_0:287; CHECK-SD: // %bb.0: // %entry288; CHECK-SD-NEXT: uaddl v0.4s, v0.4h, v1.4h289; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0290; CHECK-SD-NEXT: ret291;292; CHECK-GI-LABEL: addlu_v4i16_0:293; CHECK-GI: // %bb.0: // %entry294; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0295; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0296; CHECK-GI-NEXT: add v0.2s, v0.2s, v1.2s297; CHECK-GI-NEXT: ret298entry:299 %s0s = zext <4 x i16> %s0 to <4 x i32>300 %s1s = zext <4 x i16> %s1 to <4 x i32>301 %t0 = shufflevector <4 x i32> %s0s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>302 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>303 %m = add <2 x i32> %t0, %t1304 ret <2 x i32> %m305}306 307define <2 x i32> @addwu_v4i16_0(<2 x i32> %s0, <4 x i16> %s1) {308; CHECK-SD-LABEL: addwu_v4i16_0:309; CHECK-SD: // %bb.0: // %entry310; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0311; CHECK-SD-NEXT: uaddw v0.4s, v0.4s, v1.4h312; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0313; CHECK-SD-NEXT: ret314;315; CHECK-GI-LABEL: addwu_v4i16_0:316; CHECK-GI: // %bb.0: // %entry317; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0318; CHECK-GI-NEXT: add v0.2s, v0.2s, v1.2s319; CHECK-GI-NEXT: ret320entry:321 %s1s = zext <4 x i16> %s1 to <4 x i32>322 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>323 %m = add <2 x i32> %s0, %t1324 ret <2 x i32> %m325}326 327define <2 x i32> @subls_v4i16_0(<4 x i16> %s0, <4 x i16> %s1) {328; CHECK-SD-LABEL: subls_v4i16_0:329; CHECK-SD: // %bb.0: // %entry330; CHECK-SD-NEXT: ssubl v0.4s, v0.4h, v1.4h331; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0332; CHECK-SD-NEXT: ret333;334; CHECK-GI-LABEL: subls_v4i16_0:335; CHECK-GI: // %bb.0: // %entry336; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0337; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0338; CHECK-GI-NEXT: sub v0.2s, v0.2s, v1.2s339; CHECK-GI-NEXT: ret340entry:341 %s0s = sext <4 x i16> %s0 to <4 x i32>342 %s1s = sext <4 x i16> %s1 to <4 x i32>343 %t0 = shufflevector <4 x i32> %s0s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>344 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>345 %m = sub <2 x i32> %t0, %t1346 ret <2 x i32> %m347}348 349define <2 x i32> @subws_v4i16_0(<2 x i32> %s0, <4 x i16> %s1) {350; CHECK-SD-LABEL: subws_v4i16_0:351; CHECK-SD: // %bb.0: // %entry352; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0353; CHECK-SD-NEXT: ssubw v0.4s, v0.4s, v1.4h354; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0355; CHECK-SD-NEXT: ret356;357; CHECK-GI-LABEL: subws_v4i16_0:358; CHECK-GI: // %bb.0: // %entry359; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0360; CHECK-GI-NEXT: sub v0.2s, v0.2s, v1.2s361; CHECK-GI-NEXT: ret362entry:363 %s1s = sext <4 x i16> %s1 to <4 x i32>364 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>365 %m = sub <2 x i32> %s0, %t1366 ret <2 x i32> %m367}368 369define <2 x i32> @sublu_v4i16_0(<4 x i16> %s0, <4 x i16> %s1) {370; CHECK-SD-LABEL: sublu_v4i16_0:371; CHECK-SD: // %bb.0: // %entry372; CHECK-SD-NEXT: usubl v0.4s, v0.4h, v1.4h373; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0374; CHECK-SD-NEXT: ret375;376; CHECK-GI-LABEL: sublu_v4i16_0:377; CHECK-GI: // %bb.0: // %entry378; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0379; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0380; CHECK-GI-NEXT: sub v0.2s, v0.2s, v1.2s381; CHECK-GI-NEXT: ret382entry:383 %s0s = zext <4 x i16> %s0 to <4 x i32>384 %s1s = zext <4 x i16> %s1 to <4 x i32>385 %t0 = shufflevector <4 x i32> %s0s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>386 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>387 %m = sub <2 x i32> %t0, %t1388 ret <2 x i32> %m389}390 391define <2 x i32> @subwu_v4i16_0(<2 x i32> %s0, <4 x i16> %s1) {392; CHECK-SD-LABEL: subwu_v4i16_0:393; CHECK-SD: // %bb.0: // %entry394; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0395; CHECK-SD-NEXT: usubw v0.4s, v0.4s, v1.4h396; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0397; CHECK-SD-NEXT: ret398;399; CHECK-GI-LABEL: subwu_v4i16_0:400; CHECK-GI: // %bb.0: // %entry401; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0402; CHECK-GI-NEXT: sub v0.2s, v0.2s, v1.2s403; CHECK-GI-NEXT: ret404entry:405 %s1s = zext <4 x i16> %s1 to <4 x i32>406 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>407 %m = sub <2 x i32> %s0, %t1408 ret <2 x i32> %m409}410 411define <2 x i32> @mulls_v4i16_0(<4 x i16> %s0, <4 x i16> %s1) {412; CHECK-SD-LABEL: mulls_v4i16_0:413; CHECK-SD: // %bb.0: // %entry414; CHECK-SD-NEXT: smull v0.4s, v0.4h, v1.4h415; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0416; CHECK-SD-NEXT: ret417;418; CHECK-GI-LABEL: mulls_v4i16_0:419; CHECK-GI: // %bb.0: // %entry420; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0421; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0422; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s423; CHECK-GI-NEXT: ret424entry:425 %s0s = sext <4 x i16> %s0 to <4 x i32>426 %s1s = sext <4 x i16> %s1 to <4 x i32>427 %t0 = shufflevector <4 x i32> %s0s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>428 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>429 %m = mul <2 x i32> %t0, %t1430 ret <2 x i32> %m431}432 433define <2 x i32> @mulws_v4i16_0(<2 x i32> %s0, <4 x i16> %s1) {434; CHECK-LABEL: mulws_v4i16_0:435; CHECK: // %bb.0: // %entry436; CHECK-NEXT: sshll v1.4s, v1.4h, #0437; CHECK-NEXT: mul v0.2s, v0.2s, v1.2s438; CHECK-NEXT: ret439entry:440 %s1s = sext <4 x i16> %s1 to <4 x i32>441 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>442 %m = mul <2 x i32> %s0, %t1443 ret <2 x i32> %m444}445 446define <2 x i32> @mullu_v4i16_0(<4 x i16> %s0, <4 x i16> %s1) {447; CHECK-SD-LABEL: mullu_v4i16_0:448; CHECK-SD: // %bb.0: // %entry449; CHECK-SD-NEXT: umull v0.4s, v0.4h, v1.4h450; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0451; CHECK-SD-NEXT: ret452;453; CHECK-GI-LABEL: mullu_v4i16_0:454; CHECK-GI: // %bb.0: // %entry455; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0456; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0457; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s458; CHECK-GI-NEXT: ret459entry:460 %s0s = zext <4 x i16> %s0 to <4 x i32>461 %s1s = zext <4 x i16> %s1 to <4 x i32>462 %t0 = shufflevector <4 x i32> %s0s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>463 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>464 %m = mul <2 x i32> %t0, %t1465 ret <2 x i32> %m466}467 468define <2 x i32> @mulwu_v4i16_0(<2 x i32> %s0, <4 x i16> %s1) {469; CHECK-LABEL: mulwu_v4i16_0:470; CHECK: // %bb.0: // %entry471; CHECK-NEXT: ushll v1.4s, v1.4h, #0472; CHECK-NEXT: mul v0.2s, v0.2s, v1.2s473; CHECK-NEXT: ret474entry:475 %s1s = zext <4 x i16> %s1 to <4 x i32>476 %t1 = shufflevector <4 x i32> %s1s, <4 x i32> poison, <2 x i32> <i32 0, i32 1>477 %m = mul <2 x i32> %s0, %t1478 ret <2 x i32> %m479}480 481define <1 x i64> @addls_v2i32_0(<2 x i32> %s0, <2 x i32> %s1) {482; CHECK-SD-LABEL: addls_v2i32_0:483; CHECK-SD: // %bb.0: // %entry484; CHECK-SD-NEXT: saddl v0.2d, v0.2s, v1.2s485; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0486; CHECK-SD-NEXT: ret487;488; CHECK-GI-LABEL: addls_v2i32_0:489; CHECK-GI: // %bb.0: // %entry490; CHECK-GI-NEXT: sshll v0.2d, v0.2s, #0491; CHECK-GI-NEXT: sshll v1.2d, v1.2s, #0492; CHECK-GI-NEXT: fmov x8, d0493; CHECK-GI-NEXT: fmov x9, d1494; CHECK-GI-NEXT: add x8, x8, x9495; CHECK-GI-NEXT: fmov d0, x8496; CHECK-GI-NEXT: ret497entry:498 %s0s = sext <2 x i32> %s0 to <2 x i64>499 %s1s = sext <2 x i32> %s1 to <2 x i64>500 %t0 = shufflevector <2 x i64> %s0s, <2 x i64> poison, <1 x i32> <i32 0>501 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>502 %m = add <1 x i64> %t0, %t1503 ret <1 x i64> %m504}505 506define <1 x i64> @addws_v2i32_0(<1 x i64> %s0, <2 x i32> %s1) {507; CHECK-SD-LABEL: addws_v2i32_0:508; CHECK-SD: // %bb.0: // %entry509; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0510; CHECK-SD-NEXT: saddw v0.2d, v0.2d, v1.2s511; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0512; CHECK-SD-NEXT: ret513;514; CHECK-GI-LABEL: addws_v2i32_0:515; CHECK-GI: // %bb.0: // %entry516; CHECK-GI-NEXT: sshll v1.2d, v1.2s, #0517; CHECK-GI-NEXT: fmov x8, d0518; CHECK-GI-NEXT: fmov x9, d1519; CHECK-GI-NEXT: add x8, x8, x9520; CHECK-GI-NEXT: fmov d0, x8521; CHECK-GI-NEXT: ret522entry:523 %s1s = sext <2 x i32> %s1 to <2 x i64>524 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>525 %m = add <1 x i64> %s0, %t1526 ret <1 x i64> %m527}528 529define <1 x i64> @addlu_v2i32_0(<2 x i32> %s0, <2 x i32> %s1) {530; CHECK-SD-LABEL: addlu_v2i32_0:531; CHECK-SD: // %bb.0: // %entry532; CHECK-SD-NEXT: uaddl v0.2d, v0.2s, v1.2s533; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0534; CHECK-SD-NEXT: ret535;536; CHECK-GI-LABEL: addlu_v2i32_0:537; CHECK-GI: // %bb.0: // %entry538; CHECK-GI-NEXT: ushll v0.2d, v0.2s, #0539; CHECK-GI-NEXT: ushll v1.2d, v1.2s, #0540; CHECK-GI-NEXT: fmov x8, d0541; CHECK-GI-NEXT: fmov x9, d1542; CHECK-GI-NEXT: add x8, x8, x9543; CHECK-GI-NEXT: fmov d0, x8544; CHECK-GI-NEXT: ret545entry:546 %s0s = zext <2 x i32> %s0 to <2 x i64>547 %s1s = zext <2 x i32> %s1 to <2 x i64>548 %t0 = shufflevector <2 x i64> %s0s, <2 x i64> poison, <1 x i32> <i32 0>549 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>550 %m = add <1 x i64> %t0, %t1551 ret <1 x i64> %m552}553 554define <1 x i64> @addwu_v2i32_0(<1 x i64> %s0, <2 x i32> %s1) {555; CHECK-SD-LABEL: addwu_v2i32_0:556; CHECK-SD: // %bb.0: // %entry557; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0558; CHECK-SD-NEXT: uaddw v0.2d, v0.2d, v1.2s559; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0560; CHECK-SD-NEXT: ret561;562; CHECK-GI-LABEL: addwu_v2i32_0:563; CHECK-GI: // %bb.0: // %entry564; CHECK-GI-NEXT: ushll v1.2d, v1.2s, #0565; CHECK-GI-NEXT: fmov x8, d0566; CHECK-GI-NEXT: fmov x9, d1567; CHECK-GI-NEXT: add x8, x8, x9568; CHECK-GI-NEXT: fmov d0, x8569; CHECK-GI-NEXT: ret570entry:571 %s1s = zext <2 x i32> %s1 to <2 x i64>572 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>573 %m = add <1 x i64> %s0, %t1574 ret <1 x i64> %m575}576 577define <1 x i64> @subls_v2i32_0(<2 x i32> %s0, <2 x i32> %s1) {578; CHECK-SD-LABEL: subls_v2i32_0:579; CHECK-SD: // %bb.0: // %entry580; CHECK-SD-NEXT: ssubl v0.2d, v0.2s, v1.2s581; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0582; CHECK-SD-NEXT: ret583;584; CHECK-GI-LABEL: subls_v2i32_0:585; CHECK-GI: // %bb.0: // %entry586; CHECK-GI-NEXT: sshll v0.2d, v0.2s, #0587; CHECK-GI-NEXT: sshll v1.2d, v1.2s, #0588; CHECK-GI-NEXT: fmov x8, d0589; CHECK-GI-NEXT: fmov x9, d1590; CHECK-GI-NEXT: sub x8, x8, x9591; CHECK-GI-NEXT: fmov d0, x8592; CHECK-GI-NEXT: ret593entry:594 %s0s = sext <2 x i32> %s0 to <2 x i64>595 %s1s = sext <2 x i32> %s1 to <2 x i64>596 %t0 = shufflevector <2 x i64> %s0s, <2 x i64> poison, <1 x i32> <i32 0>597 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>598 %m = sub <1 x i64> %t0, %t1599 ret <1 x i64> %m600}601 602define <1 x i64> @subws_v2i32_0(<1 x i64> %s0, <2 x i32> %s1) {603; CHECK-SD-LABEL: subws_v2i32_0:604; CHECK-SD: // %bb.0: // %entry605; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0606; CHECK-SD-NEXT: ssubw v0.2d, v0.2d, v1.2s607; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0608; CHECK-SD-NEXT: ret609;610; CHECK-GI-LABEL: subws_v2i32_0:611; CHECK-GI: // %bb.0: // %entry612; CHECK-GI-NEXT: sshll v1.2d, v1.2s, #0613; CHECK-GI-NEXT: fmov x8, d0614; CHECK-GI-NEXT: fmov x9, d1615; CHECK-GI-NEXT: sub x8, x8, x9616; CHECK-GI-NEXT: fmov d0, x8617; CHECK-GI-NEXT: ret618entry:619 %s1s = sext <2 x i32> %s1 to <2 x i64>620 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>621 %m = sub <1 x i64> %s0, %t1622 ret <1 x i64> %m623}624 625define <1 x i64> @sublu_v2i32_0(<2 x i32> %s0, <2 x i32> %s1) {626; CHECK-SD-LABEL: sublu_v2i32_0:627; CHECK-SD: // %bb.0: // %entry628; CHECK-SD-NEXT: usubl v0.2d, v0.2s, v1.2s629; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0630; CHECK-SD-NEXT: ret631;632; CHECK-GI-LABEL: sublu_v2i32_0:633; CHECK-GI: // %bb.0: // %entry634; CHECK-GI-NEXT: ushll v0.2d, v0.2s, #0635; CHECK-GI-NEXT: ushll v1.2d, v1.2s, #0636; CHECK-GI-NEXT: fmov x8, d0637; CHECK-GI-NEXT: fmov x9, d1638; CHECK-GI-NEXT: sub x8, x8, x9639; CHECK-GI-NEXT: fmov d0, x8640; CHECK-GI-NEXT: ret641entry:642 %s0s = zext <2 x i32> %s0 to <2 x i64>643 %s1s = zext <2 x i32> %s1 to <2 x i64>644 %t0 = shufflevector <2 x i64> %s0s, <2 x i64> poison, <1 x i32> <i32 0>645 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>646 %m = sub <1 x i64> %t0, %t1647 ret <1 x i64> %m648}649 650define <1 x i64> @subwu_v2i32_0(<1 x i64> %s0, <2 x i32> %s1) {651; CHECK-SD-LABEL: subwu_v2i32_0:652; CHECK-SD: // %bb.0: // %entry653; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0654; CHECK-SD-NEXT: usubw v0.2d, v0.2d, v1.2s655; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0656; CHECK-SD-NEXT: ret657;658; CHECK-GI-LABEL: subwu_v2i32_0:659; CHECK-GI: // %bb.0: // %entry660; CHECK-GI-NEXT: ushll v1.2d, v1.2s, #0661; CHECK-GI-NEXT: fmov x8, d0662; CHECK-GI-NEXT: fmov x9, d1663; CHECK-GI-NEXT: sub x8, x8, x9664; CHECK-GI-NEXT: fmov d0, x8665; CHECK-GI-NEXT: ret666entry:667 %s1s = zext <2 x i32> %s1 to <2 x i64>668 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>669 %m = sub <1 x i64> %s0, %t1670 ret <1 x i64> %m671}672 673define <1 x i64> @mulls_v2i32_0(<2 x i32> %s0, <2 x i32> %s1) {674; CHECK-SD-LABEL: mulls_v2i32_0:675; CHECK-SD: // %bb.0: // %entry676; CHECK-SD-NEXT: smull v0.2d, v0.2s, v1.2s677; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0678; CHECK-SD-NEXT: ret679;680; CHECK-GI-LABEL: mulls_v2i32_0:681; CHECK-GI: // %bb.0: // %entry682; CHECK-GI-NEXT: sshll v0.2d, v0.2s, #0683; CHECK-GI-NEXT: sshll v1.2d, v1.2s, #0684; CHECK-GI-NEXT: fmov x8, d0685; CHECK-GI-NEXT: fmov x9, d1686; CHECK-GI-NEXT: mul x8, x8, x9687; CHECK-GI-NEXT: fmov d0, x8688; CHECK-GI-NEXT: ret689entry:690 %s0s = sext <2 x i32> %s0 to <2 x i64>691 %s1s = sext <2 x i32> %s1 to <2 x i64>692 %t0 = shufflevector <2 x i64> %s0s, <2 x i64> poison, <1 x i32> <i32 0>693 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>694 %m = mul <1 x i64> %t0, %t1695 ret <1 x i64> %m696}697 698define <1 x i64> @mulws_v2i32_0(<1 x i64> %s0, <2 x i32> %s1) {699; CHECK-SD-LABEL: mulws_v2i32_0:700; CHECK-SD: // %bb.0: // %entry701; CHECK-SD-NEXT: sshll v1.2d, v1.2s, #0702; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0703; CHECK-SD-NEXT: fmov x8, d0704; CHECK-SD-NEXT: fmov x9, d1705; CHECK-SD-NEXT: mul x8, x8, x9706; CHECK-SD-NEXT: fmov d0, x8707; CHECK-SD-NEXT: ret708;709; CHECK-GI-LABEL: mulws_v2i32_0:710; CHECK-GI: // %bb.0: // %entry711; CHECK-GI-NEXT: sshll v1.2d, v1.2s, #0712; CHECK-GI-NEXT: fmov x8, d0713; CHECK-GI-NEXT: fmov x9, d1714; CHECK-GI-NEXT: mul x8, x8, x9715; CHECK-GI-NEXT: fmov d0, x8716; CHECK-GI-NEXT: ret717entry:718 %s1s = sext <2 x i32> %s1 to <2 x i64>719 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>720 %m = mul <1 x i64> %s0, %t1721 ret <1 x i64> %m722}723 724define <1 x i64> @mullu_v2i32_0(<2 x i32> %s0, <2 x i32> %s1) {725; CHECK-SD-LABEL: mullu_v2i32_0:726; CHECK-SD: // %bb.0: // %entry727; CHECK-SD-NEXT: umull v0.2d, v0.2s, v1.2s728; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0729; CHECK-SD-NEXT: ret730;731; CHECK-GI-LABEL: mullu_v2i32_0:732; CHECK-GI: // %bb.0: // %entry733; CHECK-GI-NEXT: ushll v0.2d, v0.2s, #0734; CHECK-GI-NEXT: ushll v1.2d, v1.2s, #0735; CHECK-GI-NEXT: fmov x8, d0736; CHECK-GI-NEXT: fmov x9, d1737; CHECK-GI-NEXT: umull x8, w8, w9738; CHECK-GI-NEXT: fmov d0, x8739; CHECK-GI-NEXT: ret740entry:741 %s0s = zext <2 x i32> %s0 to <2 x i64>742 %s1s = zext <2 x i32> %s1 to <2 x i64>743 %t0 = shufflevector <2 x i64> %s0s, <2 x i64> poison, <1 x i32> <i32 0>744 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>745 %m = mul <1 x i64> %t0, %t1746 ret <1 x i64> %m747}748 749define <1 x i64> @mulwu_v2i32_0(<1 x i64> %s0, <2 x i32> %s1) {750; CHECK-SD-LABEL: mulwu_v2i32_0:751; CHECK-SD: // %bb.0: // %entry752; CHECK-SD-NEXT: ushll v1.2d, v1.2s, #0753; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0754; CHECK-SD-NEXT: fmov x8, d0755; CHECK-SD-NEXT: fmov x9, d1756; CHECK-SD-NEXT: mul x8, x8, x9757; CHECK-SD-NEXT: fmov d0, x8758; CHECK-SD-NEXT: ret759;760; CHECK-GI-LABEL: mulwu_v2i32_0:761; CHECK-GI: // %bb.0: // %entry762; CHECK-GI-NEXT: ushll v1.2d, v1.2s, #0763; CHECK-GI-NEXT: fmov x8, d0764; CHECK-GI-NEXT: fmov x9, d1765; CHECK-GI-NEXT: mul x8, x8, x9766; CHECK-GI-NEXT: fmov d0, x8767; CHECK-GI-NEXT: ret768entry:769 %s1s = zext <2 x i32> %s1 to <2 x i64>770 %t1 = shufflevector <2 x i64> %s1s, <2 x i64> poison, <1 x i32> <i32 0>771 %m = mul <1 x i64> %s0, %t1772 ret <1 x i64> %m773}774 775define <2 x i8> @extract_scalable_vec() vscale_range(1,16) "target-features"="+sve" {776; CHECK-SD-LABEL: extract_scalable_vec:777; CHECK-SD: // %bb.0: // %entry778; CHECK-SD-NEXT: mov x8, xzr779; CHECK-SD-NEXT: index z1.s, #2, #3780; CHECK-SD-NEXT: ldr h0, [x8]781; CHECK-SD-NEXT: ushll v0.8h, v0.8b, #0782; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0783; CHECK-SD-NEXT: mul v0.2s, v0.2s, v1.2s784; CHECK-SD-NEXT: ret785;786; CHECK-GI-LABEL: extract_scalable_vec:787; CHECK-GI: // %bb.0: // %entry788; CHECK-GI-NEXT: mov x8, xzr789; CHECK-GI-NEXT: mov x9, #1 // =0x1790; CHECK-GI-NEXT: ld1 { v0.b }[0], [x8]791; CHECK-GI-NEXT: ldr b1, [x9]792; CHECK-GI-NEXT: adrp x8, .LCPI36_0793; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]794; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI36_0]795; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s796; CHECK-GI-NEXT: ret797entry:798 %0 = load <2 x i8>, ptr null, align 2799 %mul = mul <2 x i8> %0, <i8 2, i8 5>800 ret <2 x i8> %mul801}802