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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple aarch64 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple aarch64 -o - -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define <8 x i16> @extadds_v8i8_i16(<8 x i8> %s0, <8 x i8> %s1) {6; CHECK-LABEL: extadds_v8i8_i16:7; CHECK:       // %bb.0: // %entry8; CHECK-NEXT:    saddl v0.8h, v0.8b, v1.8b9; CHECK-NEXT:    ret10entry:11  %s0s = sext <8 x i8> %s0 to <8 x i16>12  %s1s = sext <8 x i8> %s1 to <8 x i16>13  %m = add <8 x i16> %s0s, %s1s14  ret <8 x i16> %m15}16 17define <8 x i16> @extaddu_v8i8_i16(<8 x i8> %s0, <8 x i8> %s1) {18; CHECK-LABEL: extaddu_v8i8_i16:19; CHECK:       // %bb.0: // %entry20; CHECK-NEXT:    uaddl v0.8h, v0.8b, v1.8b21; CHECK-NEXT:    ret22entry:23  %s0s = zext <8 x i8> %s0 to <8 x i16>24  %s1s = zext <8 x i8> %s1 to <8 x i16>25  %m = add <8 x i16> %s0s, %s1s26  ret <8 x i16> %m27}28 29define <16 x i16> @extadds_v16i8_i16(<16 x i8> %s0, <16 x i8> %s1) {30; CHECK-SD-LABEL: extadds_v16i8_i16:31; CHECK-SD:       // %bb.0: // %entry32; CHECK-SD-NEXT:    saddl2 v2.8h, v0.16b, v1.16b33; CHECK-SD-NEXT:    saddl v0.8h, v0.8b, v1.8b34; CHECK-SD-NEXT:    mov v1.16b, v2.16b35; CHECK-SD-NEXT:    ret36;37; CHECK-GI-LABEL: extadds_v16i8_i16:38; CHECK-GI:       // %bb.0: // %entry39; CHECK-GI-NEXT:    saddl v2.8h, v0.8b, v1.8b40; CHECK-GI-NEXT:    saddl2 v1.8h, v0.16b, v1.16b41; CHECK-GI-NEXT:    mov v0.16b, v2.16b42; CHECK-GI-NEXT:    ret43entry:44  %s0s = sext <16 x i8> %s0 to <16 x i16>45  %s1s = sext <16 x i8> %s1 to <16 x i16>46  %m = add <16 x i16> %s0s, %s1s47  ret <16 x i16> %m48}49 50define <16 x i16> @extaddu_v16i8_i16(<16 x i8> %s0, <16 x i8> %s1) {51; CHECK-SD-LABEL: extaddu_v16i8_i16:52; CHECK-SD:       // %bb.0: // %entry53; CHECK-SD-NEXT:    uaddl2 v2.8h, v0.16b, v1.16b54; CHECK-SD-NEXT:    uaddl v0.8h, v0.8b, v1.8b55; CHECK-SD-NEXT:    mov v1.16b, v2.16b56; CHECK-SD-NEXT:    ret57;58; CHECK-GI-LABEL: extaddu_v16i8_i16:59; CHECK-GI:       // %bb.0: // %entry60; CHECK-GI-NEXT:    uaddl v2.8h, v0.8b, v1.8b61; CHECK-GI-NEXT:    uaddl2 v1.8h, v0.16b, v1.16b62; CHECK-GI-NEXT:    mov v0.16b, v2.16b63; CHECK-GI-NEXT:    ret64entry:65  %s0s = zext <16 x i8> %s0 to <16 x i16>66  %s1s = zext <16 x i8> %s1 to <16 x i16>67  %m = add <16 x i16> %s0s, %s1s68  ret <16 x i16> %m69}70 71define <32 x i16> @extadds_v32i8_i16(<32 x i8> %s0, <32 x i8> %s1) {72; CHECK-SD-LABEL: extadds_v32i8_i16:73; CHECK-SD:       // %bb.0: // %entry74; CHECK-SD-NEXT:    saddl2 v4.8h, v1.16b, v3.16b75; CHECK-SD-NEXT:    saddl v5.8h, v0.8b, v2.8b76; CHECK-SD-NEXT:    saddl2 v6.8h, v0.16b, v2.16b77; CHECK-SD-NEXT:    saddl v2.8h, v1.8b, v3.8b78; CHECK-SD-NEXT:    mov v0.16b, v5.16b79; CHECK-SD-NEXT:    mov v1.16b, v6.16b80; CHECK-SD-NEXT:    mov v3.16b, v4.16b81; CHECK-SD-NEXT:    ret82;83; CHECK-GI-LABEL: extadds_v32i8_i16:84; CHECK-GI:       // %bb.0: // %entry85; CHECK-GI-NEXT:    saddl v4.8h, v0.8b, v2.8b86; CHECK-GI-NEXT:    saddl2 v5.8h, v0.16b, v2.16b87; CHECK-GI-NEXT:    saddl v2.8h, v1.8b, v3.8b88; CHECK-GI-NEXT:    saddl2 v3.8h, v1.16b, v3.16b89; CHECK-GI-NEXT:    mov v0.16b, v4.16b90; CHECK-GI-NEXT:    mov v1.16b, v5.16b91; CHECK-GI-NEXT:    ret92entry:93  %s0s = sext <32 x i8> %s0 to <32 x i16>94  %s1s = sext <32 x i8> %s1 to <32 x i16>95  %m = add <32 x i16> %s0s, %s1s96  ret <32 x i16> %m97}98 99define <32 x i16> @extaddu_v32i8_i16(<32 x i8> %s0, <32 x i8> %s1) {100; CHECK-SD-LABEL: extaddu_v32i8_i16:101; CHECK-SD:       // %bb.0: // %entry102; CHECK-SD-NEXT:    uaddl2 v4.8h, v1.16b, v3.16b103; CHECK-SD-NEXT:    uaddl v5.8h, v0.8b, v2.8b104; CHECK-SD-NEXT:    uaddl2 v6.8h, v0.16b, v2.16b105; CHECK-SD-NEXT:    uaddl v2.8h, v1.8b, v3.8b106; CHECK-SD-NEXT:    mov v0.16b, v5.16b107; CHECK-SD-NEXT:    mov v1.16b, v6.16b108; CHECK-SD-NEXT:    mov v3.16b, v4.16b109; CHECK-SD-NEXT:    ret110;111; CHECK-GI-LABEL: extaddu_v32i8_i16:112; CHECK-GI:       // %bb.0: // %entry113; CHECK-GI-NEXT:    uaddl v4.8h, v0.8b, v2.8b114; CHECK-GI-NEXT:    uaddl2 v5.8h, v0.16b, v2.16b115; CHECK-GI-NEXT:    uaddl v2.8h, v1.8b, v3.8b116; CHECK-GI-NEXT:    uaddl2 v3.8h, v1.16b, v3.16b117; CHECK-GI-NEXT:    mov v0.16b, v4.16b118; CHECK-GI-NEXT:    mov v1.16b, v5.16b119; CHECK-GI-NEXT:    ret120entry:121  %s0s = zext <32 x i8> %s0 to <32 x i16>122  %s1s = zext <32 x i8> %s1 to <32 x i16>123  %m = add <32 x i16> %s0s, %s1s124  ret <32 x i16> %m125}126 127define <8 x i32> @extadds_v8i8_i32(<8 x i8> %s0, <8 x i8> %s1) {128; CHECK-SD-LABEL: extadds_v8i8_i32:129; CHECK-SD:       // %bb.0: // %entry130; CHECK-SD-NEXT:    saddl v0.8h, v0.8b, v1.8b131; CHECK-SD-NEXT:    sshll2 v1.4s, v0.8h, #0132; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0133; CHECK-SD-NEXT:    ret134;135; CHECK-GI-LABEL: extadds_v8i8_i32:136; CHECK-GI:       // %bb.0: // %entry137; CHECK-GI-NEXT:    saddl v1.8h, v0.8b, v1.8b138; CHECK-GI-NEXT:    sshll v0.4s, v1.4h, #0139; CHECK-GI-NEXT:    sshll2 v1.4s, v1.8h, #0140; CHECK-GI-NEXT:    ret141entry:142  %s0s = sext <8 x i8> %s0 to <8 x i32>143  %s1s = sext <8 x i8> %s1 to <8 x i32>144  %m = add <8 x i32> %s0s, %s1s145  ret <8 x i32> %m146}147 148define <8 x i32> @extaddu_v8i8_i32(<8 x i8> %s0, <8 x i8> %s1) {149; CHECK-SD-LABEL: extaddu_v8i8_i32:150; CHECK-SD:       // %bb.0: // %entry151; CHECK-SD-NEXT:    uaddl v0.8h, v0.8b, v1.8b152; CHECK-SD-NEXT:    ushll2 v1.4s, v0.8h, #0153; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #0154; CHECK-SD-NEXT:    ret155;156; CHECK-GI-LABEL: extaddu_v8i8_i32:157; CHECK-GI:       // %bb.0: // %entry158; CHECK-GI-NEXT:    uaddl v1.8h, v0.8b, v1.8b159; CHECK-GI-NEXT:    ushll v0.4s, v1.4h, #0160; CHECK-GI-NEXT:    ushll2 v1.4s, v1.8h, #0161; CHECK-GI-NEXT:    ret162entry:163  %s0s = zext <8 x i8> %s0 to <8 x i32>164  %s1s = zext <8 x i8> %s1 to <8 x i32>165  %m = add <8 x i32> %s0s, %s1s166  ret <8 x i32> %m167}168 169define <8 x i32> @extsubs_v8i8_i32(<8 x i8> %s0, <8 x i8> %s1) {170; CHECK-SD-LABEL: extsubs_v8i8_i32:171; CHECK-SD:       // %bb.0: // %entry172; CHECK-SD-NEXT:    ssubl v0.8h, v0.8b, v1.8b173; CHECK-SD-NEXT:    sshll2 v1.4s, v0.8h, #0174; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0175; CHECK-SD-NEXT:    ret176;177; CHECK-GI-LABEL: extsubs_v8i8_i32:178; CHECK-GI:       // %bb.0: // %entry179; CHECK-GI-NEXT:    ssubl v1.8h, v0.8b, v1.8b180; CHECK-GI-NEXT:    sshll v0.4s, v1.4h, #0181; CHECK-GI-NEXT:    sshll2 v1.4s, v1.8h, #0182; CHECK-GI-NEXT:    ret183entry:184  %s0s = sext <8 x i8> %s0 to <8 x i32>185  %s1s = sext <8 x i8> %s1 to <8 x i32>186  %m = sub <8 x i32> %s0s, %s1s187  ret <8 x i32> %m188}189 190define <8 x i32> @extsubu_v8i8_i32(<8 x i8> %s0, <8 x i8> %s1) {191; CHECK-SD-LABEL: extsubu_v8i8_i32:192; CHECK-SD:       // %bb.0: // %entry193; CHECK-SD-NEXT:    usubl v0.8h, v0.8b, v1.8b194; CHECK-SD-NEXT:    sshll2 v1.4s, v0.8h, #0195; CHECK-SD-NEXT:    sshll v0.4s, v0.4h, #0196; CHECK-SD-NEXT:    ret197;198; CHECK-GI-LABEL: extsubu_v8i8_i32:199; CHECK-GI:       // %bb.0: // %entry200; CHECK-GI-NEXT:    usubl v1.8h, v0.8b, v1.8b201; CHECK-GI-NEXT:    sshll v0.4s, v1.4h, #0202; CHECK-GI-NEXT:    sshll2 v1.4s, v1.8h, #0203; CHECK-GI-NEXT:    ret204entry:205  %s0s = zext <8 x i8> %s0 to <8 x i32>206  %s1s = zext <8 x i8> %s1 to <8 x i32>207  %m = sub <8 x i32> %s0s, %s1s208  ret <8 x i32> %m209}210 211define <16 x i32> @extadds_v16i8_i32(<16 x i8> %s0, <16 x i8> %s1) {212; CHECK-SD-LABEL: extadds_v16i8_i32:213; CHECK-SD:       // %bb.0: // %entry214; CHECK-SD-NEXT:    saddl v2.8h, v0.8b, v1.8b215; CHECK-SD-NEXT:    saddl2 v4.8h, v0.16b, v1.16b216; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #0217; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #0218; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #0219; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #0220; CHECK-SD-NEXT:    ret221;222; CHECK-GI-LABEL: extadds_v16i8_i32:223; CHECK-GI:       // %bb.0: // %entry224; CHECK-GI-NEXT:    saddl v2.8h, v0.8b, v1.8b225; CHECK-GI-NEXT:    saddl2 v3.8h, v0.16b, v1.16b226; CHECK-GI-NEXT:    sshll v0.4s, v2.4h, #0227; CHECK-GI-NEXT:    sshll2 v1.4s, v2.8h, #0228; CHECK-GI-NEXT:    sshll v2.4s, v3.4h, #0229; CHECK-GI-NEXT:    sshll2 v3.4s, v3.8h, #0230; CHECK-GI-NEXT:    ret231entry:232  %s0s = sext <16 x i8> %s0 to <16 x i32>233  %s1s = sext <16 x i8> %s1 to <16 x i32>234  %m = add <16 x i32> %s0s, %s1s235  ret <16 x i32> %m236}237 238define <16 x i32> @extaddu_v16i8_i32(<16 x i8> %s0, <16 x i8> %s1) {239; CHECK-SD-LABEL: extaddu_v16i8_i32:240; CHECK-SD:       // %bb.0: // %entry241; CHECK-SD-NEXT:    uaddl v2.8h, v0.8b, v1.8b242; CHECK-SD-NEXT:    uaddl2 v4.8h, v0.16b, v1.16b243; CHECK-SD-NEXT:    ushll v0.4s, v2.4h, #0244; CHECK-SD-NEXT:    ushll2 v3.4s, v4.8h, #0245; CHECK-SD-NEXT:    ushll2 v1.4s, v2.8h, #0246; CHECK-SD-NEXT:    ushll v2.4s, v4.4h, #0247; CHECK-SD-NEXT:    ret248;249; CHECK-GI-LABEL: extaddu_v16i8_i32:250; CHECK-GI:       // %bb.0: // %entry251; CHECK-GI-NEXT:    uaddl v2.8h, v0.8b, v1.8b252; CHECK-GI-NEXT:    uaddl2 v3.8h, v0.16b, v1.16b253; CHECK-GI-NEXT:    ushll v0.4s, v2.4h, #0254; CHECK-GI-NEXT:    ushll2 v1.4s, v2.8h, #0255; CHECK-GI-NEXT:    ushll v2.4s, v3.4h, #0256; CHECK-GI-NEXT:    ushll2 v3.4s, v3.8h, #0257; CHECK-GI-NEXT:    ret258entry:259  %s0s = zext <16 x i8> %s0 to <16 x i32>260  %s1s = zext <16 x i8> %s1 to <16 x i32>261  %m = add <16 x i32> %s0s, %s1s262  ret <16 x i32> %m263}264 265define <16 x i32> @extsubs_v16i8_i32(<16 x i8> %s0, <16 x i8> %s1) {266; CHECK-SD-LABEL: extsubs_v16i8_i32:267; CHECK-SD:       // %bb.0: // %entry268; CHECK-SD-NEXT:    ssubl v2.8h, v0.8b, v1.8b269; CHECK-SD-NEXT:    ssubl2 v4.8h, v0.16b, v1.16b270; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #0271; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #0272; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #0273; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #0274; CHECK-SD-NEXT:    ret275;276; CHECK-GI-LABEL: extsubs_v16i8_i32:277; CHECK-GI:       // %bb.0: // %entry278; CHECK-GI-NEXT:    ssubl v2.8h, v0.8b, v1.8b279; CHECK-GI-NEXT:    ssubl2 v3.8h, v0.16b, v1.16b280; CHECK-GI-NEXT:    sshll v0.4s, v2.4h, #0281; CHECK-GI-NEXT:    sshll2 v1.4s, v2.8h, #0282; CHECK-GI-NEXT:    sshll v2.4s, v3.4h, #0283; CHECK-GI-NEXT:    sshll2 v3.4s, v3.8h, #0284; CHECK-GI-NEXT:    ret285entry:286  %s0s = sext <16 x i8> %s0 to <16 x i32>287  %s1s = sext <16 x i8> %s1 to <16 x i32>288  %m = sub <16 x i32> %s0s, %s1s289  ret <16 x i32> %m290}291 292define <16 x i32> @extsubu_v16i8_i32(<16 x i8> %s0, <16 x i8> %s1) {293; CHECK-SD-LABEL: extsubu_v16i8_i32:294; CHECK-SD:       // %bb.0: // %entry295; CHECK-SD-NEXT:    usubl v2.8h, v0.8b, v1.8b296; CHECK-SD-NEXT:    usubl2 v4.8h, v0.16b, v1.16b297; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #0298; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #0299; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #0300; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #0301; CHECK-SD-NEXT:    ret302;303; CHECK-GI-LABEL: extsubu_v16i8_i32:304; CHECK-GI:       // %bb.0: // %entry305; CHECK-GI-NEXT:    usubl v2.8h, v0.8b, v1.8b306; CHECK-GI-NEXT:    usubl2 v3.8h, v0.16b, v1.16b307; CHECK-GI-NEXT:    sshll v0.4s, v2.4h, #0308; CHECK-GI-NEXT:    sshll2 v1.4s, v2.8h, #0309; CHECK-GI-NEXT:    sshll v2.4s, v3.4h, #0310; CHECK-GI-NEXT:    sshll2 v3.4s, v3.8h, #0311; CHECK-GI-NEXT:    ret312entry:313  %s0s = zext <16 x i8> %s0 to <16 x i32>314  %s1s = zext <16 x i8> %s1 to <16 x i32>315  %m = sub <16 x i32> %s0s, %s1s316  ret <16 x i32> %m317}318 319define <8 x i64> @extadds_v8i8_i64(<8 x i8> %s0, <8 x i8> %s1) {320; CHECK-SD-LABEL: extadds_v8i8_i64:321; CHECK-SD:       // %bb.0: // %entry322; CHECK-SD-NEXT:    saddl v0.8h, v0.8b, v1.8b323; CHECK-SD-NEXT:    sshll v1.4s, v0.4h, #0324; CHECK-SD-NEXT:    sshll2 v2.4s, v0.8h, #0325; CHECK-SD-NEXT:    sshll v0.2d, v1.2s, #0326; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0327; CHECK-SD-NEXT:    sshll2 v1.2d, v1.4s, #0328; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0329; CHECK-SD-NEXT:    ret330;331; CHECK-GI-LABEL: extadds_v8i8_i64:332; CHECK-GI:       // %bb.0: // %entry333; CHECK-GI-NEXT:    saddl v0.8h, v0.8b, v1.8b334; CHECK-GI-NEXT:    sshll v1.4s, v0.4h, #0335; CHECK-GI-NEXT:    sshll2 v3.4s, v0.8h, #0336; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0337; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0338; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0339; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0340; CHECK-GI-NEXT:    ret341entry:342  %s0s = sext <8 x i8> %s0 to <8 x i64>343  %s1s = sext <8 x i8> %s1 to <8 x i64>344  %m = add <8 x i64> %s0s, %s1s345  ret <8 x i64> %m346}347 348define <8 x i64> @extaddu_v8i8_i64(<8 x i8> %s0, <8 x i8> %s1) {349; CHECK-SD-LABEL: extaddu_v8i8_i64:350; CHECK-SD:       // %bb.0: // %entry351; CHECK-SD-NEXT:    uaddl v0.8h, v0.8b, v1.8b352; CHECK-SD-NEXT:    ushll v1.4s, v0.4h, #0353; CHECK-SD-NEXT:    ushll2 v2.4s, v0.8h, #0354; CHECK-SD-NEXT:    ushll v0.2d, v1.2s, #0355; CHECK-SD-NEXT:    ushll2 v3.2d, v2.4s, #0356; CHECK-SD-NEXT:    ushll2 v1.2d, v1.4s, #0357; CHECK-SD-NEXT:    ushll v2.2d, v2.2s, #0358; CHECK-SD-NEXT:    ret359;360; CHECK-GI-LABEL: extaddu_v8i8_i64:361; CHECK-GI:       // %bb.0: // %entry362; CHECK-GI-NEXT:    uaddl v0.8h, v0.8b, v1.8b363; CHECK-GI-NEXT:    ushll v1.4s, v0.4h, #0364; CHECK-GI-NEXT:    ushll2 v3.4s, v0.8h, #0365; CHECK-GI-NEXT:    ushll v0.2d, v1.2s, #0366; CHECK-GI-NEXT:    ushll2 v1.2d, v1.4s, #0367; CHECK-GI-NEXT:    ushll v2.2d, v3.2s, #0368; CHECK-GI-NEXT:    ushll2 v3.2d, v3.4s, #0369; CHECK-GI-NEXT:    ret370entry:371  %s0s = zext <8 x i8> %s0 to <8 x i64>372  %s1s = zext <8 x i8> %s1 to <8 x i64>373  %m = add <8 x i64> %s0s, %s1s374  ret <8 x i64> %m375}376 377define <8 x i64> @extsubs_v8i8_i64(<8 x i8> %s0, <8 x i8> %s1) {378; CHECK-SD-LABEL: extsubs_v8i8_i64:379; CHECK-SD:       // %bb.0: // %entry380; CHECK-SD-NEXT:    ssubl v0.8h, v0.8b, v1.8b381; CHECK-SD-NEXT:    sshll v1.4s, v0.4h, #0382; CHECK-SD-NEXT:    sshll2 v2.4s, v0.8h, #0383; CHECK-SD-NEXT:    sshll v0.2d, v1.2s, #0384; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0385; CHECK-SD-NEXT:    sshll2 v1.2d, v1.4s, #0386; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0387; CHECK-SD-NEXT:    ret388;389; CHECK-GI-LABEL: extsubs_v8i8_i64:390; CHECK-GI:       // %bb.0: // %entry391; CHECK-GI-NEXT:    ssubl v0.8h, v0.8b, v1.8b392; CHECK-GI-NEXT:    sshll v1.4s, v0.4h, #0393; CHECK-GI-NEXT:    sshll2 v3.4s, v0.8h, #0394; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0395; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0396; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0397; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0398; CHECK-GI-NEXT:    ret399entry:400  %s0s = sext <8 x i8> %s0 to <8 x i64>401  %s1s = sext <8 x i8> %s1 to <8 x i64>402  %m = sub <8 x i64> %s0s, %s1s403  ret <8 x i64> %m404}405 406define <8 x i64> @extsubu_v8i8_i64(<8 x i8> %s0, <8 x i8> %s1) {407; CHECK-SD-LABEL: extsubu_v8i8_i64:408; CHECK-SD:       // %bb.0: // %entry409; CHECK-SD-NEXT:    usubl v0.8h, v0.8b, v1.8b410; CHECK-SD-NEXT:    sshll v1.4s, v0.4h, #0411; CHECK-SD-NEXT:    sshll2 v2.4s, v0.8h, #0412; CHECK-SD-NEXT:    sshll v0.2d, v1.2s, #0413; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0414; CHECK-SD-NEXT:    sshll2 v1.2d, v1.4s, #0415; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0416; CHECK-SD-NEXT:    ret417;418; CHECK-GI-LABEL: extsubu_v8i8_i64:419; CHECK-GI:       // %bb.0: // %entry420; CHECK-GI-NEXT:    usubl v0.8h, v0.8b, v1.8b421; CHECK-GI-NEXT:    sshll v1.4s, v0.4h, #0422; CHECK-GI-NEXT:    sshll2 v3.4s, v0.8h, #0423; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0424; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0425; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0426; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0427; CHECK-GI-NEXT:    ret428entry:429  %s0s = zext <8 x i8> %s0 to <8 x i64>430  %s1s = zext <8 x i8> %s1 to <8 x i64>431  %m = sub <8 x i64> %s0s, %s1s432  ret <8 x i64> %m433}434 435define <16 x i64> @extaddu_v16i8_i64(<16 x i8> %a, <16 x i8> %b) {436; CHECK-SD-LABEL: extaddu_v16i8_i64:437; CHECK-SD:       // %bb.0:438; CHECK-SD-NEXT:    uaddl v2.8h, v0.8b, v1.8b439; CHECK-SD-NEXT:    uaddl2 v0.8h, v0.16b, v1.16b440; CHECK-SD-NEXT:    ushll v3.4s, v2.4h, #0441; CHECK-SD-NEXT:    ushll2 v2.4s, v2.8h, #0442; CHECK-SD-NEXT:    ushll v5.4s, v0.4h, #0443; CHECK-SD-NEXT:    ushll2 v6.4s, v0.8h, #0444; CHECK-SD-NEXT:    ushll2 v1.2d, v3.4s, #0445; CHECK-SD-NEXT:    ushll v0.2d, v3.2s, #0446; CHECK-SD-NEXT:    ushll2 v3.2d, v2.4s, #0447; CHECK-SD-NEXT:    ushll v2.2d, v2.2s, #0448; CHECK-SD-NEXT:    ushll v4.2d, v5.2s, #0449; CHECK-SD-NEXT:    ushll2 v7.2d, v6.4s, #0450; CHECK-SD-NEXT:    ushll2 v5.2d, v5.4s, #0451; CHECK-SD-NEXT:    ushll v6.2d, v6.2s, #0452; CHECK-SD-NEXT:    ret453;454; CHECK-GI-LABEL: extaddu_v16i8_i64:455; CHECK-GI:       // %bb.0:456; CHECK-GI-NEXT:    uaddl v2.8h, v0.8b, v1.8b457; CHECK-GI-NEXT:    uaddl2 v0.8h, v0.16b, v1.16b458; CHECK-GI-NEXT:    ushll v1.4s, v2.4h, #0459; CHECK-GI-NEXT:    ushll2 v3.4s, v2.8h, #0460; CHECK-GI-NEXT:    ushll v5.4s, v0.4h, #0461; CHECK-GI-NEXT:    ushll2 v7.4s, v0.8h, #0462; CHECK-GI-NEXT:    ushll v0.2d, v1.2s, #0463; CHECK-GI-NEXT:    ushll2 v1.2d, v1.4s, #0464; CHECK-GI-NEXT:    ushll v2.2d, v3.2s, #0465; CHECK-GI-NEXT:    ushll2 v3.2d, v3.4s, #0466; CHECK-GI-NEXT:    ushll v4.2d, v5.2s, #0467; CHECK-GI-NEXT:    ushll2 v5.2d, v5.4s, #0468; CHECK-GI-NEXT:    ushll v6.2d, v7.2s, #0469; CHECK-GI-NEXT:    ushll2 v7.2d, v7.4s, #0470; CHECK-GI-NEXT:    ret471    %c = zext <16 x i8> %a to <16 x i64>472    %d = zext <16 x i8> %b to <16 x i64>473    %e = add <16 x i64> %c, %d474    ret <16 x i64> %e475}476 477define <16 x i64> @extadds_v16i8_i64(<16 x i8> %a, <16 x i8> %b) {478; CHECK-SD-LABEL: extadds_v16i8_i64:479; CHECK-SD:       // %bb.0:480; CHECK-SD-NEXT:    saddl v2.8h, v0.8b, v1.8b481; CHECK-SD-NEXT:    saddl2 v0.8h, v0.16b, v1.16b482; CHECK-SD-NEXT:    sshll v3.4s, v2.4h, #0483; CHECK-SD-NEXT:    sshll2 v2.4s, v2.8h, #0484; CHECK-SD-NEXT:    sshll v5.4s, v0.4h, #0485; CHECK-SD-NEXT:    sshll2 v6.4s, v0.8h, #0486; CHECK-SD-NEXT:    sshll2 v1.2d, v3.4s, #0487; CHECK-SD-NEXT:    sshll v0.2d, v3.2s, #0488; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0489; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0490; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0491; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0492; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0493; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0494; CHECK-SD-NEXT:    ret495;496; CHECK-GI-LABEL: extadds_v16i8_i64:497; CHECK-GI:       // %bb.0:498; CHECK-GI-NEXT:    saddl v2.8h, v0.8b, v1.8b499; CHECK-GI-NEXT:    saddl2 v0.8h, v0.16b, v1.16b500; CHECK-GI-NEXT:    sshll v1.4s, v2.4h, #0501; CHECK-GI-NEXT:    sshll2 v3.4s, v2.8h, #0502; CHECK-GI-NEXT:    sshll v5.4s, v0.4h, #0503; CHECK-GI-NEXT:    sshll2 v7.4s, v0.8h, #0504; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0505; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0506; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0507; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0508; CHECK-GI-NEXT:    sshll v4.2d, v5.2s, #0509; CHECK-GI-NEXT:    sshll2 v5.2d, v5.4s, #0510; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0511; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0512; CHECK-GI-NEXT:    ret513    %c = sext <16 x i8> %a to <16 x i64>514    %d = sext <16 x i8> %b to <16 x i64>515    %e = add <16 x i64> %c, %d516    ret <16 x i64> %e517}518 519define <16 x i64> @extsubu_v16i8_i64(<16 x i8> %a, <16 x i8> %b) {520; CHECK-SD-LABEL: extsubu_v16i8_i64:521; CHECK-SD:       // %bb.0:522; CHECK-SD-NEXT:    usubl v2.8h, v0.8b, v1.8b523; CHECK-SD-NEXT:    usubl2 v0.8h, v0.16b, v1.16b524; CHECK-SD-NEXT:    sshll v3.4s, v2.4h, #0525; CHECK-SD-NEXT:    sshll2 v2.4s, v2.8h, #0526; CHECK-SD-NEXT:    sshll v5.4s, v0.4h, #0527; CHECK-SD-NEXT:    sshll2 v6.4s, v0.8h, #0528; CHECK-SD-NEXT:    sshll2 v1.2d, v3.4s, #0529; CHECK-SD-NEXT:    sshll v0.2d, v3.2s, #0530; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0531; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0532; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0533; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0534; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0535; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0536; CHECK-SD-NEXT:    ret537;538; CHECK-GI-LABEL: extsubu_v16i8_i64:539; CHECK-GI:       // %bb.0:540; CHECK-GI-NEXT:    usubl v2.8h, v0.8b, v1.8b541; CHECK-GI-NEXT:    usubl2 v0.8h, v0.16b, v1.16b542; CHECK-GI-NEXT:    sshll v1.4s, v2.4h, #0543; CHECK-GI-NEXT:    sshll2 v3.4s, v2.8h, #0544; CHECK-GI-NEXT:    sshll v5.4s, v0.4h, #0545; CHECK-GI-NEXT:    sshll2 v7.4s, v0.8h, #0546; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0547; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0548; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0549; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0550; CHECK-GI-NEXT:    sshll v4.2d, v5.2s, #0551; CHECK-GI-NEXT:    sshll2 v5.2d, v5.4s, #0552; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0553; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0554; CHECK-GI-NEXT:    ret555    %c = zext <16 x i8> %a to <16 x i64>556    %d = zext <16 x i8> %b to <16 x i64>557    %e = sub <16 x i64> %c, %d558    ret <16 x i64> %e559}560 561define <16 x i64> @extsubs_v16i8_i64(<16 x i8> %a, <16 x i8> %b) {562; CHECK-SD-LABEL: extsubs_v16i8_i64:563; CHECK-SD:       // %bb.0:564; CHECK-SD-NEXT:    ssubl v2.8h, v0.8b, v1.8b565; CHECK-SD-NEXT:    ssubl2 v0.8h, v0.16b, v1.16b566; CHECK-SD-NEXT:    sshll v3.4s, v2.4h, #0567; CHECK-SD-NEXT:    sshll2 v2.4s, v2.8h, #0568; CHECK-SD-NEXT:    sshll v5.4s, v0.4h, #0569; CHECK-SD-NEXT:    sshll2 v6.4s, v0.8h, #0570; CHECK-SD-NEXT:    sshll2 v1.2d, v3.4s, #0571; CHECK-SD-NEXT:    sshll v0.2d, v3.2s, #0572; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0573; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0574; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0575; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0576; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0577; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0578; CHECK-SD-NEXT:    ret579;580; CHECK-GI-LABEL: extsubs_v16i8_i64:581; CHECK-GI:       // %bb.0:582; CHECK-GI-NEXT:    ssubl v2.8h, v0.8b, v1.8b583; CHECK-GI-NEXT:    ssubl2 v0.8h, v0.16b, v1.16b584; CHECK-GI-NEXT:    sshll v1.4s, v2.4h, #0585; CHECK-GI-NEXT:    sshll2 v3.4s, v2.8h, #0586; CHECK-GI-NEXT:    sshll v5.4s, v0.4h, #0587; CHECK-GI-NEXT:    sshll2 v7.4s, v0.8h, #0588; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0589; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0590; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0591; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0592; CHECK-GI-NEXT:    sshll v4.2d, v5.2s, #0593; CHECK-GI-NEXT:    sshll2 v5.2d, v5.4s, #0594; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0595; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0596; CHECK-GI-NEXT:    ret597    %c = sext <16 x i8> %a to <16 x i64>598    %d = sext <16 x i8> %b to <16 x i64>599    %e = sub <16 x i64> %c, %d600    ret <16 x i64> %e601}602 603define <16 x i64> @extaddu_v16i16_i64(<16 x i16> %a, <16 x i16> %b) {604; CHECK-SD-LABEL: extaddu_v16i16_i64:605; CHECK-SD:       // %bb.0:606; CHECK-SD-NEXT:    uaddl v5.4s, v1.4h, v3.4h607; CHECK-SD-NEXT:    uaddl v4.4s, v0.4h, v2.4h608; CHECK-SD-NEXT:    uaddl2 v2.4s, v0.8h, v2.8h609; CHECK-SD-NEXT:    uaddl2 v6.4s, v1.8h, v3.8h610; CHECK-SD-NEXT:    ushll2 v1.2d, v4.4s, #0611; CHECK-SD-NEXT:    ushll v0.2d, v4.2s, #0612; CHECK-SD-NEXT:    ushll2 v3.2d, v2.4s, #0613; CHECK-SD-NEXT:    ushll v2.2d, v2.2s, #0614; CHECK-SD-NEXT:    ushll v4.2d, v5.2s, #0615; CHECK-SD-NEXT:    ushll2 v7.2d, v6.4s, #0616; CHECK-SD-NEXT:    ushll2 v5.2d, v5.4s, #0617; CHECK-SD-NEXT:    ushll v6.2d, v6.2s, #0618; CHECK-SD-NEXT:    ret619;620; CHECK-GI-LABEL: extaddu_v16i16_i64:621; CHECK-GI:       // %bb.0:622; CHECK-GI-NEXT:    uaddl v4.4s, v0.4h, v2.4h623; CHECK-GI-NEXT:    uaddl2 v5.4s, v0.8h, v2.8h624; CHECK-GI-NEXT:    uaddl v6.4s, v1.4h, v3.4h625; CHECK-GI-NEXT:    uaddl2 v7.4s, v1.8h, v3.8h626; CHECK-GI-NEXT:    ushll v0.2d, v4.2s, #0627; CHECK-GI-NEXT:    ushll2 v1.2d, v4.4s, #0628; CHECK-GI-NEXT:    ushll v2.2d, v5.2s, #0629; CHECK-GI-NEXT:    ushll2 v3.2d, v5.4s, #0630; CHECK-GI-NEXT:    ushll v4.2d, v6.2s, #0631; CHECK-GI-NEXT:    ushll2 v5.2d, v6.4s, #0632; CHECK-GI-NEXT:    ushll v6.2d, v7.2s, #0633; CHECK-GI-NEXT:    ushll2 v7.2d, v7.4s, #0634; CHECK-GI-NEXT:    ret635    %c = zext <16 x i16> %a to <16 x i64>636    %d = zext <16 x i16> %b to <16 x i64>637    %e = add <16 x i64> %c, %d638    ret <16 x i64> %e639}640 641define <16 x i64> @extadds_v16i16_i64(<16 x i16> %a, <16 x i16> %b) {642; CHECK-SD-LABEL: extadds_v16i16_i64:643; CHECK-SD:       // %bb.0:644; CHECK-SD-NEXT:    saddl v5.4s, v1.4h, v3.4h645; CHECK-SD-NEXT:    saddl v4.4s, v0.4h, v2.4h646; CHECK-SD-NEXT:    saddl2 v2.4s, v0.8h, v2.8h647; CHECK-SD-NEXT:    saddl2 v6.4s, v1.8h, v3.8h648; CHECK-SD-NEXT:    sshll2 v1.2d, v4.4s, #0649; CHECK-SD-NEXT:    sshll v0.2d, v4.2s, #0650; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0651; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0652; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0653; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0654; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0655; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0656; CHECK-SD-NEXT:    ret657;658; CHECK-GI-LABEL: extadds_v16i16_i64:659; CHECK-GI:       // %bb.0:660; CHECK-GI-NEXT:    saddl v4.4s, v0.4h, v2.4h661; CHECK-GI-NEXT:    saddl2 v5.4s, v0.8h, v2.8h662; CHECK-GI-NEXT:    saddl v6.4s, v1.4h, v3.4h663; CHECK-GI-NEXT:    saddl2 v7.4s, v1.8h, v3.8h664; CHECK-GI-NEXT:    sshll v0.2d, v4.2s, #0665; CHECK-GI-NEXT:    sshll2 v1.2d, v4.4s, #0666; CHECK-GI-NEXT:    sshll v2.2d, v5.2s, #0667; CHECK-GI-NEXT:    sshll2 v3.2d, v5.4s, #0668; CHECK-GI-NEXT:    sshll v4.2d, v6.2s, #0669; CHECK-GI-NEXT:    sshll2 v5.2d, v6.4s, #0670; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0671; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0672; CHECK-GI-NEXT:    ret673    %c = sext <16 x i16> %a to <16 x i64>674    %d = sext <16 x i16> %b to <16 x i64>675    %e = add <16 x i64> %c, %d676    ret <16 x i64> %e677}678 679define <16 x i64> @extsubu_v16i16_i64(<16 x i16> %a, <16 x i16> %b) {680; CHECK-SD-LABEL: extsubu_v16i16_i64:681; CHECK-SD:       // %bb.0:682; CHECK-SD-NEXT:    usubl v5.4s, v1.4h, v3.4h683; CHECK-SD-NEXT:    usubl v4.4s, v0.4h, v2.4h684; CHECK-SD-NEXT:    usubl2 v2.4s, v0.8h, v2.8h685; CHECK-SD-NEXT:    usubl2 v6.4s, v1.8h, v3.8h686; CHECK-SD-NEXT:    sshll2 v1.2d, v4.4s, #0687; CHECK-SD-NEXT:    sshll v0.2d, v4.2s, #0688; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0689; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0690; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0691; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0692; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0693; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0694; CHECK-SD-NEXT:    ret695;696; CHECK-GI-LABEL: extsubu_v16i16_i64:697; CHECK-GI:       // %bb.0:698; CHECK-GI-NEXT:    usubl v4.4s, v0.4h, v2.4h699; CHECK-GI-NEXT:    usubl2 v5.4s, v0.8h, v2.8h700; CHECK-GI-NEXT:    usubl v6.4s, v1.4h, v3.4h701; CHECK-GI-NEXT:    usubl2 v7.4s, v1.8h, v3.8h702; CHECK-GI-NEXT:    sshll v0.2d, v4.2s, #0703; CHECK-GI-NEXT:    sshll2 v1.2d, v4.4s, #0704; CHECK-GI-NEXT:    sshll v2.2d, v5.2s, #0705; CHECK-GI-NEXT:    sshll2 v3.2d, v5.4s, #0706; CHECK-GI-NEXT:    sshll v4.2d, v6.2s, #0707; CHECK-GI-NEXT:    sshll2 v5.2d, v6.4s, #0708; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0709; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0710; CHECK-GI-NEXT:    ret711    %c = zext <16 x i16> %a to <16 x i64>712    %d = zext <16 x i16> %b to <16 x i64>713    %e = sub <16 x i64> %c, %d714    ret <16 x i64> %e715}716 717define <16 x i64> @extsubs_v16i16_i64(<16 x i16> %a, <16 x i16> %b) {718; CHECK-SD-LABEL: extsubs_v16i16_i64:719; CHECK-SD:       // %bb.0:720; CHECK-SD-NEXT:    ssubl v5.4s, v1.4h, v3.4h721; CHECK-SD-NEXT:    ssubl v4.4s, v0.4h, v2.4h722; CHECK-SD-NEXT:    ssubl2 v2.4s, v0.8h, v2.8h723; CHECK-SD-NEXT:    ssubl2 v6.4s, v1.8h, v3.8h724; CHECK-SD-NEXT:    sshll2 v1.2d, v4.4s, #0725; CHECK-SD-NEXT:    sshll v0.2d, v4.2s, #0726; CHECK-SD-NEXT:    sshll2 v3.2d, v2.4s, #0727; CHECK-SD-NEXT:    sshll v2.2d, v2.2s, #0728; CHECK-SD-NEXT:    sshll v4.2d, v5.2s, #0729; CHECK-SD-NEXT:    sshll2 v7.2d, v6.4s, #0730; CHECK-SD-NEXT:    sshll2 v5.2d, v5.4s, #0731; CHECK-SD-NEXT:    sshll v6.2d, v6.2s, #0732; CHECK-SD-NEXT:    ret733;734; CHECK-GI-LABEL: extsubs_v16i16_i64:735; CHECK-GI:       // %bb.0:736; CHECK-GI-NEXT:    ssubl v4.4s, v0.4h, v2.4h737; CHECK-GI-NEXT:    ssubl2 v5.4s, v0.8h, v2.8h738; CHECK-GI-NEXT:    ssubl v6.4s, v1.4h, v3.4h739; CHECK-GI-NEXT:    ssubl2 v7.4s, v1.8h, v3.8h740; CHECK-GI-NEXT:    sshll v0.2d, v4.2s, #0741; CHECK-GI-NEXT:    sshll2 v1.2d, v4.4s, #0742; CHECK-GI-NEXT:    sshll v2.2d, v5.2s, #0743; CHECK-GI-NEXT:    sshll2 v3.2d, v5.4s, #0744; CHECK-GI-NEXT:    sshll v4.2d, v6.2s, #0745; CHECK-GI-NEXT:    sshll2 v5.2d, v6.4s, #0746; CHECK-GI-NEXT:    sshll v6.2d, v7.2s, #0747; CHECK-GI-NEXT:    sshll2 v7.2d, v7.4s, #0748; CHECK-GI-NEXT:    ret749    %c = sext <16 x i16> %a to <16 x i64>750    %d = sext <16 x i16> %b to <16 x i64>751    %e = sub <16 x i64> %c, %d752    ret <16 x i64> %e753}754 755define <4 x i32> @extadds_v4i16_i32(<4 x i16> %s0, <4 x i16> %s1) {756; CHECK-LABEL: extadds_v4i16_i32:757; CHECK:       // %bb.0: // %entry758; CHECK-NEXT:    saddl v0.4s, v0.4h, v1.4h759; CHECK-NEXT:    ret760entry:761  %s0s = sext <4 x i16> %s0 to <4 x i32>762  %s1s = sext <4 x i16> %s1 to <4 x i32>763  %m = add <4 x i32> %s0s, %s1s764  ret <4 x i32> %m765}766 767define <4 x i32> @extaddu_v4i16_i32(<4 x i16> %s0, <4 x i16> %s1) {768; CHECK-LABEL: extaddu_v4i16_i32:769; CHECK:       // %bb.0: // %entry770; CHECK-NEXT:    uaddl v0.4s, v0.4h, v1.4h771; CHECK-NEXT:    ret772entry:773  %s0s = zext <4 x i16> %s0 to <4 x i32>774  %s1s = zext <4 x i16> %s1 to <4 x i32>775  %m = add <4 x i32> %s0s, %s1s776  ret <4 x i32> %m777}778 779define <8 x i32> @extadds_v8i16_i32(<8 x i16> %s0, <8 x i16> %s1) {780; CHECK-SD-LABEL: extadds_v8i16_i32:781; CHECK-SD:       // %bb.0: // %entry782; CHECK-SD-NEXT:    saddl2 v2.4s, v0.8h, v1.8h783; CHECK-SD-NEXT:    saddl v0.4s, v0.4h, v1.4h784; CHECK-SD-NEXT:    mov v1.16b, v2.16b785; CHECK-SD-NEXT:    ret786;787; CHECK-GI-LABEL: extadds_v8i16_i32:788; CHECK-GI:       // %bb.0: // %entry789; CHECK-GI-NEXT:    saddl v2.4s, v0.4h, v1.4h790; CHECK-GI-NEXT:    saddl2 v1.4s, v0.8h, v1.8h791; CHECK-GI-NEXT:    mov v0.16b, v2.16b792; CHECK-GI-NEXT:    ret793entry:794  %s0s = sext <8 x i16> %s0 to <8 x i32>795  %s1s = sext <8 x i16> %s1 to <8 x i32>796  %m = add <8 x i32> %s0s, %s1s797  ret <8 x i32> %m798}799 800define <8 x i32> @extaddu_v8i16_i32(<8 x i16> %s0, <8 x i16> %s1) {801; CHECK-SD-LABEL: extaddu_v8i16_i32:802; CHECK-SD:       // %bb.0: // %entry803; CHECK-SD-NEXT:    uaddl2 v2.4s, v0.8h, v1.8h804; CHECK-SD-NEXT:    uaddl v0.4s, v0.4h, v1.4h805; CHECK-SD-NEXT:    mov v1.16b, v2.16b806; CHECK-SD-NEXT:    ret807;808; CHECK-GI-LABEL: extaddu_v8i16_i32:809; CHECK-GI:       // %bb.0: // %entry810; CHECK-GI-NEXT:    uaddl v2.4s, v0.4h, v1.4h811; CHECK-GI-NEXT:    uaddl2 v1.4s, v0.8h, v1.8h812; CHECK-GI-NEXT:    mov v0.16b, v2.16b813; CHECK-GI-NEXT:    ret814entry:815  %s0s = zext <8 x i16> %s0 to <8 x i32>816  %s1s = zext <8 x i16> %s1 to <8 x i32>817  %m = add <8 x i32> %s0s, %s1s818  ret <8 x i32> %m819}820 821define <16 x i32> @extadds_v16i16_i32(<16 x i16> %s0, <16 x i16> %s1) {822; CHECK-SD-LABEL: extadds_v16i16_i32:823; CHECK-SD:       // %bb.0: // %entry824; CHECK-SD-NEXT:    saddl2 v4.4s, v1.8h, v3.8h825; CHECK-SD-NEXT:    saddl v5.4s, v0.4h, v2.4h826; CHECK-SD-NEXT:    saddl2 v6.4s, v0.8h, v2.8h827; CHECK-SD-NEXT:    saddl v2.4s, v1.4h, v3.4h828; CHECK-SD-NEXT:    mov v0.16b, v5.16b829; CHECK-SD-NEXT:    mov v1.16b, v6.16b830; CHECK-SD-NEXT:    mov v3.16b, v4.16b831; CHECK-SD-NEXT:    ret832;833; CHECK-GI-LABEL: extadds_v16i16_i32:834; CHECK-GI:       // %bb.0: // %entry835; CHECK-GI-NEXT:    saddl v4.4s, v0.4h, v2.4h836; CHECK-GI-NEXT:    saddl2 v5.4s, v0.8h, v2.8h837; CHECK-GI-NEXT:    saddl v2.4s, v1.4h, v3.4h838; CHECK-GI-NEXT:    saddl2 v3.4s, v1.8h, v3.8h839; CHECK-GI-NEXT:    mov v0.16b, v4.16b840; CHECK-GI-NEXT:    mov v1.16b, v5.16b841; CHECK-GI-NEXT:    ret842entry:843  %s0s = sext <16 x i16> %s0 to <16 x i32>844  %s1s = sext <16 x i16> %s1 to <16 x i32>845  %m = add <16 x i32> %s0s, %s1s846  ret <16 x i32> %m847}848 849define <16 x i32> @extaddu_v16i16_i32(<16 x i16> %s0, <16 x i16> %s1) {850; CHECK-SD-LABEL: extaddu_v16i16_i32:851; CHECK-SD:       // %bb.0: // %entry852; CHECK-SD-NEXT:    uaddl2 v4.4s, v1.8h, v3.8h853; CHECK-SD-NEXT:    uaddl v5.4s, v0.4h, v2.4h854; CHECK-SD-NEXT:    uaddl2 v6.4s, v0.8h, v2.8h855; CHECK-SD-NEXT:    uaddl v2.4s, v1.4h, v3.4h856; CHECK-SD-NEXT:    mov v0.16b, v5.16b857; CHECK-SD-NEXT:    mov v1.16b, v6.16b858; CHECK-SD-NEXT:    mov v3.16b, v4.16b859; CHECK-SD-NEXT:    ret860;861; CHECK-GI-LABEL: extaddu_v16i16_i32:862; CHECK-GI:       // %bb.0: // %entry863; CHECK-GI-NEXT:    uaddl v4.4s, v0.4h, v2.4h864; CHECK-GI-NEXT:    uaddl2 v5.4s, v0.8h, v2.8h865; CHECK-GI-NEXT:    uaddl v2.4s, v1.4h, v3.4h866; CHECK-GI-NEXT:    uaddl2 v3.4s, v1.8h, v3.8h867; CHECK-GI-NEXT:    mov v0.16b, v4.16b868; CHECK-GI-NEXT:    mov v1.16b, v5.16b869; CHECK-GI-NEXT:    ret870entry:871  %s0s = zext <16 x i16> %s0 to <16 x i32>872  %s1s = zext <16 x i16> %s1 to <16 x i32>873  %m = add <16 x i32> %s0s, %s1s874  ret <16 x i32> %m875}876 877define <4 x i64> @extadds_v4i16_i64(<4 x i16> %s0, <4 x i16> %s1) {878; CHECK-SD-LABEL: extadds_v4i16_i64:879; CHECK-SD:       // %bb.0: // %entry880; CHECK-SD-NEXT:    saddl v0.4s, v0.4h, v1.4h881; CHECK-SD-NEXT:    sshll2 v1.2d, v0.4s, #0882; CHECK-SD-NEXT:    sshll v0.2d, v0.2s, #0883; CHECK-SD-NEXT:    ret884;885; CHECK-GI-LABEL: extadds_v4i16_i64:886; CHECK-GI:       // %bb.0: // %entry887; CHECK-GI-NEXT:    saddl v1.4s, v0.4h, v1.4h888; CHECK-GI-NEXT:    sshll v0.2d, v1.2s, #0889; CHECK-GI-NEXT:    sshll2 v1.2d, v1.4s, #0890; CHECK-GI-NEXT:    ret891entry:892  %s0s = sext <4 x i16> %s0 to <4 x i64>893  %s1s = sext <4 x i16> %s1 to <4 x i64>894  %m = add <4 x i64> %s0s, %s1s895  ret <4 x i64> %m896}897 898define <4 x i64> @extaddu_v4i16_i64(<4 x i16> %s0, <4 x i16> %s1) {899; CHECK-SD-LABEL: extaddu_v4i16_i64:900; CHECK-SD:       // %bb.0: // %entry901; CHECK-SD-NEXT:    uaddl v0.4s, v0.4h, v1.4h902; CHECK-SD-NEXT:    ushll2 v1.2d, v0.4s, #0903; CHECK-SD-NEXT:    ushll v0.2d, v0.2s, #0904; CHECK-SD-NEXT:    ret905;906; CHECK-GI-LABEL: extaddu_v4i16_i64:907; CHECK-GI:       // %bb.0: // %entry908; CHECK-GI-NEXT:    uaddl v1.4s, v0.4h, v1.4h909; CHECK-GI-NEXT:    ushll v0.2d, v1.2s, #0910; CHECK-GI-NEXT:    ushll2 v1.2d, v1.4s, #0911; CHECK-GI-NEXT:    ret912entry:913  %s0s = zext <4 x i16> %s0 to <4 x i64>914  %s1s = zext <4 x i16> %s1 to <4 x i64>915  %m = add <4 x i64> %s0s, %s1s916  ret <4 x i64> %m917}918 919define <8 x i64> @extadds_v8i16_i64(<8 x i16> %s0, <8 x i16> %s1) {920; CHECK-SD-LABEL: extadds_v8i16_i64:921; CHECK-SD:       // %bb.0: // %entry922; CHECK-SD-NEXT:    saddl v2.4s, v0.4h, v1.4h923; CHECK-SD-NEXT:    saddl2 v4.4s, v0.8h, v1.8h924; CHECK-SD-NEXT:    sshll v0.2d, v2.2s, #0925; CHECK-SD-NEXT:    sshll2 v3.2d, v4.4s, #0926; CHECK-SD-NEXT:    sshll2 v1.2d, v2.4s, #0927; CHECK-SD-NEXT:    sshll v2.2d, v4.2s, #0928; CHECK-SD-NEXT:    ret929;930; CHECK-GI-LABEL: extadds_v8i16_i64:931; CHECK-GI:       // %bb.0: // %entry932; CHECK-GI-NEXT:    saddl v2.4s, v0.4h, v1.4h933; CHECK-GI-NEXT:    saddl2 v3.4s, v0.8h, v1.8h934; CHECK-GI-NEXT:    sshll v0.2d, v2.2s, #0935; CHECK-GI-NEXT:    sshll2 v1.2d, v2.4s, #0936; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0937; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0938; CHECK-GI-NEXT:    ret939entry:940  %s0s = sext <8 x i16> %s0 to <8 x i64>941  %s1s = sext <8 x i16> %s1 to <8 x i64>942  %m = add <8 x i64> %s0s, %s1s943  ret <8 x i64> %m944}945 946define <8 x i64> @extaddu_v8i16_i64(<8 x i16> %s0, <8 x i16> %s1) {947; CHECK-SD-LABEL: extaddu_v8i16_i64:948; CHECK-SD:       // %bb.0: // %entry949; CHECK-SD-NEXT:    uaddl v2.4s, v0.4h, v1.4h950; CHECK-SD-NEXT:    uaddl2 v4.4s, v0.8h, v1.8h951; CHECK-SD-NEXT:    ushll v0.2d, v2.2s, #0952; CHECK-SD-NEXT:    ushll2 v3.2d, v4.4s, #0953; CHECK-SD-NEXT:    ushll2 v1.2d, v2.4s, #0954; CHECK-SD-NEXT:    ushll v2.2d, v4.2s, #0955; CHECK-SD-NEXT:    ret956;957; CHECK-GI-LABEL: extaddu_v8i16_i64:958; CHECK-GI:       // %bb.0: // %entry959; CHECK-GI-NEXT:    uaddl v2.4s, v0.4h, v1.4h960; CHECK-GI-NEXT:    uaddl2 v3.4s, v0.8h, v1.8h961; CHECK-GI-NEXT:    ushll v0.2d, v2.2s, #0962; CHECK-GI-NEXT:    ushll2 v1.2d, v2.4s, #0963; CHECK-GI-NEXT:    ushll v2.2d, v3.2s, #0964; CHECK-GI-NEXT:    ushll2 v3.2d, v3.4s, #0965; CHECK-GI-NEXT:    ret966entry:967  %s0s = zext <8 x i16> %s0 to <8 x i64>968  %s1s = zext <8 x i16> %s1 to <8 x i64>969  %m = add <8 x i64> %s0s, %s1s970  ret <8 x i64> %m971}972 973define <8 x i64> @extsubs_v8i16_i64(<8 x i16> %s0, <8 x i16> %s1) {974; CHECK-SD-LABEL: extsubs_v8i16_i64:975; CHECK-SD:       // %bb.0: // %entry976; CHECK-SD-NEXT:    ssubl v2.4s, v0.4h, v1.4h977; CHECK-SD-NEXT:    ssubl2 v4.4s, v0.8h, v1.8h978; CHECK-SD-NEXT:    sshll v0.2d, v2.2s, #0979; CHECK-SD-NEXT:    sshll2 v3.2d, v4.4s, #0980; CHECK-SD-NEXT:    sshll2 v1.2d, v2.4s, #0981; CHECK-SD-NEXT:    sshll v2.2d, v4.2s, #0982; CHECK-SD-NEXT:    ret983;984; CHECK-GI-LABEL: extsubs_v8i16_i64:985; CHECK-GI:       // %bb.0: // %entry986; CHECK-GI-NEXT:    ssubl v2.4s, v0.4h, v1.4h987; CHECK-GI-NEXT:    ssubl2 v3.4s, v0.8h, v1.8h988; CHECK-GI-NEXT:    sshll v0.2d, v2.2s, #0989; CHECK-GI-NEXT:    sshll2 v1.2d, v2.4s, #0990; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #0991; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #0992; CHECK-GI-NEXT:    ret993entry:994  %s0s = sext <8 x i16> %s0 to <8 x i64>995  %s1s = sext <8 x i16> %s1 to <8 x i64>996  %m = sub <8 x i64> %s0s, %s1s997  ret <8 x i64> %m998}999 1000define <8 x i64> @extsubu_v8i16_i64(<8 x i16> %s0, <8 x i16> %s1) {1001; CHECK-SD-LABEL: extsubu_v8i16_i64:1002; CHECK-SD:       // %bb.0: // %entry1003; CHECK-SD-NEXT:    usubl v2.4s, v0.4h, v1.4h1004; CHECK-SD-NEXT:    usubl2 v4.4s, v0.8h, v1.8h1005; CHECK-SD-NEXT:    sshll v0.2d, v2.2s, #01006; CHECK-SD-NEXT:    sshll2 v3.2d, v4.4s, #01007; CHECK-SD-NEXT:    sshll2 v1.2d, v2.4s, #01008; CHECK-SD-NEXT:    sshll v2.2d, v4.2s, #01009; CHECK-SD-NEXT:    ret1010;1011; CHECK-GI-LABEL: extsubu_v8i16_i64:1012; CHECK-GI:       // %bb.0: // %entry1013; CHECK-GI-NEXT:    usubl v2.4s, v0.4h, v1.4h1014; CHECK-GI-NEXT:    usubl2 v3.4s, v0.8h, v1.8h1015; CHECK-GI-NEXT:    sshll v0.2d, v2.2s, #01016; CHECK-GI-NEXT:    sshll2 v1.2d, v2.4s, #01017; CHECK-GI-NEXT:    sshll v2.2d, v3.2s, #01018; CHECK-GI-NEXT:    sshll2 v3.2d, v3.4s, #01019; CHECK-GI-NEXT:    ret1020entry:1021  %s0s = zext <8 x i16> %s0 to <8 x i64>1022  %s1s = zext <8 x i16> %s1 to <8 x i64>1023  %m = sub <8 x i64> %s0s, %s1s1024  ret <8 x i64> %m1025}1026 1027define <2 x i64> @extadds_v2i32_i64(<2 x i32> %s0, <2 x i32> %s1) {1028; CHECK-LABEL: extadds_v2i32_i64:1029; CHECK:       // %bb.0: // %entry1030; CHECK-NEXT:    saddl v0.2d, v0.2s, v1.2s1031; CHECK-NEXT:    ret1032entry:1033  %s0s = sext <2 x i32> %s0 to <2 x i64>1034  %s1s = sext <2 x i32> %s1 to <2 x i64>1035  %m = add <2 x i64> %s0s, %s1s1036  ret <2 x i64> %m1037}1038 1039define <2 x i64> @extaddu_v2i32_i64(<2 x i32> %s0, <2 x i32> %s1) {1040; CHECK-LABEL: extaddu_v2i32_i64:1041; CHECK:       // %bb.0: // %entry1042; CHECK-NEXT:    uaddl v0.2d, v0.2s, v1.2s1043; CHECK-NEXT:    ret1044entry:1045  %s0s = zext <2 x i32> %s0 to <2 x i64>1046  %s1s = zext <2 x i32> %s1 to <2 x i64>1047  %m = add <2 x i64> %s0s, %s1s1048  ret <2 x i64> %m1049}1050 1051define <4 x i64> @extadds_v4i32_i64(<4 x i32> %s0, <4 x i32> %s1) {1052; CHECK-SD-LABEL: extadds_v4i32_i64:1053; CHECK-SD:       // %bb.0: // %entry1054; CHECK-SD-NEXT:    saddl2 v2.2d, v0.4s, v1.4s1055; CHECK-SD-NEXT:    saddl v0.2d, v0.2s, v1.2s1056; CHECK-SD-NEXT:    mov v1.16b, v2.16b1057; CHECK-SD-NEXT:    ret1058;1059; CHECK-GI-LABEL: extadds_v4i32_i64:1060; CHECK-GI:       // %bb.0: // %entry1061; CHECK-GI-NEXT:    saddl v2.2d, v0.2s, v1.2s1062; CHECK-GI-NEXT:    saddl2 v1.2d, v0.4s, v1.4s1063; CHECK-GI-NEXT:    mov v0.16b, v2.16b1064; CHECK-GI-NEXT:    ret1065entry:1066  %s0s = sext <4 x i32> %s0 to <4 x i64>1067  %s1s = sext <4 x i32> %s1 to <4 x i64>1068  %m = add <4 x i64> %s0s, %s1s1069  ret <4 x i64> %m1070}1071 1072define <4 x i64> @extaddu_v4i32_i64(<4 x i32> %s0, <4 x i32> %s1) {1073; CHECK-SD-LABEL: extaddu_v4i32_i64:1074; CHECK-SD:       // %bb.0: // %entry1075; CHECK-SD-NEXT:    uaddl2 v2.2d, v0.4s, v1.4s1076; CHECK-SD-NEXT:    uaddl v0.2d, v0.2s, v1.2s1077; CHECK-SD-NEXT:    mov v1.16b, v2.16b1078; CHECK-SD-NEXT:    ret1079;1080; CHECK-GI-LABEL: extaddu_v4i32_i64:1081; CHECK-GI:       // %bb.0: // %entry1082; CHECK-GI-NEXT:    uaddl v2.2d, v0.2s, v1.2s1083; CHECK-GI-NEXT:    uaddl2 v1.2d, v0.4s, v1.4s1084; CHECK-GI-NEXT:    mov v0.16b, v2.16b1085; CHECK-GI-NEXT:    ret1086entry:1087  %s0s = zext <4 x i32> %s0 to <4 x i64>1088  %s1s = zext <4 x i32> %s1 to <4 x i64>1089  %m = add <4 x i64> %s0s, %s1s1090  ret <4 x i64> %m1091}1092 1093define <8 x i64> @extadds_v8i32_i64(<8 x i32> %s0, <8 x i32> %s1) {1094; CHECK-SD-LABEL: extadds_v8i32_i64:1095; CHECK-SD:       // %bb.0: // %entry1096; CHECK-SD-NEXT:    saddl2 v4.2d, v1.4s, v3.4s1097; CHECK-SD-NEXT:    saddl v5.2d, v0.2s, v2.2s1098; CHECK-SD-NEXT:    saddl2 v6.2d, v0.4s, v2.4s1099; CHECK-SD-NEXT:    saddl v2.2d, v1.2s, v3.2s1100; CHECK-SD-NEXT:    mov v0.16b, v5.16b1101; CHECK-SD-NEXT:    mov v1.16b, v6.16b1102; CHECK-SD-NEXT:    mov v3.16b, v4.16b1103; CHECK-SD-NEXT:    ret1104;1105; CHECK-GI-LABEL: extadds_v8i32_i64:1106; CHECK-GI:       // %bb.0: // %entry1107; CHECK-GI-NEXT:    saddl v4.2d, v0.2s, v2.2s1108; CHECK-GI-NEXT:    saddl2 v5.2d, v0.4s, v2.4s1109; CHECK-GI-NEXT:    saddl v2.2d, v1.2s, v3.2s1110; CHECK-GI-NEXT:    saddl2 v3.2d, v1.4s, v3.4s1111; CHECK-GI-NEXT:    mov v0.16b, v4.16b1112; CHECK-GI-NEXT:    mov v1.16b, v5.16b1113; CHECK-GI-NEXT:    ret1114entry:1115  %s0s = sext <8 x i32> %s0 to <8 x i64>1116  %s1s = sext <8 x i32> %s1 to <8 x i64>1117  %m = add <8 x i64> %s0s, %s1s1118  ret <8 x i64> %m1119}1120 1121define <8 x i64> @extaddu_v8i32_i64(<8 x i32> %s0, <8 x i32> %s1) {1122; CHECK-SD-LABEL: extaddu_v8i32_i64:1123; CHECK-SD:       // %bb.0: // %entry1124; CHECK-SD-NEXT:    uaddl2 v4.2d, v1.4s, v3.4s1125; CHECK-SD-NEXT:    uaddl v5.2d, v0.2s, v2.2s1126; CHECK-SD-NEXT:    uaddl2 v6.2d, v0.4s, v2.4s1127; CHECK-SD-NEXT:    uaddl v2.2d, v1.2s, v3.2s1128; CHECK-SD-NEXT:    mov v0.16b, v5.16b1129; CHECK-SD-NEXT:    mov v1.16b, v6.16b1130; CHECK-SD-NEXT:    mov v3.16b, v4.16b1131; CHECK-SD-NEXT:    ret1132;1133; CHECK-GI-LABEL: extaddu_v8i32_i64:1134; CHECK-GI:       // %bb.0: // %entry1135; CHECK-GI-NEXT:    uaddl v4.2d, v0.2s, v2.2s1136; CHECK-GI-NEXT:    uaddl2 v5.2d, v0.4s, v2.4s1137; CHECK-GI-NEXT:    uaddl v2.2d, v1.2s, v3.2s1138; CHECK-GI-NEXT:    uaddl2 v3.2d, v1.4s, v3.4s1139; CHECK-GI-NEXT:    mov v0.16b, v4.16b1140; CHECK-GI-NEXT:    mov v1.16b, v5.16b1141; CHECK-GI-NEXT:    ret1142entry:1143  %s0s = zext <8 x i32> %s0 to <8 x i64>1144  %s1s = zext <8 x i32> %s1 to <8 x i64>1145  %m = add <8 x i64> %s0s, %s1s1146  ret <8 x i64> %m1147}1148 1149define <16 x i32> @add_zs(<16 x i8> %s0, <16 x i8> %s1) {1150; CHECK-SD-LABEL: add_zs:1151; CHECK-SD:       // %bb.0: // %entry1152; CHECK-SD-NEXT:    ushll v2.8h, v0.8b, #01153; CHECK-SD-NEXT:    ushll2 v0.8h, v0.16b, #01154; CHECK-SD-NEXT:    saddw v2.8h, v2.8h, v1.8b1155; CHECK-SD-NEXT:    saddw2 v4.8h, v0.8h, v1.16b1156; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #01157; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #01158; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #01159; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #01160; CHECK-SD-NEXT:    ret1161;1162; CHECK-GI-LABEL: add_zs:1163; CHECK-GI:       // %bb.0: // %entry1164; CHECK-GI-NEXT:    sshll v2.8h, v1.8b, #01165; CHECK-GI-NEXT:    sshll2 v1.8h, v1.16b, #01166; CHECK-GI-NEXT:    ushll v3.8h, v0.8b, #01167; CHECK-GI-NEXT:    ushll2 v4.8h, v0.16b, #01168; CHECK-GI-NEXT:    sshll v0.4s, v2.4h, #01169; CHECK-GI-NEXT:    sshll2 v2.4s, v2.8h, #01170; CHECK-GI-NEXT:    sshll v5.4s, v1.4h, #01171; CHECK-GI-NEXT:    sshll2 v6.4s, v1.8h, #01172; CHECK-GI-NEXT:    uaddw v0.4s, v0.4s, v3.4h1173; CHECK-GI-NEXT:    uaddw2 v1.4s, v2.4s, v3.8h1174; CHECK-GI-NEXT:    uaddw v2.4s, v5.4s, v4.4h1175; CHECK-GI-NEXT:    uaddw2 v3.4s, v6.4s, v4.8h1176; CHECK-GI-NEXT:    ret1177entry:1178  %s0s = zext <16 x i8> %s0 to <16 x i32>1179  %s1s = sext <16 x i8> %s1 to <16 x i32>1180  %m = add <16 x i32> %s0s, %s1s1181  ret <16 x i32> %m1182}1183 1184define <20 x i32> @v20(<20 x i8> %s0, <20 x i8> %s1) {1185; CHECK-SD-LABEL: v20:1186; CHECK-SD:       // %bb.0: // %entry1187; CHECK-SD-NEXT:    fmov s0, w01188; CHECK-SD-NEXT:    ldr b2, [sp, #160]1189; CHECK-SD-NEXT:    add x10, sp, #1681190; CHECK-SD-NEXT:    ldr b3, [sp]1191; CHECK-SD-NEXT:    add x11, sp, #81192; CHECK-SD-NEXT:    ldr b1, [sp, #96]1193; CHECK-SD-NEXT:    ld1 { v2.b }[1], [x10]1194; CHECK-SD-NEXT:    add x9, sp, #1041195; CHECK-SD-NEXT:    add x10, sp, #1761196; CHECK-SD-NEXT:    mov v0.b[1], w11197; CHECK-SD-NEXT:    ld1 { v3.b }[1], [x11]1198; CHECK-SD-NEXT:    ld1 { v1.b }[1], [x9]1199; CHECK-SD-NEXT:    add x11, sp, #161200; CHECK-SD-NEXT:    add x9, sp, #1121201; CHECK-SD-NEXT:    add x13, sp, #1841202; CHECK-SD-NEXT:    ld1 { v2.b }[2], [x10]1203; CHECK-SD-NEXT:    add x12, sp, #1201204; CHECK-SD-NEXT:    add x14, sp, #321205; CHECK-SD-NEXT:    ld1 { v3.b }[2], [x11]1206; CHECK-SD-NEXT:    ld1 { v1.b }[2], [x9]1207; CHECK-SD-NEXT:    ldr b5, [sp, #64]1208; CHECK-SD-NEXT:    mov v0.b[2], w21209; CHECK-SD-NEXT:    ldr b4, [sp, #224]1210; CHECK-SD-NEXT:    add x11, sp, #1281211; CHECK-SD-NEXT:    ld1 { v2.b }[3], [x13]1212; CHECK-SD-NEXT:    add x13, sp, #241213; CHECK-SD-NEXT:    add x10, sp, #1361214; CHECK-SD-NEXT:    ld1 { v3.b }[3], [x13]1215; CHECK-SD-NEXT:    ld1 { v1.b }[3], [x12]1216; CHECK-SD-NEXT:    add x12, sp, #1921217; CHECK-SD-NEXT:    add x13, sp, #2001218; CHECK-SD-NEXT:    add x15, sp, #801219; CHECK-SD-NEXT:    add x9, sp, #1441220; CHECK-SD-NEXT:    mov v0.b[3], w31221; CHECK-SD-NEXT:    ld1 { v2.b }[4], [x12]1222; CHECK-SD-NEXT:    add x12, sp, #2321223; CHECK-SD-NEXT:    ld1 { v3.b }[4], [x14]1224; CHECK-SD-NEXT:    add x14, sp, #721225; CHECK-SD-NEXT:    ld1 { v4.b }[1], [x12]1226; CHECK-SD-NEXT:    ld1 { v5.b }[1], [x14]1227; CHECK-SD-NEXT:    add x14, sp, #401228; CHECK-SD-NEXT:    ld1 { v1.b }[4], [x11]1229; CHECK-SD-NEXT:    ld1 { v2.b }[5], [x13]1230; CHECK-SD-NEXT:    add x12, sp, #2081231; CHECK-SD-NEXT:    add x13, sp, #481232; CHECK-SD-NEXT:    mov v0.b[4], w41233; CHECK-SD-NEXT:    ld1 { v3.b }[5], [x14]1234; CHECK-SD-NEXT:    add x14, sp, #2401235; CHECK-SD-NEXT:    ld1 { v4.b }[2], [x14]1236; CHECK-SD-NEXT:    ld1 { v5.b }[2], [x15]1237; CHECK-SD-NEXT:    ld1 { v1.b }[5], [x10]1238; CHECK-SD-NEXT:    ld1 { v2.b }[6], [x12]1239; CHECK-SD-NEXT:    add x11, sp, #2161240; CHECK-SD-NEXT:    add x10, sp, #561241; CHECK-SD-NEXT:    ld1 { v3.b }[6], [x13]1242; CHECK-SD-NEXT:    add x12, sp, #2481243; CHECK-SD-NEXT:    add x13, sp, #881244; CHECK-SD-NEXT:    mov v0.b[5], w51245; CHECK-SD-NEXT:    ld1 { v4.b }[3], [x12]1246; CHECK-SD-NEXT:    ld1 { v5.b }[3], [x13]1247; CHECK-SD-NEXT:    ld1 { v1.b }[6], [x9]1248; CHECK-SD-NEXT:    ld1 { v2.b }[7], [x11]1249; CHECK-SD-NEXT:    add x9, sp, #1521250; CHECK-SD-NEXT:    ld1 { v3.b }[7], [x10]1251; CHECK-SD-NEXT:    uaddl v4.8h, v5.8b, v4.8b1252; CHECK-SD-NEXT:    mov v0.b[6], w61253; CHECK-SD-NEXT:    ld1 { v1.b }[7], [x9]1254; CHECK-SD-NEXT:    uaddl v2.8h, v3.8b, v2.8b1255; CHECK-SD-NEXT:    ushll v3.4s, v4.4h, #01256; CHECK-SD-NEXT:    mov v0.b[7], w71257; CHECK-SD-NEXT:    uaddl v0.8h, v0.8b, v1.8b1258; CHECK-SD-NEXT:    ushll2 v1.4s, v2.8h, #01259; CHECK-SD-NEXT:    ushll v2.4s, v2.4h, #01260; CHECK-SD-NEXT:    stp q1, q3, [x8, #48]1261; CHECK-SD-NEXT:    ushll2 v3.4s, v0.8h, #01262; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #01263; CHECK-SD-NEXT:    stp q3, q2, [x8, #16]1264; CHECK-SD-NEXT:    str q0, [x8]1265; CHECK-SD-NEXT:    ret1266;1267; CHECK-GI-LABEL: v20:1268; CHECK-GI:       // %bb.0: // %entry1269; CHECK-GI-NEXT:    and w9, w0, #0xff1270; CHECK-GI-NEXT:    ldrb w10, [sp, #96]1271; CHECK-GI-NEXT:    and w11, w1, #0xff1272; CHECK-GI-NEXT:    fmov s0, w91273; CHECK-GI-NEXT:    ldrb w9, [sp]1274; CHECK-GI-NEXT:    ldrb w12, [sp, #104]1275; CHECK-GI-NEXT:    fmov s2, w101276; CHECK-GI-NEXT:    ldrb w10, [sp, #160]1277; CHECK-GI-NEXT:    fmov s1, w91278; CHECK-GI-NEXT:    ldrb w9, [sp, #168]1279; CHECK-GI-NEXT:    mov v0.h[1], w111280; CHECK-GI-NEXT:    ldrb w11, [sp, #8]1281; CHECK-GI-NEXT:    fmov s3, w101282; CHECK-GI-NEXT:    mov v2.h[1], w121283; CHECK-GI-NEXT:    and w10, w2, #0xff1284; CHECK-GI-NEXT:    and w12, w5, #0xff1285; CHECK-GI-NEXT:    mov v1.h[1], w111286; CHECK-GI-NEXT:    and w11, w4, #0xff1287; CHECK-GI-NEXT:    mov v3.h[1], w91288; CHECK-GI-NEXT:    ldrb w9, [sp, #112]1289; CHECK-GI-NEXT:    mov v0.h[2], w101290; CHECK-GI-NEXT:    ldrb w10, [sp, #16]1291; CHECK-GI-NEXT:    mov v2.h[2], w91292; CHECK-GI-NEXT:    ldrb w9, [sp, #176]1293; CHECK-GI-NEXT:    mov v1.h[2], w101294; CHECK-GI-NEXT:    and w10, w3, #0xff1295; CHECK-GI-NEXT:    mov v3.h[2], w91296; CHECK-GI-NEXT:    ldrb w9, [sp, #120]1297; CHECK-GI-NEXT:    mov v0.h[3], w101298; CHECK-GI-NEXT:    ldrb w10, [sp, #24]1299; CHECK-GI-NEXT:    mov v2.h[3], w91300; CHECK-GI-NEXT:    ldrb w9, [sp, #184]1301; CHECK-GI-NEXT:    mov v1.h[3], w101302; CHECK-GI-NEXT:    ldr w10, [sp, #64]1303; CHECK-GI-NEXT:    mov v3.h[3], w91304; CHECK-GI-NEXT:    ldrb w9, [sp, #128]1305; CHECK-GI-NEXT:    mov v0.h[4], w111306; CHECK-GI-NEXT:    ldrb w11, [sp, #32]1307; CHECK-GI-NEXT:    fmov s4, w101308; CHECK-GI-NEXT:    ldrb w10, [sp, #192]1309; CHECK-GI-NEXT:    mov v2.h[4], w91310; CHECK-GI-NEXT:    ldr w9, [sp, #72]1311; CHECK-GI-NEXT:    mov v1.h[4], w111312; CHECK-GI-NEXT:    ldr w11, [sp, #224]1313; CHECK-GI-NEXT:    mov v3.h[4], w101314; CHECK-GI-NEXT:    ldrb w10, [sp, #136]1315; CHECK-GI-NEXT:    mov v4.b[1], w91316; CHECK-GI-NEXT:    fmov s5, w111317; CHECK-GI-NEXT:    ldr w11, [sp, #232]1318; CHECK-GI-NEXT:    mov v0.h[5], w121319; CHECK-GI-NEXT:    ldrb w12, [sp, #40]1320; CHECK-GI-NEXT:    mov v2.h[5], w101321; CHECK-GI-NEXT:    ldrb w10, [sp, #200]1322; CHECK-GI-NEXT:    ldrb w9, [sp, #144]1323; CHECK-GI-NEXT:    mov v5.b[1], w111324; CHECK-GI-NEXT:    mov v1.h[5], w121325; CHECK-GI-NEXT:    mov v3.h[5], w101326; CHECK-GI-NEXT:    ldr w10, [sp, #80]1327; CHECK-GI-NEXT:    ldr w12, [sp, #240]1328; CHECK-GI-NEXT:    and w11, w6, #0xff1329; CHECK-GI-NEXT:    mov v0.h[6], w111330; CHECK-GI-NEXT:    ldrb w11, [sp, #48]1331; CHECK-GI-NEXT:    mov v2.h[6], w91332; CHECK-GI-NEXT:    ldrb w9, [sp, #208]1333; CHECK-GI-NEXT:    mov v4.b[2], w101334; CHECK-GI-NEXT:    ldrb w10, [sp, #152]1335; CHECK-GI-NEXT:    mov v5.b[2], w121336; CHECK-GI-NEXT:    mov v1.h[6], w111337; CHECK-GI-NEXT:    ldr w11, [sp, #248]1338; CHECK-GI-NEXT:    mov v3.h[6], w91339; CHECK-GI-NEXT:    ldr w9, [sp, #88]1340; CHECK-GI-NEXT:    and w12, w7, #0xff1341; CHECK-GI-NEXT:    mov v0.h[7], w121342; CHECK-GI-NEXT:    mov v2.h[7], w101343; CHECK-GI-NEXT:    ldrb w12, [sp, #56]1344; CHECK-GI-NEXT:    mov v4.b[3], w91345; CHECK-GI-NEXT:    ldrb w10, [sp, #216]1346; CHECK-GI-NEXT:    mov v5.b[3], w111347; CHECK-GI-NEXT:    mov v1.h[7], w121348; CHECK-GI-NEXT:    mov v3.h[7], w101349; CHECK-GI-NEXT:    add v0.8h, v0.8h, v2.8h1350; CHECK-GI-NEXT:    ushll v2.8h, v4.8b, #01351; CHECK-GI-NEXT:    ushll v4.8h, v5.8b, #01352; CHECK-GI-NEXT:    add v1.8h, v1.8h, v3.8h1353; CHECK-GI-NEXT:    ushll v3.4s, v0.4h, #01354; CHECK-GI-NEXT:    ushll2 v0.4s, v0.8h, #01355; CHECK-GI-NEXT:    add v2.4h, v2.4h, v4.4h1356; CHECK-GI-NEXT:    ushll v4.4s, v1.4h, #01357; CHECK-GI-NEXT:    ushll2 v1.4s, v1.8h, #01358; CHECK-GI-NEXT:    stp q3, q0, [x8]1359; CHECK-GI-NEXT:    ushll v2.4s, v2.4h, #01360; CHECK-GI-NEXT:    stp q4, q1, [x8, #32]1361; CHECK-GI-NEXT:    str q2, [x8, #64]1362; CHECK-GI-NEXT:    ret1363entry:1364  %s0s = zext <20 x i8> %s0 to <20 x i32>1365  %s1s = zext <20 x i8> %s1 to <20 x i32>1366  %m = add <20 x i32> %s0s, %s1s1367  ret <20 x i32> %m1368}1369 1370define <16 x i32> @i12(<16 x i12> %s0, <16 x i12> %s1) {1371; CHECK-SD-LABEL: i12:1372; CHECK-SD:       // %bb.0: // %entry1373; CHECK-SD-NEXT:    str x23, [sp, #-48]! // 8-byte Folded Spill1374; CHECK-SD-NEXT:    stp x22, x21, [sp, #16] // 16-byte Folded Spill1375; CHECK-SD-NEXT:    stp x20, x19, [sp, #32] // 16-byte Folded Spill1376; CHECK-SD-NEXT:    .cfi_def_cfa_offset 481377; CHECK-SD-NEXT:    .cfi_offset w19, -81378; CHECK-SD-NEXT:    .cfi_offset w20, -161379; CHECK-SD-NEXT:    .cfi_offset w21, -241380; CHECK-SD-NEXT:    .cfi_offset w22, -321381; CHECK-SD-NEXT:    .cfi_offset w23, -481382; CHECK-SD-NEXT:    ldr w13, [sp, #112]1383; CHECK-SD-NEXT:    ldr w14, [sp, #144]1384; CHECK-SD-NEXT:    fmov s2, w41385; CHECK-SD-NEXT:    ldr w17, [sp, #176]1386; CHECK-SD-NEXT:    ldr w19, [sp, #208]1387; CHECK-SD-NEXT:    fmov s3, w01388; CHECK-SD-NEXT:    ldr w20, [sp, #80]1389; CHECK-SD-NEXT:    ldr w21, [sp, #48]1390; CHECK-SD-NEXT:    fmov s5, w131391; CHECK-SD-NEXT:    fmov s4, w191392; CHECK-SD-NEXT:    fmov s6, w171393; CHECK-SD-NEXT:    fmov s7, w141394; CHECK-SD-NEXT:    fmov s0, w201395; CHECK-SD-NEXT:    fmov s1, w211396; CHECK-SD-NEXT:    ldr w10, [sp, #120]1397; CHECK-SD-NEXT:    ldr w11, [sp, #152]1398; CHECK-SD-NEXT:    ldr w12, [sp, #184]1399; CHECK-SD-NEXT:    ldr w15, [sp, #216]1400; CHECK-SD-NEXT:    ldr w22, [sp, #88]1401; CHECK-SD-NEXT:    ldr w23, [sp, #56]1402; CHECK-SD-NEXT:    mov v2.h[1], w51403; CHECK-SD-NEXT:    mov v3.h[1], w11404; CHECK-SD-NEXT:    mov v5.h[1], w101405; CHECK-SD-NEXT:    mov v4.h[1], w151406; CHECK-SD-NEXT:    mov v0.h[1], w221407; CHECK-SD-NEXT:    mov v1.h[1], w231408; CHECK-SD-NEXT:    mov v6.h[1], w121409; CHECK-SD-NEXT:    mov v7.h[1], w111410; CHECK-SD-NEXT:    ldr w8, [sp, #128]1411; CHECK-SD-NEXT:    ldr w9, [sp, #160]1412; CHECK-SD-NEXT:    ldr w16, [sp, #64]1413; CHECK-SD-NEXT:    ldr w18, [sp, #96]1414; CHECK-SD-NEXT:    ldr w10, [sp, #192]1415; CHECK-SD-NEXT:    ldr w11, [sp, #224]1416; CHECK-SD-NEXT:    mov v2.h[2], w61417; CHECK-SD-NEXT:    mov v3.h[2], w21418; CHECK-SD-NEXT:    mov v0.h[2], w181419; CHECK-SD-NEXT:    mov v1.h[2], w161420; CHECK-SD-NEXT:    mov v5.h[2], w81421; CHECK-SD-NEXT:    mov v4.h[2], w111422; CHECK-SD-NEXT:    mov v6.h[2], w101423; CHECK-SD-NEXT:    mov v7.h[2], w91424; CHECK-SD-NEXT:    ldr w12, [sp, #72]1425; CHECK-SD-NEXT:    ldr w13, [sp, #104]1426; CHECK-SD-NEXT:    ldr w8, [sp, #136]1427; CHECK-SD-NEXT:    ldr w9, [sp, #168]1428; CHECK-SD-NEXT:    ldr w10, [sp, #200]1429; CHECK-SD-NEXT:    ldr w11, [sp, #232]1430; CHECK-SD-NEXT:    mov v0.h[3], w131431; CHECK-SD-NEXT:    mov v1.h[3], w121432; CHECK-SD-NEXT:    mov v2.h[3], w71433; CHECK-SD-NEXT:    mov v3.h[3], w31434; CHECK-SD-NEXT:    mov v5.h[3], w81435; CHECK-SD-NEXT:    mov v4.h[3], w111436; CHECK-SD-NEXT:    mov v6.h[3], w101437; CHECK-SD-NEXT:    mov v7.h[3], w91438; CHECK-SD-NEXT:    movi v16.4s, #15, msl #81439; CHECK-SD-NEXT:    ldp x20, x19, [sp, #32] // 16-byte Folded Reload1440; CHECK-SD-NEXT:    ushll v0.4s, v0.4h, #01441; CHECK-SD-NEXT:    ushll v1.4s, v1.4h, #01442; CHECK-SD-NEXT:    ushll v2.4s, v2.4h, #01443; CHECK-SD-NEXT:    ushll v3.4s, v3.4h, #01444; CHECK-SD-NEXT:    ushll v5.4s, v5.4h, #01445; CHECK-SD-NEXT:    ushll v4.4s, v4.4h, #01446; CHECK-SD-NEXT:    ushll v6.4s, v6.4h, #01447; CHECK-SD-NEXT:    ushll v7.4s, v7.4h, #01448; CHECK-SD-NEXT:    and v17.16b, v0.16b, v16.16b1449; CHECK-SD-NEXT:    and v18.16b, v1.16b, v16.16b1450; CHECK-SD-NEXT:    and v1.16b, v2.16b, v16.16b1451; CHECK-SD-NEXT:    and v0.16b, v3.16b, v16.16b1452; CHECK-SD-NEXT:    and v2.16b, v5.16b, v16.16b1453; CHECK-SD-NEXT:    and v3.16b, v4.16b, v16.16b1454; CHECK-SD-NEXT:    and v4.16b, v6.16b, v16.16b1455; CHECK-SD-NEXT:    and v5.16b, v7.16b, v16.16b1456; CHECK-SD-NEXT:    ldp x22, x21, [sp, #16] // 16-byte Folded Reload1457; CHECK-SD-NEXT:    add v0.4s, v0.4s, v2.4s1458; CHECK-SD-NEXT:    add v3.4s, v17.4s, v3.4s1459; CHECK-SD-NEXT:    add v1.4s, v1.4s, v5.4s1460; CHECK-SD-NEXT:    add v2.4s, v18.4s, v4.4s1461; CHECK-SD-NEXT:    ldr x23, [sp], #48 // 8-byte Folded Reload1462; CHECK-SD-NEXT:    ret1463;1464; CHECK-GI-LABEL: i12:1465; CHECK-GI:       // %bb.0: // %entry1466; CHECK-GI-NEXT:    ldr w12, [sp]1467; CHECK-GI-NEXT:    ldr w14, [sp, #32]1468; CHECK-GI-NEXT:    fmov s0, w01469; CHECK-GI-NEXT:    ldr w16, [sp, #128]1470; CHECK-GI-NEXT:    ldr w17, [sp, #160]1471; CHECK-GI-NEXT:    fmov s1, w41472; CHECK-GI-NEXT:    fmov s2, w121473; CHECK-GI-NEXT:    fmov s3, w141474; CHECK-GI-NEXT:    ldr w12, [sp, #64]1475; CHECK-GI-NEXT:    ldr w14, [sp, #96]1476; CHECK-GI-NEXT:    ldr w13, [sp, #8]1477; CHECK-GI-NEXT:    ldr w15, [sp, #40]1478; CHECK-GI-NEXT:    fmov s4, w121479; CHECK-GI-NEXT:    fmov s6, w161480; CHECK-GI-NEXT:    fmov s7, w171481; CHECK-GI-NEXT:    fmov s5, w141482; CHECK-GI-NEXT:    mov v2.h[1], w131483; CHECK-GI-NEXT:    mov v3.h[1], w151484; CHECK-GI-NEXT:    ldr w13, [sp, #72]1485; CHECK-GI-NEXT:    ldr w15, [sp, #104]1486; CHECK-GI-NEXT:    ldr w12, [sp, #136]1487; CHECK-GI-NEXT:    ldr w18, [sp, #168]1488; CHECK-GI-NEXT:    mov v0.h[1], w11489; CHECK-GI-NEXT:    mov v1.h[1], w51490; CHECK-GI-NEXT:    mov v4.h[1], w131491; CHECK-GI-NEXT:    mov v5.h[1], w151492; CHECK-GI-NEXT:    mov v6.h[1], w121493; CHECK-GI-NEXT:    mov v7.h[1], w181494; CHECK-GI-NEXT:    ldr w10, [sp, #16]1495; CHECK-GI-NEXT:    ldr w11, [sp, #48]1496; CHECK-GI-NEXT:    ldr w12, [sp, #80]1497; CHECK-GI-NEXT:    ldr w13, [sp, #112]1498; CHECK-GI-NEXT:    ldr w14, [sp, #144]1499; CHECK-GI-NEXT:    ldr w15, [sp, #176]1500; CHECK-GI-NEXT:    mov v0.h[2], w21501; CHECK-GI-NEXT:    mov v1.h[2], w61502; CHECK-GI-NEXT:    mov v2.h[2], w101503; CHECK-GI-NEXT:    mov v3.h[2], w111504; CHECK-GI-NEXT:    mov v4.h[2], w121505; CHECK-GI-NEXT:    mov v5.h[2], w131506; CHECK-GI-NEXT:    mov v6.h[2], w141507; CHECK-GI-NEXT:    mov v7.h[2], w151508; CHECK-GI-NEXT:    ldr w8, [sp, #24]1509; CHECK-GI-NEXT:    ldr w9, [sp, #56]1510; CHECK-GI-NEXT:    ldr w10, [sp, #88]1511; CHECK-GI-NEXT:    ldr w11, [sp, #120]1512; CHECK-GI-NEXT:    ldr w12, [sp, #152]1513; CHECK-GI-NEXT:    ldr w13, [sp, #184]1514; CHECK-GI-NEXT:    mov v0.h[3], w31515; CHECK-GI-NEXT:    mov v1.h[3], w71516; CHECK-GI-NEXT:    mov v2.h[3], w81517; CHECK-GI-NEXT:    mov v3.h[3], w91518; CHECK-GI-NEXT:    mov v4.h[3], w101519; CHECK-GI-NEXT:    mov v5.h[3], w111520; CHECK-GI-NEXT:    mov v6.h[3], w121521; CHECK-GI-NEXT:    mov v7.h[3], w131522; CHECK-GI-NEXT:    movi v16.4s, #15, msl #81523; CHECK-GI-NEXT:    ushll v0.4s, v0.4h, #01524; CHECK-GI-NEXT:    ushll v1.4s, v1.4h, #01525; CHECK-GI-NEXT:    ushll v2.4s, v2.4h, #01526; CHECK-GI-NEXT:    ushll v3.4s, v3.4h, #01527; CHECK-GI-NEXT:    ushll v4.4s, v4.4h, #01528; CHECK-GI-NEXT:    ushll v5.4s, v5.4h, #01529; CHECK-GI-NEXT:    ushll v6.4s, v6.4h, #01530; CHECK-GI-NEXT:    ushll v7.4s, v7.4h, #01531; CHECK-GI-NEXT:    and v0.16b, v0.16b, v16.16b1532; CHECK-GI-NEXT:    and v1.16b, v1.16b, v16.16b1533; CHECK-GI-NEXT:    and v2.16b, v2.16b, v16.16b1534; CHECK-GI-NEXT:    and v3.16b, v3.16b, v16.16b1535; CHECK-GI-NEXT:    and v4.16b, v4.16b, v16.16b1536; CHECK-GI-NEXT:    and v5.16b, v5.16b, v16.16b1537; CHECK-GI-NEXT:    and v6.16b, v6.16b, v16.16b1538; CHECK-GI-NEXT:    and v7.16b, v7.16b, v16.16b1539; CHECK-GI-NEXT:    add v0.4s, v0.4s, v4.4s1540; CHECK-GI-NEXT:    add v1.4s, v1.4s, v5.4s1541; CHECK-GI-NEXT:    add v2.4s, v2.4s, v6.4s1542; CHECK-GI-NEXT:    add v3.4s, v3.4s, v7.4s1543; CHECK-GI-NEXT:    ret1544entry:1545  %s0s = zext <16 x i12> %s0 to <16 x i32>1546  %s1s = zext <16 x i12> %s1 to <16 x i32>1547  %m = add <16 x i32> %s0s, %s1s1548  ret <16 x i32> %m1549}1550 1551define <16 x i32> @sub_zz(<16 x i8> %s0, <16 x i8> %s1) {1552; CHECK-SD-LABEL: sub_zz:1553; CHECK-SD:       // %bb.0: // %entry1554; CHECK-SD-NEXT:    usubl v2.8h, v0.8b, v1.8b1555; CHECK-SD-NEXT:    usubl2 v4.8h, v0.16b, v1.16b1556; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #01557; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #01558; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #01559; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #01560; CHECK-SD-NEXT:    ret1561;1562; CHECK-GI-LABEL: sub_zz:1563; CHECK-GI:       // %bb.0: // %entry1564; CHECK-GI-NEXT:    usubl v2.8h, v0.8b, v1.8b1565; CHECK-GI-NEXT:    usubl2 v3.8h, v0.16b, v1.16b1566; CHECK-GI-NEXT:    sshll v0.4s, v2.4h, #01567; CHECK-GI-NEXT:    sshll2 v1.4s, v2.8h, #01568; CHECK-GI-NEXT:    sshll v2.4s, v3.4h, #01569; CHECK-GI-NEXT:    sshll2 v3.4s, v3.8h, #01570; CHECK-GI-NEXT:    ret1571entry:1572  %s0s = zext <16 x i8> %s0 to <16 x i32>1573  %s1s = zext <16 x i8> %s1 to <16 x i32>1574  %m = sub <16 x i32> %s0s, %s1s1575  ret <16 x i32> %m1576}1577 1578define <16 x i32> @sub_ss(<16 x i8> %s0, <16 x i8> %s1) {1579; CHECK-SD-LABEL: sub_ss:1580; CHECK-SD:       // %bb.0: // %entry1581; CHECK-SD-NEXT:    ssubl v2.8h, v0.8b, v1.8b1582; CHECK-SD-NEXT:    ssubl2 v4.8h, v0.16b, v1.16b1583; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #01584; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #01585; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #01586; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #01587; CHECK-SD-NEXT:    ret1588;1589; CHECK-GI-LABEL: sub_ss:1590; CHECK-GI:       // %bb.0: // %entry1591; CHECK-GI-NEXT:    ssubl v2.8h, v0.8b, v1.8b1592; CHECK-GI-NEXT:    ssubl2 v3.8h, v0.16b, v1.16b1593; CHECK-GI-NEXT:    sshll v0.4s, v2.4h, #01594; CHECK-GI-NEXT:    sshll2 v1.4s, v2.8h, #01595; CHECK-GI-NEXT:    sshll v2.4s, v3.4h, #01596; CHECK-GI-NEXT:    sshll2 v3.4s, v3.8h, #01597; CHECK-GI-NEXT:    ret1598entry:1599  %s0s = sext <16 x i8> %s0 to <16 x i32>1600  %s1s = sext <16 x i8> %s1 to <16 x i32>1601  %m = sub <16 x i32> %s0s, %s1s1602  ret <16 x i32> %m1603}1604 1605define <16 x i32> @sub_zs(<16 x i8> %s0, <16 x i8> %s1) {1606; CHECK-SD-LABEL: sub_zs:1607; CHECK-SD:       // %bb.0: // %entry1608; CHECK-SD-NEXT:    ushll v2.8h, v0.8b, #01609; CHECK-SD-NEXT:    ushll2 v0.8h, v0.16b, #01610; CHECK-SD-NEXT:    ssubw v2.8h, v2.8h, v1.8b1611; CHECK-SD-NEXT:    ssubw2 v4.8h, v0.8h, v1.16b1612; CHECK-SD-NEXT:    sshll v0.4s, v2.4h, #01613; CHECK-SD-NEXT:    sshll2 v3.4s, v4.8h, #01614; CHECK-SD-NEXT:    sshll2 v1.4s, v2.8h, #01615; CHECK-SD-NEXT:    sshll v2.4s, v4.4h, #01616; CHECK-SD-NEXT:    ret1617;1618; CHECK-GI-LABEL: sub_zs:1619; CHECK-GI:       // %bb.0: // %entry1620; CHECK-GI-NEXT:    ushll v2.8h, v0.8b, #01621; CHECK-GI-NEXT:    ushll2 v0.8h, v0.16b, #01622; CHECK-GI-NEXT:    sshll v3.8h, v1.8b, #01623; CHECK-GI-NEXT:    sshll2 v4.8h, v1.16b, #01624; CHECK-GI-NEXT:    ushll v1.4s, v2.4h, #01625; CHECK-GI-NEXT:    ushll2 v2.4s, v2.8h, #01626; CHECK-GI-NEXT:    ushll v5.4s, v0.4h, #01627; CHECK-GI-NEXT:    ushll2 v6.4s, v0.8h, #01628; CHECK-GI-NEXT:    ssubw v0.4s, v1.4s, v3.4h1629; CHECK-GI-NEXT:    ssubw2 v1.4s, v2.4s, v3.8h1630; CHECK-GI-NEXT:    ssubw v2.4s, v5.4s, v4.4h1631; CHECK-GI-NEXT:    ssubw2 v3.4s, v6.4s, v4.8h1632; CHECK-GI-NEXT:    ret1633entry:1634  %s0s = zext <16 x i8> %s0 to <16 x i32>1635  %s1s = sext <16 x i8> %s1 to <16 x i32>1636  %m = sub <16 x i32> %s0s, %s1s1637  ret <16 x i32> %m1638}1639