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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=aarch64-linux -mattr=+neon,+fp8 < %s | FileCheck %s3 4 5define <4 x half> @test_fscale_f16(<4 x half> %vn, <4 x i16> %vm) {6; CHECK-LABEL: test_fscale_f16:7; CHECK: // %bb.0:8; CHECK-NEXT: fscale v0.4h, v0.4h, v1.4h9; CHECK-NEXT: ret10 %res = tail call <4 x half> @llvm.aarch64.neon.fp8.fscale.v4f16(<4 x half> %vn, <4 x i16> %vm)11 ret <4 x half> %res12}13 14define <8 x half> @test_fscaleq_f16(<8 x half> %vn, <8 x i16> %vm) {15; CHECK-LABEL: test_fscaleq_f16:16; CHECK: // %bb.0:17; CHECK-NEXT: fscale v0.8h, v0.8h, v1.8h18; CHECK-NEXT: ret19 %res = tail call <8 x half> @llvm.aarch64.neon.fp8.fscale.v8f16(<8 x half> %vn, <8 x i16> %vm)20 ret <8 x half> %res21}22 23define <2 x float> @test_fscale_f32(<2 x float> %vn, <2 x i32> %vm) {24; CHECK-LABEL: test_fscale_f32:25; CHECK: // %bb.0:26; CHECK-NEXT: fscale v0.2s, v0.2s, v1.2s27; CHECK-NEXT: ret28 %res = tail call <2 x float> @llvm.aarch64.neon.fp8.fscale.v2f32(<2 x float> %vn, <2 x i32> %vm)29 ret <2 x float> %res30}31 32define <4 x float> @test_fscaleq_f32(<4 x float> %vn, <4 x i32> %vm) {33; CHECK-LABEL: test_fscaleq_f32:34; CHECK: // %bb.0:35; CHECK-NEXT: fscale v0.4s, v0.4s, v1.4s36; CHECK-NEXT: ret37 %res = tail call <4 x float> @llvm.aarch64.neon.fp8.fscale.v4f32(<4 x float> %vn, <4 x i32> %vm)38 ret <4 x float> %res39}40 41define <2 x double> @test_fscaleq_f64(<2 x double> %vn, <2 x i64> %vm) {42; CHECK-LABEL: test_fscaleq_f64:43; CHECK: // %bb.0:44; CHECK-NEXT: fscale v0.2d, v0.2d, v1.2d45; CHECK-NEXT: ret46 %res = tail call <2 x double> @llvm.aarch64.neon.fp8.fscale.v2f64(<2 x double> %vn, <2 x i64> %vm)47 ret <2 x double> %res48}49 50declare <4 x half> @llvm.aarch64.neon.fp8.fscale.v4f16(<4 x half>, <4 x i16>)51declare <8 x half> @llvm.aarch64.neon.fp8.fscale.v8f16(<8 x half>, <8 x i16>)52declare <2 x float> @llvm.aarch64.neon.fp8.fscale.v2f32(<2 x float>, <2 x i32>)53declare <4 x float> @llvm.aarch64.neon.fp8.fscale.v4f32(<4 x float>, <4 x i32>)54declare <2 x double> @llvm.aarch64.neon.fp8.fscale.v2f64(<2 x double>, <2 x i64>)55