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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+neon < %s | FileCheck %s3 4; Inserting a truncated (i64 to i32) element from the bottom 128-bits of any vector type into a NEON vector should use INS (element) of the5; truncated size to avoid pointless GPR trips.6 7 8define <2 x i32> @test_s_trunc_d_lane0(<2 x i32> %a, <1 x i64> %b) {9; CHECK-LABEL: test_s_trunc_d_lane0:10; CHECK: // %bb.0:11; CHECK-NEXT: // kill: def $d0 killed $d0 def $q012; CHECK-NEXT: // kill: def $d1 killed $d1 def $q113; CHECK-NEXT: mov v0.s[0], v1.s[0]14; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q015; CHECK-NEXT: ret16 %c = extractelement <1 x i64> %b, i32 017 %d = trunc i64 %c to i3218 %e = insertelement <2 x i32> %a, i32 %d, i64 019 ret <2 x i32> %e20}21 22define <2 x i32> @test_s_trunc_d_qlane1(<2 x i32> %a, <2 x i64> %b) {23; CHECK-LABEL: test_s_trunc_d_qlane1:24; CHECK: // %bb.0:25; CHECK-NEXT: // kill: def $d0 killed $d0 def $q026; CHECK-NEXT: mov v0.s[0], v1.s[2]27; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q028; CHECK-NEXT: ret29 %c = extractelement <2 x i64> %b, i32 130 %d = trunc i64 %c to i3231 %e = insertelement <2 x i32> %a, i32 %d, i64 032 ret <2 x i32> %e33}34 35define <4 x i32> @test_qs_trunc_d_lane0(<4 x i32> %a, <1 x i64> %b) {36; CHECK-LABEL: test_qs_trunc_d_lane0:37; CHECK: // %bb.0:38; CHECK-NEXT: // kill: def $d1 killed $d1 def $q139; CHECK-NEXT: mov v0.s[0], v1.s[0]40; CHECK-NEXT: ret41 %c = extractelement <1 x i64> %b, i32 042 %d = trunc i64 %c to i3243 %e = insertelement <4 x i32> %a, i32 %d, i64 044 ret <4 x i32> %e45}46 47define <4 x i32> @test_qs_trunc_d_qlane1(<4 x i32> %a, <2 x i64> %b) {48; CHECK-LABEL: test_qs_trunc_d_qlane1:49; CHECK: // %bb.0:50; CHECK-NEXT: mov v0.s[3], v1.s[2]51; CHECK-NEXT: ret52 %c = extractelement <2 x i64> %b, i32 153 %d = trunc i64 %c to i3254 %e = insertelement <4 x i32> %a, i32 %d, i64 355 ret <4 x i32> %e56}57 58; ---- From the bottom 128b of an SVE vector59 60define <2 x i32> @test_s_trunc_dsve_lane0(<2 x i32> %a, <vscale x 2 x i64> %b) {61; CHECK-LABEL: test_s_trunc_dsve_lane0:62; CHECK: // %bb.0:63; CHECK-NEXT: // kill: def $d0 killed $d0 def $q064; CHECK-NEXT: mov v0.s[0], v1.s[0]65; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q066; CHECK-NEXT: ret67 %c = extractelement <vscale x 2 x i64> %b, i32 068 %d = trunc i64 %c to i3269 %e = insertelement <2 x i32> %a, i32 %d, i64 070 ret <2 x i32> %e71}72 73define <2 x i32> @test_s_trunc_dsve_lane1(<2 x i32> %a, <vscale x 2 x i64> %b) {74; CHECK-LABEL: test_s_trunc_dsve_lane1:75; CHECK: // %bb.0:76; CHECK-NEXT: // kill: def $d0 killed $d0 def $q077; CHECK-NEXT: mov v0.s[1], v1.s[2]78; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q079; CHECK-NEXT: ret80 %c = extractelement <vscale x 2 x i64> %b, i32 181 %d = trunc i64 %c to i3282 %e = insertelement <2 x i32> %a, i32 %d, i64 183 ret <2 x i32> %e84}85 86; (negative test) Extracted element is not within V-register.87define <2 x i32> @test_s_trunc_dsve_lane2(<2 x i32> %a, <vscale x 2 x i64> %b) {88; CHECK-LABEL: test_s_trunc_dsve_lane2:89; CHECK: // %bb.0:90; CHECK-NEXT: mov z1.s, z1.s[4]91; CHECK-NEXT: // kill: def $d0 killed $d0 def $q092; CHECK-NEXT: fmov w8, s193; CHECK-NEXT: mov v0.s[1], w894; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q095; CHECK-NEXT: ret96 %c = extractelement <vscale x 2 x i64> %b, i32 297 %d = trunc i64 %c to i3298 %e = insertelement <2 x i32> %a, i32 %d, i64 199 ret <2 x i32> %e100}101 102define <4 x i32> @test_qs_trunc_dsve_lane0(<4 x i32> %a, <vscale x 2 x i64> %b) {103; CHECK-LABEL: test_qs_trunc_dsve_lane0:104; CHECK: // %bb.0:105; CHECK-NEXT: mov v0.s[0], v1.s[0]106; CHECK-NEXT: ret107 %c = extractelement <vscale x 2 x i64> %b, i32 0108 %d = trunc i64 %c to i32109 %e = insertelement <4 x i32> %a, i32 %d, i64 0110 ret <4 x i32> %e111}112 113define <4 x i32> @test_qs_trunc_dsve_lane1(<4 x i32> %a, <vscale x 2 x i64> %b) {114; CHECK-LABEL: test_qs_trunc_dsve_lane1:115; CHECK: // %bb.0:116; CHECK-NEXT: mov v0.s[3], v1.s[2]117; CHECK-NEXT: ret118 %c = extractelement <vscale x 2 x i64> %b, i32 1119 %d = trunc i64 %c to i32120 %e = insertelement <4 x i32> %a, i32 %d, i64 3121 ret <4 x i32> %e122}123 124; (negative test) Extracted element is not within V-register.125define <4 x i32> @test_qs_trunc_dsve_lane2(<4 x i32> %a, <vscale x 2 x i64> %b) {126; CHECK-LABEL: test_qs_trunc_dsve_lane2:127; CHECK: // %bb.0:128; CHECK-NEXT: mov z1.s, z1.s[4]129; CHECK-NEXT: fmov w8, s1130; CHECK-NEXT: mov v0.s[3], w8131; CHECK-NEXT: ret132 %c = extractelement <vscale x 2 x i64> %b, i32 2133 %d = trunc i64 %c to i32134 %e = insertelement <4 x i32> %a, i32 %d, i64 3135 ret <4 x i32> %e136}137