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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -verify-machineinstrs -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD3; RUN: llc < %s -verify-machineinstrs -mattr=+neon,+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD4; RUN: llc -mattr=+neon -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI5; RUN: llc -mattr=+neon,+fullfp16 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI6 7; This are copies of the above RUN lines but with vector constants enabled.8; RUN: llc -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat < %s -verify-machineinstrs -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD9; RUN: llc -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat < %s -verify-machineinstrs -mattr=+neon,+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD10; RUN: llc -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat -mattr=+neon -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI11; RUN: llc -use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat -mattr=+neon,+fullfp16 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI12 13target triple = "aarch64-none-linux-gnu"14 15define <8 x i8> @movi8b_0() {16; CHECK-LABEL: movi8b_0:17; CHECK: // %bb.0:18; CHECK-NEXT: movi v0.2d, #000000000000000019; CHECK-NEXT: ret20 ret <8 x i8> zeroinitializer21}22 23define <8 x i8> @movi8b() {24; CHECK-LABEL: movi8b:25; CHECK: // %bb.0:26; CHECK-NEXT: movi v0.8b, #827; CHECK-NEXT: ret28 ret <8 x i8> <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>29}30 31define <16 x i8> @movi16b_0() {32; CHECK-LABEL: movi16b_0:33; CHECK: // %bb.0:34; CHECK-NEXT: movi v0.2d, #000000000000000035; CHECK-NEXT: ret36 ret <16 x i8> zeroinitializer37}38 39define <16 x i8> @movi16b() {40; CHECK-LABEL: movi16b:41; CHECK: // %bb.0:42; CHECK-NEXT: movi v0.16b, #843; CHECK-NEXT: ret44 ret <16 x i8> <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>45}46 47define <2 x i32> @movi2s_0() {48; CHECK-LABEL: movi2s_0:49; CHECK: // %bb.0:50; CHECK-NEXT: movi v0.2d, #000000000000000051; CHECK-NEXT: ret52 ret <2 x i32> zeroinitializer53}54 55define <2 x i32> @movi2s_lsl0() {56; CHECK-LABEL: movi2s_lsl0:57; CHECK: // %bb.0:58; CHECK-NEXT: movi d0, #0x0000ff000000ff59; CHECK-NEXT: ret60 ret <2 x i32> <i32 255, i32 255>61}62 63define <2 x i32> @movi2s_lsl8() {64; CHECK-LABEL: movi2s_lsl8:65; CHECK: // %bb.0:66; CHECK-NEXT: movi d0, #0x00ff000000ff0067; CHECK-NEXT: ret68 ret <2 x i32> <i32 65280, i32 65280>69}70 71define <2 x i32> @movi2s_lsl16() {72; CHECK-LABEL: movi2s_lsl16:73; CHECK: // %bb.0:74; CHECK-NEXT: movi d0, #0xff000000ff000075; CHECK-NEXT: ret76 ret <2 x i32> <i32 16711680, i32 16711680>77}78 79define <2 x i32> @movi2s_fneg() {80; CHECK-LABEL: movi2s_fneg:81; CHECK: // %bb.0:82; CHECK-NEXT: movi v0.2s, #240, lsl #883; CHECK-NEXT: fneg v0.2s, v0.2s84; CHECK-NEXT: ret85 ret <2 x i32> <i32 2147545088, i32 2147545088>86}87 88define <2 x i32> @movi2s_lsl24() {89; CHECK-LABEL: movi2s_lsl24:90; CHECK: // %bb.0:91; CHECK-NEXT: movi d0, #0xff000000ff00000092; CHECK-NEXT: ret93 ret <2 x i32> <i32 4278190080, i32 4278190080>94}95 96define <4 x i32> @movi4s_0() {97; CHECK-LABEL: movi4s_0:98; CHECK: // %bb.0:99; CHECK-NEXT: movi v0.2d, #0000000000000000100; CHECK-NEXT: ret101 ret <4 x i32> zeroinitializer102}103 104define <4 x i32> @movi4s_lsl0() {105; CHECK-LABEL: movi4s_lsl0:106; CHECK: // %bb.0:107; CHECK-NEXT: movi v0.2d, #0x0000ff000000ff108; CHECK-NEXT: ret109 ret <4 x i32> <i32 255, i32 255, i32 255, i32 255>110}111 112define <4 x i32> @movi4s_lsl8() {113; CHECK-LABEL: movi4s_lsl8:114; CHECK: // %bb.0:115; CHECK-NEXT: movi v0.2d, #0x00ff000000ff00116; CHECK-NEXT: ret117 ret <4 x i32> <i32 65280, i32 65280, i32 65280, i32 65280>118}119 120define <4 x i32> @movi4s_lsl16() {121; CHECK-LABEL: movi4s_lsl16:122; CHECK: // %bb.0:123; CHECK-NEXT: movi v0.2d, #0xff000000ff0000124; CHECK-NEXT: ret125 ret <4 x i32> <i32 16711680, i32 16711680, i32 16711680, i32 16711680>126}127 128define <4 x i32> @movi4s_fneg() {129; CHECK-LABEL: movi4s_fneg:130; CHECK: // %bb.0:131; CHECK-NEXT: movi v0.4s, #240, lsl #8132; CHECK-NEXT: fneg v0.4s, v0.4s133; CHECK-NEXT: ret134 ret <4 x i32> <i32 2147545088, i32 2147545088, i32 2147545088, i32 2147545088>135}136 137define <4 x i32> @movi4s_lsl24() {138; CHECK-LABEL: movi4s_lsl24:139; CHECK: // %bb.0:140; CHECK-NEXT: movi v0.2d, #0xff000000ff000000141; CHECK-NEXT: ret142 ret <4 x i32> <i32 4278190080, i32 4278190080, i32 4278190080, i32 4278190080>143}144 145define <4 x i16> @movi4h_lsl0() {146; CHECK-LABEL: movi4h_lsl0:147; CHECK: // %bb.0:148; CHECK-NEXT: movi d0, #0xff00ff00ff00ff149; CHECK-NEXT: ret150 ret <4 x i16> <i16 255, i16 255, i16 255, i16 255>151}152 153define <4 x i16> @movi4h_lsl8() {154; CHECK-LABEL: movi4h_lsl8:155; CHECK: // %bb.0:156; CHECK-NEXT: movi d0, #0xff00ff00ff00ff00157; CHECK-NEXT: ret158 ret <4 x i16> <i16 65280, i16 65280, i16 65280, i16 65280>159}160 161define <4 x i16> @movi4h_fneg() {162; CHECK-NOFP16-SD-LABEL: movi4h_fneg:163; CHECK-NOFP16-SD: // %bb.0:164; CHECK-NOFP16-SD-NEXT: movi v0.4h, #127, lsl #8165; CHECK-NOFP16-SD-NEXT: fneg v0.2s, v0.2s166; CHECK-NOFP16-SD-NEXT: ret167;168; CHECK-FP16-SD-LABEL: movi4h_fneg:169; CHECK-FP16-SD: // %bb.0:170; CHECK-FP16-SD-NEXT: movi v0.4h, #127, lsl #8171; CHECK-FP16-SD-NEXT: fneg v0.2s, v0.2s172; CHECK-FP16-SD-NEXT: ret173;174; CHECK-NOFP16-GI-LABEL: movi4h_fneg:175; CHECK-NOFP16-GI: // %bb.0:176; CHECK-NOFP16-GI-NEXT: adrp x8, .LCPI18_0177; CHECK-NOFP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI18_0]178; CHECK-NOFP16-GI-NEXT: ret179;180; CHECK-FP16-GI-LABEL: movi4h_fneg:181; CHECK-FP16-GI: // %bb.0:182; CHECK-FP16-GI-NEXT: adrp x8, .LCPI18_0183; CHECK-FP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI18_0]184; CHECK-FP16-GI-NEXT: ret185 ret <4 x i16> <i16 32512, i16 65280, i16 32512, i16 65280>186}187 188define <8 x i16> @movi8h_lsl0() {189; CHECK-LABEL: movi8h_lsl0:190; CHECK: // %bb.0:191; CHECK-NEXT: movi v0.2d, #0xff00ff00ff00ff192; CHECK-NEXT: ret193 ret <8 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>194}195 196define <8 x i16> @movi8h_lsl8() {197; CHECK-LABEL: movi8h_lsl8:198; CHECK: // %bb.0:199; CHECK-NEXT: movi v0.2d, #0xff00ff00ff00ff00200; CHECK-NEXT: ret201 ret <8 x i16> <i16 65280, i16 65280, i16 65280, i16 65280, i16 65280, i16 65280, i16 65280, i16 65280>202}203 204define <8 x i16> @movi8h_fneg() {205; CHECK-NOFP16-SD-LABEL: movi8h_fneg:206; CHECK-NOFP16-SD: // %bb.0:207; CHECK-NOFP16-SD-NEXT: movi v0.8h, #127, lsl #8208; CHECK-NOFP16-SD-NEXT: fneg v0.4s, v0.4s209; CHECK-NOFP16-SD-NEXT: ret210;211; CHECK-FP16-SD-LABEL: movi8h_fneg:212; CHECK-FP16-SD: // %bb.0:213; CHECK-FP16-SD-NEXT: movi v0.8h, #127, lsl #8214; CHECK-FP16-SD-NEXT: fneg v0.4s, v0.4s215; CHECK-FP16-SD-NEXT: ret216;217; CHECK-NOFP16-GI-LABEL: movi8h_fneg:218; CHECK-NOFP16-GI: // %bb.0:219; CHECK-NOFP16-GI-NEXT: adrp x8, .LCPI21_0220; CHECK-NOFP16-GI-NEXT: ldr q0, [x8, :lo12:.LCPI21_0]221; CHECK-NOFP16-GI-NEXT: ret222;223; CHECK-FP16-GI-LABEL: movi8h_fneg:224; CHECK-FP16-GI: // %bb.0:225; CHECK-FP16-GI-NEXT: adrp x8, .LCPI21_0226; CHECK-FP16-GI-NEXT: ldr q0, [x8, :lo12:.LCPI21_0]227; CHECK-FP16-GI-NEXT: ret228 ret <8 x i16> <i16 32512, i16 65280, i16 32512, i16 65280, i16 32512, i16 65280, i16 32512, i16 65280>229}230 231 232define <2 x i32> @mvni2s_lsl0() {233; CHECK-LABEL: mvni2s_lsl0:234; CHECK: // %bb.0:235; CHECK-NEXT: mvni v0.2s, #16236; CHECK-NEXT: ret237 ret <2 x i32> <i32 4294967279, i32 4294967279>238}239 240define <2 x i32> @mvni2s_lsl8() {241; CHECK-LABEL: mvni2s_lsl8:242; CHECK: // %bb.0:243; CHECK-NEXT: mvni v0.2s, #16, lsl #8244; CHECK-NEXT: ret245 ret <2 x i32> <i32 4294963199, i32 4294963199>246}247 248define <2 x i32> @mvni2s_lsl16() {249; CHECK-LABEL: mvni2s_lsl16:250; CHECK: // %bb.0:251; CHECK-NEXT: mvni v0.2s, #16, lsl #16252; CHECK-NEXT: ret253 ret <2 x i32> <i32 4293918719, i32 4293918719>254}255 256define <2 x i32> @mvni2s_lsl24() {257; CHECK-LABEL: mvni2s_lsl24:258; CHECK: // %bb.0:259; CHECK-NEXT: mvni v0.2s, #16, lsl #24260; CHECK-NEXT: ret261 ret <2 x i32> <i32 4026531839, i32 4026531839>262}263 264define <4 x i32> @mvni4s_lsl0() {265; CHECK-LABEL: mvni4s_lsl0:266; CHECK: // %bb.0:267; CHECK-NEXT: mvni v0.4s, #16268; CHECK-NEXT: ret269 ret <4 x i32> <i32 4294967279, i32 4294967279, i32 4294967279, i32 4294967279>270}271 272define <4 x i32> @mvni4s_lsl8() {273; CHECK-LABEL: mvni4s_lsl8:274; CHECK: // %bb.0:275; CHECK-NEXT: mvni v0.4s, #16, lsl #8276; CHECK-NEXT: ret277 ret <4 x i32> <i32 4294963199, i32 4294963199, i32 4294963199, i32 4294963199>278}279 280define <4 x i32> @mvni4s_lsl16() {281; CHECK-LABEL: mvni4s_lsl16:282; CHECK: // %bb.0:283; CHECK-NEXT: mvni v0.4s, #16, lsl #16284; CHECK-NEXT: ret285 ret <4 x i32> <i32 4293918719, i32 4293918719, i32 4293918719, i32 4293918719>286 287}288 289define <4 x i32> @mvni4s_lsl24() {290; CHECK-LABEL: mvni4s_lsl24:291; CHECK: // %bb.0:292; CHECK-NEXT: mvni v0.4s, #16, lsl #24293; CHECK-NEXT: ret294 ret <4 x i32> <i32 4026531839, i32 4026531839, i32 4026531839, i32 4026531839>295}296 297 298define <4 x i16> @mvni4h_lsl0() {299; CHECK-LABEL: mvni4h_lsl0:300; CHECK: // %bb.0:301; CHECK-NEXT: mvni v0.4h, #16302; CHECK-NEXT: ret303 ret <4 x i16> <i16 65519, i16 65519, i16 65519, i16 65519>304}305 306define <4 x i16> @mvni4h_lsl8() {307; CHECK-LABEL: mvni4h_lsl8:308; CHECK: // %bb.0:309; CHECK-NEXT: mvni v0.4h, #16, lsl #8310; CHECK-NEXT: ret311 ret <4 x i16> <i16 61439, i16 61439, i16 61439, i16 61439>312}313 314define <4 x i16> @mvni4h_neg() {315; CHECK-NOFP16-SD-LABEL: mvni4h_neg:316; CHECK-NOFP16-SD: // %bb.0:317; CHECK-NOFP16-SD-NEXT: mov w8, #33008 // =0x80f0318; CHECK-NOFP16-SD-NEXT: dup v0.4h, w8319; CHECK-NOFP16-SD-NEXT: ret320;321; CHECK-FP16-LABEL: mvni4h_neg:322; CHECK-FP16: // %bb.0:323; CHECK-FP16-NEXT: movi v0.4h, #240324; CHECK-FP16-NEXT: fneg v0.4h, v0.4h325; CHECK-FP16-NEXT: ret326;327; CHECK-NOFP16-GI-LABEL: mvni4h_neg:328; CHECK-NOFP16-GI: // %bb.0:329; CHECK-NOFP16-GI-NEXT: adrp x8, .LCPI32_0330; CHECK-NOFP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI32_0]331; CHECK-NOFP16-GI-NEXT: ret332 ret <4 x i16> <i16 33008, i16 33008, i16 33008, i16 33008>333}334 335define <8 x i16> @mvni8h_lsl0() {336; CHECK-LABEL: mvni8h_lsl0:337; CHECK: // %bb.0:338; CHECK-NEXT: mvni v0.8h, #16339; CHECK-NEXT: ret340 ret <8 x i16> <i16 65519, i16 65519, i16 65519, i16 65519, i16 65519, i16 65519, i16 65519, i16 65519>341}342 343define <8 x i16> @mvni8h_lsl8() {344; CHECK-LABEL: mvni8h_lsl8:345; CHECK: // %bb.0:346; CHECK-NEXT: mvni v0.8h, #16, lsl #8347; CHECK-NEXT: ret348 ret <8 x i16> <i16 61439, i16 61439, i16 61439, i16 61439, i16 61439, i16 61439, i16 61439, i16 61439>349}350 351define <8 x i16> @mvni8h_neg() {352; CHECK-NOFP16-SD-LABEL: mvni8h_neg:353; CHECK-NOFP16-SD: // %bb.0:354; CHECK-NOFP16-SD-NEXT: mov w8, #33008 // =0x80f0355; CHECK-NOFP16-SD-NEXT: dup v0.8h, w8356; CHECK-NOFP16-SD-NEXT: ret357;358; CHECK-FP16-LABEL: mvni8h_neg:359; CHECK-FP16: // %bb.0:360; CHECK-FP16-NEXT: movi v0.8h, #240361; CHECK-FP16-NEXT: fneg v0.8h, v0.8h362; CHECK-FP16-NEXT: ret363;364; CHECK-NOFP16-GI-LABEL: mvni8h_neg:365; CHECK-NOFP16-GI: // %bb.0:366; CHECK-NOFP16-GI-NEXT: adrp x8, .LCPI35_0367; CHECK-NOFP16-GI-NEXT: ldr q0, [x8, :lo12:.LCPI35_0]368; CHECK-NOFP16-GI-NEXT: ret369 ret <8 x i16> <i16 33008, i16 33008, i16 33008, i16 33008, i16 33008, i16 33008, i16 33008, i16 33008>370}371 372 373define <2 x i32> @movi2s_msl8(<2 x i32> %a) {374; CHECK-LABEL: movi2s_msl8:375; CHECK: // %bb.0:376; CHECK-NEXT: movi d0, #0x00ffff0000ffff377; CHECK-NEXT: ret378 ret <2 x i32> <i32 65535, i32 65535>379}380 381define <2 x i32> @movi2s_msl16() {382; CHECK-LABEL: movi2s_msl16:383; CHECK: // %bb.0:384; CHECK-NEXT: movi d0, #0xffffff00ffffff385; CHECK-NEXT: ret386 ret <2 x i32> <i32 16777215, i32 16777215>387}388 389 390define <4 x i32> @movi4s_msl8() {391; CHECK-LABEL: movi4s_msl8:392; CHECK: // %bb.0:393; CHECK-NEXT: movi v0.2d, #0x00ffff0000ffff394; CHECK-NEXT: ret395 ret <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>396}397 398define <4 x i32> @movi4s_msl16() {399; CHECK-LABEL: movi4s_msl16:400; CHECK: // %bb.0:401; CHECK-NEXT: movi v0.2d, #0xffffff00ffffff402; CHECK-NEXT: ret403 ret <4 x i32> <i32 16777215, i32 16777215, i32 16777215, i32 16777215>404}405 406define <2 x i32> @mvni2s_msl8() {407; CHECK-LABEL: mvni2s_msl8:408; CHECK: // %bb.0:409; CHECK-NEXT: mvni v0.2s, #16, msl #8410; CHECK-NEXT: ret411 ret <2 x i32> <i32 18446744073709547264, i32 18446744073709547264>412}413 414define <2 x i32> @mvni2s_msl16() {415; CHECK-LABEL: mvni2s_msl16:416; CHECK: // %bb.0:417; CHECK-NEXT: mvni v0.2s, #16, msl #16418; CHECK-NEXT: ret419 ret <2 x i32> <i32 18446744073708437504, i32 18446744073708437504>420}421 422define <4 x i32> @mvni4s_msl8() {423; CHECK-LABEL: mvni4s_msl8:424; CHECK: // %bb.0:425; CHECK-NEXT: mvni v0.4s, #16, msl #8426; CHECK-NEXT: ret427 ret <4 x i32> <i32 18446744073709547264, i32 18446744073709547264, i32 18446744073709547264, i32 18446744073709547264>428}429 430define <4 x i32> @mvni4s_msl16() {431; CHECK-LABEL: mvni4s_msl16:432; CHECK: // %bb.0:433; CHECK-NEXT: mvni v0.4s, #16, msl #16434; CHECK-NEXT: ret435 ret <4 x i32> <i32 18446744073708437504, i32 18446744073708437504, i32 18446744073708437504, i32 18446744073708437504>436}437 438define <2 x i64> @movi2d() {439; CHECK-LABEL: movi2d:440; CHECK: // %bb.0:441; CHECK-NEXT: movi v0.2d, #0xff0000ff0000ffff442; CHECK-NEXT: ret443 ret <2 x i64> <i64 18374687574888349695, i64 18374687574888349695>444}445 446define <1 x i64> @movid() {447; CHECK-NOFP16-SD-LABEL: movid:448; CHECK-NOFP16-SD: // %bb.0:449; CHECK-NOFP16-SD-NEXT: movi d0, #0xff0000ff0000ffff450; CHECK-NOFP16-SD-NEXT: ret451;452; CHECK-FP16-SD-LABEL: movid:453; CHECK-FP16-SD: // %bb.0:454; CHECK-FP16-SD-NEXT: movi d0, #0xff0000ff0000ffff455; CHECK-FP16-SD-NEXT: ret456;457; CHECK-NOFP16-GI-LABEL: movid:458; CHECK-NOFP16-GI: // %bb.0:459; CHECK-NOFP16-GI-NEXT: mov x8, #-72056494526300161 // =0xff0000ffffffffff460; CHECK-NOFP16-GI-NEXT: movk x8, #0, lsl #16461; CHECK-NOFP16-GI-NEXT: fmov d0, x8462; CHECK-NOFP16-GI-NEXT: ret463;464; CHECK-FP16-GI-LABEL: movid:465; CHECK-FP16-GI: // %bb.0:466; CHECK-FP16-GI-NEXT: mov x8, #-72056494526300161 // =0xff0000ffffffffff467; CHECK-FP16-GI-NEXT: movk x8, #0, lsl #16468; CHECK-FP16-GI-NEXT: fmov d0, x8469; CHECK-FP16-GI-NEXT: ret470 ret <1 x i64> <i64 18374687574888349695>471}472 473define <2 x float> @fmov2s_0() {474; CHECK-LABEL: fmov2s_0:475; CHECK: // %bb.0:476; CHECK-NEXT: movi v0.2d, #0000000000000000477; CHECK-NEXT: ret478 ret <2 x float> zeroinitializer479}480 481define <2 x float> @fmov2s() {482; CHECK-LABEL: fmov2s:483; CHECK: // %bb.0:484; CHECK-NEXT: fmov v0.2s, #-12.00000000485; CHECK-NEXT: ret486 ret <2 x float> <float -1.2e1, float -1.2e1>487}488 489define <2 x float> @fmov2s_neg0() {490; CHECK-LABEL: fmov2s_neg0:491; CHECK: // %bb.0:492; CHECK-NEXT: movi v0.2s, #128, lsl #24493; CHECK-NEXT: ret494 ret <2 x float> <float -0.0, float -0.0>495}496 497define <4 x float> @fmov4s_0() {498; CHECK-LABEL: fmov4s_0:499; CHECK: // %bb.0:500; CHECK-NEXT: movi v0.2d, #0000000000000000501; CHECK-NEXT: ret502 ret <4 x float> zeroinitializer503}504 505define <4 x float> @fmov4s() {506; CHECK-LABEL: fmov4s:507; CHECK: // %bb.0:508; CHECK-NEXT: fmov v0.4s, #-12.00000000509; CHECK-NEXT: ret510 ret <4 x float> <float -1.2e1, float -1.2e1, float -1.2e1, float -1.2e1>511}512 513define <4 x float> @fmov4s_neg0() {514; CHECK-LABEL: fmov4s_neg0:515; CHECK: // %bb.0:516; CHECK-NEXT: movi v0.4s, #128, lsl #24517; CHECK-NEXT: ret518 ret <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>519}520 521define <2 x double> @fmov2d_0() {522; CHECK-LABEL: fmov2d_0:523; CHECK: // %bb.0:524; CHECK-NEXT: movi v0.2d, #0000000000000000525; CHECK-NEXT: ret526 ret <2 x double> zeroinitializer527}528 529define <2 x double> @fmov2d() {530; CHECK-LABEL: fmov2d:531; CHECK: // %bb.0:532; CHECK-NEXT: fmov v0.2d, #-12.00000000533; CHECK-NEXT: ret534 ret <2 x double> <double -1.2e1, double -1.2e1>535}536 537define <2 x double> @fmov2d_neg0() {538; CHECK-LABEL: fmov2d_neg0:539; CHECK: // %bb.0:540; CHECK-NEXT: movi v0.2d, #0000000000000000541; CHECK-NEXT: fneg v0.2d, v0.2d542; CHECK-NEXT: ret543 ret <2 x double> <double -0.0, double -0.0>544}545 546define <1 x double> @fmov1d_neg0() {547; CHECK-NOFP16-SD-LABEL: fmov1d_neg0:548; CHECK-NOFP16-SD: // %bb.0:549; CHECK-NOFP16-SD-NEXT: movi d0, #0000000000000000550; CHECK-NOFP16-SD-NEXT: fneg d0, d0551; CHECK-NOFP16-SD-NEXT: ret552;553; CHECK-FP16-SD-LABEL: fmov1d_neg0:554; CHECK-FP16-SD: // %bb.0:555; CHECK-FP16-SD-NEXT: movi d0, #0000000000000000556; CHECK-FP16-SD-NEXT: fneg d0, d0557; CHECK-FP16-SD-NEXT: ret558;559; CHECK-NOFP16-GI-LABEL: fmov1d_neg0:560; CHECK-NOFP16-GI: // %bb.0:561; CHECK-NOFP16-GI-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000562; CHECK-NOFP16-GI-NEXT: fmov d0, x8563; CHECK-NOFP16-GI-NEXT: ret564;565; CHECK-FP16-GI-LABEL: fmov1d_neg0:566; CHECK-FP16-GI: // %bb.0:567; CHECK-FP16-GI-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000568; CHECK-FP16-GI-NEXT: fmov d0, x8569; CHECK-FP16-GI-NEXT: ret570 ret <1 x double> <double -0.0>571}572 573define <2 x i32> @movi1d_1() {574; CHECK-NOFP16-SD-LABEL: movi1d_1:575; CHECK-NOFP16-SD: // %bb.0:576; CHECK-NOFP16-SD-NEXT: movi d0, #0x00ffffffff0000577; CHECK-NOFP16-SD-NEXT: ret578;579; CHECK-FP16-SD-LABEL: movi1d_1:580; CHECK-FP16-SD: // %bb.0:581; CHECK-FP16-SD-NEXT: movi d0, #0x00ffffffff0000582; CHECK-FP16-SD-NEXT: ret583;584; CHECK-NOFP16-GI-LABEL: movi1d_1:585; CHECK-NOFP16-GI: // %bb.0:586; CHECK-NOFP16-GI-NEXT: adrp x8, .LCPI56_0587; CHECK-NOFP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI56_0]588; CHECK-NOFP16-GI-NEXT: ret589;590; CHECK-FP16-GI-LABEL: movi1d_1:591; CHECK-FP16-GI: // %bb.0:592; CHECK-FP16-GI-NEXT: adrp x8, .LCPI56_0593; CHECK-FP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI56_0]594; CHECK-FP16-GI-NEXT: ret595 ret <2 x i32> <i32 -65536, i32 65535>596}597 598 599declare <2 x i32> @test_movi1d(<2 x i32>, <2 x i32>)600define <2 x i32> @movi1d() {601; CHECK-NOFP16-SD-LABEL: movi1d:602; CHECK-NOFP16-SD: // %bb.0:603; CHECK-NOFP16-SD-NEXT: movi d1, #0x00ffffffff0000604; CHECK-NOFP16-SD-NEXT: adrp x8, .LCPI57_0605; CHECK-NOFP16-SD-NEXT: ldr d0, [x8, :lo12:.LCPI57_0]606; CHECK-NOFP16-SD-NEXT: b test_movi1d607;608; CHECK-FP16-SD-LABEL: movi1d:609; CHECK-FP16-SD: // %bb.0:610; CHECK-FP16-SD-NEXT: movi d1, #0x00ffffffff0000611; CHECK-FP16-SD-NEXT: adrp x8, .LCPI57_0612; CHECK-FP16-SD-NEXT: ldr d0, [x8, :lo12:.LCPI57_0]613; CHECK-FP16-SD-NEXT: b test_movi1d614;615; CHECK-NOFP16-GI-LABEL: movi1d:616; CHECK-NOFP16-GI: // %bb.0:617; CHECK-NOFP16-GI-NEXT: adrp x8, .LCPI57_1618; CHECK-NOFP16-GI-NEXT: adrp x9, .LCPI57_0619; CHECK-NOFP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI57_1]620; CHECK-NOFP16-GI-NEXT: ldr d1, [x9, :lo12:.LCPI57_0]621; CHECK-NOFP16-GI-NEXT: b test_movi1d622;623; CHECK-FP16-GI-LABEL: movi1d:624; CHECK-FP16-GI: // %bb.0:625; CHECK-FP16-GI-NEXT: adrp x8, .LCPI57_1626; CHECK-FP16-GI-NEXT: adrp x9, .LCPI57_0627; CHECK-FP16-GI-NEXT: ldr d0, [x8, :lo12:.LCPI57_1]628; CHECK-FP16-GI-NEXT: ldr d1, [x9, :lo12:.LCPI57_0]629; CHECK-FP16-GI-NEXT: b test_movi1d630 %1 = tail call <2 x i32> @test_movi1d(<2 x i32> <i32 -2147483648, i32 2147450880>, <2 x i32> <i32 -65536, i32 65535>)631 ret <2 x i32> %1632}633;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:634; CHECK-NOFP16: {{.*}}635