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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple aarch64 -o - | FileCheck %s3 4define <16 x i8> @rshrn_v16i16_1(<16 x i16> %a) {5; CHECK-LABEL: rshrn_v16i16_1:6; CHECK: // %bb.0: // %entry7; CHECK-NEXT: rshrn v0.8b, v0.8h, #18; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #19; CHECK-NEXT: ret10entry:11 %b = add <16 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>12 %s = lshr <16 x i16> %b, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>13 %m = trunc <16 x i16> %s to <16 x i8>14 ret <16 x i8> %m15}16 17define <16 x i8> @rshrn_v16i16_2(<16 x i16> %a) {18; CHECK-LABEL: rshrn_v16i16_2:19; CHECK: // %bb.0: // %entry20; CHECK-NEXT: rshrn v0.8b, v0.8h, #221; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #222; CHECK-NEXT: ret23entry:24 %b = add <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>25 %s = lshr <16 x i16> %b, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>26 %m = trunc <16 x i16> %s to <16 x i8>27 ret <16 x i8> %m28}29 30define <16 x i8> @rshrn_v16i16_3(<16 x i16> %a) {31; CHECK-LABEL: rshrn_v16i16_3:32; CHECK: // %bb.0: // %entry33; CHECK-NEXT: rshrn v0.8b, v0.8h, #334; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #335; CHECK-NEXT: ret36entry:37 %b = add <16 x i16> %a, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>38 %s = lshr <16 x i16> %b, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>39 %m = trunc <16 x i16> %s to <16 x i8>40 ret <16 x i8> %m41}42 43define <16 x i8> @rshrn_v16i16_4(<16 x i16> %a) {44; CHECK-LABEL: rshrn_v16i16_4:45; CHECK: // %bb.0: // %entry46; CHECK-NEXT: rshrn v0.8b, v0.8h, #447; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #448; CHECK-NEXT: ret49entry:50 %b = add <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>51 %s = lshr <16 x i16> %b, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>52 %m = trunc <16 x i16> %s to <16 x i8>53 ret <16 x i8> %m54}55 56define <16 x i8> @rshrn_v16i16_5(<16 x i16> %a) {57; CHECK-LABEL: rshrn_v16i16_5:58; CHECK: // %bb.0: // %entry59; CHECK-NEXT: rshrn v0.8b, v0.8h, #560; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #561; CHECK-NEXT: ret62entry:63 %b = add <16 x i16> %a, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>64 %s = lshr <16 x i16> %b, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>65 %m = trunc <16 x i16> %s to <16 x i8>66 ret <16 x i8> %m67}68 69define <16 x i8> @rshrn_v16i16_6(<16 x i16> %a) {70; CHECK-LABEL: rshrn_v16i16_6:71; CHECK: // %bb.0: // %entry72; CHECK-NEXT: rshrn v0.8b, v0.8h, #673; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #674; CHECK-NEXT: ret75entry:76 %b = add <16 x i16> %a, <i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32>77 %s = lshr <16 x i16> %b, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>78 %m = trunc <16 x i16> %s to <16 x i8>79 ret <16 x i8> %m80}81 82define <16 x i8> @rshrn_v16i16_7(<16 x i16> %a) {83; CHECK-LABEL: rshrn_v16i16_7:84; CHECK: // %bb.0: // %entry85; CHECK-NEXT: rshrn v0.8b, v0.8h, #786; CHECK-NEXT: rshrn2 v0.16b, v1.8h, #787; CHECK-NEXT: ret88entry:89 %b = add <16 x i16> %a, <i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64, i16 64>90 %s = lshr <16 x i16> %b, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>91 %m = trunc <16 x i16> %s to <16 x i8>92 ret <16 x i8> %m93}94 95define <16 x i8> @rshrn_v16i16_8(<16 x i16> %a) {96; CHECK-LABEL: rshrn_v16i16_8:97; CHECK: // %bb.0: // %entry98; CHECK-NEXT: movi v2.2d, #000000000000000099; CHECK-NEXT: raddhn v0.8b, v0.8h, v2.8h100; CHECK-NEXT: raddhn2 v0.16b, v1.8h, v2.8h101; CHECK-NEXT: ret102entry:103 %b = add <16 x i16> %a, <i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128, i16 128>104 %s = lshr <16 x i16> %b, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>105 %m = trunc <16 x i16> %s to <16 x i8>106 ret <16 x i8> %m107}108 109define <16 x i8> @rshrn_v16i16_9(<16 x i16> %a) {110; CHECK-LABEL: rshrn_v16i16_9:111; CHECK: // %bb.0: // %entry112; CHECK-NEXT: movi v2.8h, #1, lsl #8113; CHECK-NEXT: add v1.8h, v1.8h, v2.8h114; CHECK-NEXT: add v0.8h, v0.8h, v2.8h115; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b116; CHECK-NEXT: ushr v0.16b, v0.16b, #1117; CHECK-NEXT: ret118entry:119 %b = add <16 x i16> %a, <i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256>120 %s = lshr <16 x i16> %b, <i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9, i16 9>121 %m = trunc <16 x i16> %s to <16 x i8>122 ret <16 x i8> %m123}124 125define <8 x i16> @rshrn_v8i32_1(<8 x i32> %a) {126; CHECK-LABEL: rshrn_v8i32_1:127; CHECK: // %bb.0: // %entry128; CHECK-NEXT: rshrn v0.4h, v0.4s, #1129; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #1130; CHECK-NEXT: ret131entry:132 %b = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>133 %s = lshr <8 x i32> %b, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>134 %m = trunc <8 x i32> %s to <8 x i16>135 ret <8 x i16> %m136}137 138define <8 x i16> @rshrn_v8i32_2(<8 x i32> %a) {139; CHECK-LABEL: rshrn_v8i32_2:140; CHECK: // %bb.0: // %entry141; CHECK-NEXT: rshrn v0.4h, v0.4s, #2142; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #2143; CHECK-NEXT: ret144entry:145 %b = add <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>146 %s = lshr <8 x i32> %b, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>147 %m = trunc <8 x i32> %s to <8 x i16>148 ret <8 x i16> %m149}150 151define <8 x i16> @rshrn_v8i32_3(<8 x i32> %a) {152; CHECK-LABEL: rshrn_v8i32_3:153; CHECK: // %bb.0: // %entry154; CHECK-NEXT: rshrn v0.4h, v0.4s, #3155; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #3156; CHECK-NEXT: ret157entry:158 %b = add <8 x i32> %a, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>159 %s = lshr <8 x i32> %b, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>160 %m = trunc <8 x i32> %s to <8 x i16>161 ret <8 x i16> %m162}163 164define <8 x i16> @rshrn_v8i32_4(<8 x i32> %a) {165; CHECK-LABEL: rshrn_v8i32_4:166; CHECK: // %bb.0: // %entry167; CHECK-NEXT: rshrn v0.4h, v0.4s, #4168; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #4169; CHECK-NEXT: ret170entry:171 %b = add <8 x i32> %a, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>172 %s = lshr <8 x i32> %b, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>173 %m = trunc <8 x i32> %s to <8 x i16>174 ret <8 x i16> %m175}176 177define <8 x i16> @rshrn_v8i32_5(<8 x i32> %a) {178; CHECK-LABEL: rshrn_v8i32_5:179; CHECK: // %bb.0: // %entry180; CHECK-NEXT: rshrn v0.4h, v0.4s, #5181; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #5182; CHECK-NEXT: ret183entry:184 %b = add <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>185 %s = lshr <8 x i32> %b, <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>186 %m = trunc <8 x i32> %s to <8 x i16>187 ret <8 x i16> %m188}189 190define <8 x i16> @rshrn_v8i32_6(<8 x i32> %a) {191; CHECK-LABEL: rshrn_v8i32_6:192; CHECK: // %bb.0: // %entry193; CHECK-NEXT: rshrn v0.4h, v0.4s, #6194; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #6195; CHECK-NEXT: ret196entry:197 %b = add <8 x i32> %a, <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32>198 %s = lshr <8 x i32> %b, <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>199 %m = trunc <8 x i32> %s to <8 x i16>200 ret <8 x i16> %m201}202 203define <8 x i16> @rshrn_v8i32_7(<8 x i32> %a) {204; CHECK-LABEL: rshrn_v8i32_7:205; CHECK: // %bb.0: // %entry206; CHECK-NEXT: rshrn v0.4h, v0.4s, #7207; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #7208; CHECK-NEXT: ret209entry:210 %b = add <8 x i32> %a, <i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64>211 %s = lshr <8 x i32> %b, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>212 %m = trunc <8 x i32> %s to <8 x i16>213 ret <8 x i16> %m214}215 216define <8 x i16> @rshrn_v8i32_8(<8 x i32> %a) {217; CHECK-LABEL: rshrn_v8i32_8:218; CHECK: // %bb.0: // %entry219; CHECK-NEXT: rshrn v0.4h, v0.4s, #8220; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #8221; CHECK-NEXT: ret222entry:223 %b = add <8 x i32> %a, <i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128>224 %s = lshr <8 x i32> %b, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>225 %m = trunc <8 x i32> %s to <8 x i16>226 ret <8 x i16> %m227}228 229define <8 x i16> @rshrn_v8i32_9(<8 x i32> %a) {230; CHECK-LABEL: rshrn_v8i32_9:231; CHECK: // %bb.0: // %entry232; CHECK-NEXT: rshrn v0.4h, v0.4s, #9233; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #9234; CHECK-NEXT: ret235entry:236 %b = add <8 x i32> %a, <i32 256, i32 256, i32 256, i32 256, i32 256, i32 256, i32 256, i32 256>237 %s = lshr <8 x i32> %b, <i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9>238 %m = trunc <8 x i32> %s to <8 x i16>239 ret <8 x i16> %m240}241 242define <8 x i16> @rshrn_v8i32_10(<8 x i32> %a) {243; CHECK-LABEL: rshrn_v8i32_10:244; CHECK: // %bb.0: // %entry245; CHECK-NEXT: rshrn v0.4h, v0.4s, #10246; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #10247; CHECK-NEXT: ret248entry:249 %b = add <8 x i32> %a, <i32 512, i32 512, i32 512, i32 512, i32 512, i32 512, i32 512, i32 512>250 %s = lshr <8 x i32> %b, <i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10>251 %m = trunc <8 x i32> %s to <8 x i16>252 ret <8 x i16> %m253}254 255define <8 x i16> @rshrn_v8i32_11(<8 x i32> %a) {256; CHECK-LABEL: rshrn_v8i32_11:257; CHECK: // %bb.0: // %entry258; CHECK-NEXT: rshrn v0.4h, v0.4s, #11259; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #11260; CHECK-NEXT: ret261entry:262 %b = add <8 x i32> %a, <i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024>263 %s = lshr <8 x i32> %b, <i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11>264 %m = trunc <8 x i32> %s to <8 x i16>265 ret <8 x i16> %m266}267 268define <8 x i16> @rshrn_v8i32_12(<8 x i32> %a) {269; CHECK-LABEL: rshrn_v8i32_12:270; CHECK: // %bb.0: // %entry271; CHECK-NEXT: rshrn v0.4h, v0.4s, #12272; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #12273; CHECK-NEXT: ret274entry:275 %b = add <8 x i32> %a, <i32 2048, i32 2048, i32 2048, i32 2048, i32 2048, i32 2048, i32 2048, i32 2048>276 %s = lshr <8 x i32> %b, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12>277 %m = trunc <8 x i32> %s to <8 x i16>278 ret <8 x i16> %m279}280 281define <8 x i16> @rshrn_v8i32_13(<8 x i32> %a) {282; CHECK-LABEL: rshrn_v8i32_13:283; CHECK: // %bb.0: // %entry284; CHECK-NEXT: rshrn v0.4h, v0.4s, #13285; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #13286; CHECK-NEXT: ret287entry:288 %b = add <8 x i32> %a, <i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096>289 %s = lshr <8 x i32> %b, <i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13>290 %m = trunc <8 x i32> %s to <8 x i16>291 ret <8 x i16> %m292}293 294define <8 x i16> @rshrn_v8i32_14(<8 x i32> %a) {295; CHECK-LABEL: rshrn_v8i32_14:296; CHECK: // %bb.0: // %entry297; CHECK-NEXT: rshrn v0.4h, v0.4s, #14298; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #14299; CHECK-NEXT: ret300entry:301 %b = add <8 x i32> %a, <i32 8192, i32 8192, i32 8192, i32 8192, i32 8192, i32 8192, i32 8192, i32 8192>302 %s = lshr <8 x i32> %b, <i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14>303 %m = trunc <8 x i32> %s to <8 x i16>304 ret <8 x i16> %m305}306 307define <8 x i16> @rshrn_v8i32_15(<8 x i32> %a) {308; CHECK-LABEL: rshrn_v8i32_15:309; CHECK: // %bb.0: // %entry310; CHECK-NEXT: rshrn v0.4h, v0.4s, #15311; CHECK-NEXT: rshrn2 v0.8h, v1.4s, #15312; CHECK-NEXT: ret313entry:314 %b = add <8 x i32> %a, <i32 16384, i32 16384, i32 16384, i32 16384, i32 16384, i32 16384, i32 16384, i32 16384>315 %s = lshr <8 x i32> %b, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>316 %m = trunc <8 x i32> %s to <8 x i16>317 ret <8 x i16> %m318}319 320define <8 x i16> @rshrn_v8i32_16(<8 x i32> %a) {321; CHECK-LABEL: rshrn_v8i32_16:322; CHECK: // %bb.0: // %entry323; CHECK-NEXT: movi v2.2d, #0000000000000000324; CHECK-NEXT: raddhn v0.4h, v0.4s, v2.4s325; CHECK-NEXT: raddhn2 v0.8h, v1.4s, v2.4s326; CHECK-NEXT: ret327entry:328 %b = add <8 x i32> %a, <i32 32768, i32 32768, i32 32768, i32 32768, i32 32768, i32 32768, i32 32768, i32 32768>329 %s = lshr <8 x i32> %b, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>330 %m = trunc <8 x i32> %s to <8 x i16>331 ret <8 x i16> %m332}333 334define <8 x i16> @rshrn_v8i32_17(<8 x i32> %a) {335; CHECK-LABEL: rshrn_v8i32_17:336; CHECK: // %bb.0: // %entry337; CHECK-NEXT: movi v2.4s, #1, lsl #16338; CHECK-NEXT: add v1.4s, v1.4s, v2.4s339; CHECK-NEXT: add v0.4s, v0.4s, v2.4s340; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h341; CHECK-NEXT: ushr v0.8h, v0.8h, #1342; CHECK-NEXT: ret343entry:344 %b = add <8 x i32> %a, <i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536>345 %s = lshr <8 x i32> %b, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>346 %m = trunc <8 x i32> %s to <8 x i16>347 ret <8 x i16> %m348}349 350define <4 x i32> @rshrn_v4i64_1(<4 x i64> %a) {351; CHECK-LABEL: rshrn_v4i64_1:352; CHECK: // %bb.0: // %entry353; CHECK-NEXT: rshrn v0.2s, v0.2d, #1354; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #1355; CHECK-NEXT: ret356entry:357 %b = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>358 %s = lshr <4 x i64> %b, <i64 1, i64 1, i64 1, i64 1>359 %m = trunc <4 x i64> %s to <4 x i32>360 ret <4 x i32> %m361}362 363define <4 x i32> @rshrn_v4i64_2(<4 x i64> %a) {364; CHECK-LABEL: rshrn_v4i64_2:365; CHECK: // %bb.0: // %entry366; CHECK-NEXT: rshrn v0.2s, v0.2d, #2367; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #2368; CHECK-NEXT: ret369entry:370 %b = add <4 x i64> %a, <i64 2, i64 2, i64 2, i64 2>371 %s = lshr <4 x i64> %b, <i64 2, i64 2, i64 2, i64 2>372 %m = trunc <4 x i64> %s to <4 x i32>373 ret <4 x i32> %m374}375 376define <4 x i32> @rshrn_v4i64_3(<4 x i64> %a) {377; CHECK-LABEL: rshrn_v4i64_3:378; CHECK: // %bb.0: // %entry379; CHECK-NEXT: rshrn v0.2s, v0.2d, #3380; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #3381; CHECK-NEXT: ret382entry:383 %b = add <4 x i64> %a, <i64 4, i64 4, i64 4, i64 4>384 %s = lshr <4 x i64> %b, <i64 3, i64 3, i64 3, i64 3>385 %m = trunc <4 x i64> %s to <4 x i32>386 ret <4 x i32> %m387}388 389define <4 x i32> @rshrn_v4i64_4(<4 x i64> %a) {390; CHECK-LABEL: rshrn_v4i64_4:391; CHECK: // %bb.0: // %entry392; CHECK-NEXT: rshrn v0.2s, v0.2d, #4393; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #4394; CHECK-NEXT: ret395entry:396 %b = add <4 x i64> %a, <i64 8, i64 8, i64 8, i64 8>397 %s = lshr <4 x i64> %b, <i64 4, i64 4, i64 4, i64 4>398 %m = trunc <4 x i64> %s to <4 x i32>399 ret <4 x i32> %m400}401 402define <4 x i32> @rshrn_v4i64_5(<4 x i64> %a) {403; CHECK-LABEL: rshrn_v4i64_5:404; CHECK: // %bb.0: // %entry405; CHECK-NEXT: rshrn v0.2s, v0.2d, #5406; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #5407; CHECK-NEXT: ret408entry:409 %b = add <4 x i64> %a, <i64 16, i64 16, i64 16, i64 16>410 %s = lshr <4 x i64> %b, <i64 5, i64 5, i64 5, i64 5>411 %m = trunc <4 x i64> %s to <4 x i32>412 ret <4 x i32> %m413}414 415define <4 x i32> @rshrn_v4i64_6(<4 x i64> %a) {416; CHECK-LABEL: rshrn_v4i64_6:417; CHECK: // %bb.0: // %entry418; CHECK-NEXT: rshrn v0.2s, v0.2d, #6419; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #6420; CHECK-NEXT: ret421entry:422 %b = add <4 x i64> %a, <i64 32, i64 32, i64 32, i64 32>423 %s = lshr <4 x i64> %b, <i64 6, i64 6, i64 6, i64 6>424 %m = trunc <4 x i64> %s to <4 x i32>425 ret <4 x i32> %m426}427 428define <4 x i32> @rshrn_v4i64_7(<4 x i64> %a) {429; CHECK-LABEL: rshrn_v4i64_7:430; CHECK: // %bb.0: // %entry431; CHECK-NEXT: rshrn v0.2s, v0.2d, #7432; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #7433; CHECK-NEXT: ret434entry:435 %b = add <4 x i64> %a, <i64 64, i64 64, i64 64, i64 64>436 %s = lshr <4 x i64> %b, <i64 7, i64 7, i64 7, i64 7>437 %m = trunc <4 x i64> %s to <4 x i32>438 ret <4 x i32> %m439}440 441define <4 x i32> @rshrn_v4i64_8(<4 x i64> %a) {442; CHECK-LABEL: rshrn_v4i64_8:443; CHECK: // %bb.0: // %entry444; CHECK-NEXT: rshrn v0.2s, v0.2d, #8445; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #8446; CHECK-NEXT: ret447entry:448 %b = add <4 x i64> %a, <i64 128, i64 128, i64 128, i64 128>449 %s = lshr <4 x i64> %b, <i64 8, i64 8, i64 8, i64 8>450 %m = trunc <4 x i64> %s to <4 x i32>451 ret <4 x i32> %m452}453 454define <4 x i32> @rshrn_v4i64_9(<4 x i64> %a) {455; CHECK-LABEL: rshrn_v4i64_9:456; CHECK: // %bb.0: // %entry457; CHECK-NEXT: rshrn v0.2s, v0.2d, #9458; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #9459; CHECK-NEXT: ret460entry:461 %b = add <4 x i64> %a, <i64 256, i64 256, i64 256, i64 256>462 %s = lshr <4 x i64> %b, <i64 9, i64 9, i64 9, i64 9>463 %m = trunc <4 x i64> %s to <4 x i32>464 ret <4 x i32> %m465}466 467define <4 x i32> @rshrn_v4i64_10(<4 x i64> %a) {468; CHECK-LABEL: rshrn_v4i64_10:469; CHECK: // %bb.0: // %entry470; CHECK-NEXT: rshrn v0.2s, v0.2d, #10471; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #10472; CHECK-NEXT: ret473entry:474 %b = add <4 x i64> %a, <i64 512, i64 512, i64 512, i64 512>475 %s = lshr <4 x i64> %b, <i64 10, i64 10, i64 10, i64 10>476 %m = trunc <4 x i64> %s to <4 x i32>477 ret <4 x i32> %m478}479 480define <4 x i32> @rshrn_v4i64_11(<4 x i64> %a) {481; CHECK-LABEL: rshrn_v4i64_11:482; CHECK: // %bb.0: // %entry483; CHECK-NEXT: rshrn v0.2s, v0.2d, #11484; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #11485; CHECK-NEXT: ret486entry:487 %b = add <4 x i64> %a, <i64 1024, i64 1024, i64 1024, i64 1024>488 %s = lshr <4 x i64> %b, <i64 11, i64 11, i64 11, i64 11>489 %m = trunc <4 x i64> %s to <4 x i32>490 ret <4 x i32> %m491}492 493define <4 x i32> @rshrn_v4i64_12(<4 x i64> %a) {494; CHECK-LABEL: rshrn_v4i64_12:495; CHECK: // %bb.0: // %entry496; CHECK-NEXT: rshrn v0.2s, v0.2d, #12497; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #12498; CHECK-NEXT: ret499entry:500 %b = add <4 x i64> %a, <i64 2048, i64 2048, i64 2048, i64 2048>501 %s = lshr <4 x i64> %b, <i64 12, i64 12, i64 12, i64 12>502 %m = trunc <4 x i64> %s to <4 x i32>503 ret <4 x i32> %m504}505 506define <4 x i32> @rshrn_v4i64_13(<4 x i64> %a) {507; CHECK-LABEL: rshrn_v4i64_13:508; CHECK: // %bb.0: // %entry509; CHECK-NEXT: rshrn v0.2s, v0.2d, #13510; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #13511; CHECK-NEXT: ret512entry:513 %b = add <4 x i64> %a, <i64 4096, i64 4096, i64 4096, i64 4096>514 %s = lshr <4 x i64> %b, <i64 13, i64 13, i64 13, i64 13>515 %m = trunc <4 x i64> %s to <4 x i32>516 ret <4 x i32> %m517}518 519define <4 x i32> @rshrn_v4i64_14(<4 x i64> %a) {520; CHECK-LABEL: rshrn_v4i64_14:521; CHECK: // %bb.0: // %entry522; CHECK-NEXT: rshrn v0.2s, v0.2d, #14523; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #14524; CHECK-NEXT: ret525entry:526 %b = add <4 x i64> %a, <i64 8192, i64 8192, i64 8192, i64 8192>527 %s = lshr <4 x i64> %b, <i64 14, i64 14, i64 14, i64 14>528 %m = trunc <4 x i64> %s to <4 x i32>529 ret <4 x i32> %m530}531 532define <4 x i32> @rshrn_v4i64_15(<4 x i64> %a) {533; CHECK-LABEL: rshrn_v4i64_15:534; CHECK: // %bb.0: // %entry535; CHECK-NEXT: rshrn v0.2s, v0.2d, #15536; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #15537; CHECK-NEXT: ret538entry:539 %b = add <4 x i64> %a, <i64 16384, i64 16384, i64 16384, i64 16384>540 %s = lshr <4 x i64> %b, <i64 15, i64 15, i64 15, i64 15>541 %m = trunc <4 x i64> %s to <4 x i32>542 ret <4 x i32> %m543}544 545define <4 x i32> @rshrn_v4i64_16(<4 x i64> %a) {546; CHECK-LABEL: rshrn_v4i64_16:547; CHECK: // %bb.0: // %entry548; CHECK-NEXT: rshrn v0.2s, v0.2d, #16549; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #16550; CHECK-NEXT: ret551entry:552 %b = add <4 x i64> %a, <i64 32768, i64 32768, i64 32768, i64 32768>553 %s = lshr <4 x i64> %b, <i64 16, i64 16, i64 16, i64 16>554 %m = trunc <4 x i64> %s to <4 x i32>555 ret <4 x i32> %m556}557 558define <4 x i32> @rshrn_v4i64_17(<4 x i64> %a) {559; CHECK-LABEL: rshrn_v4i64_17:560; CHECK: // %bb.0: // %entry561; CHECK-NEXT: rshrn v0.2s, v0.2d, #17562; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #17563; CHECK-NEXT: ret564entry:565 %b = add <4 x i64> %a, <i64 65536, i64 65536, i64 65536, i64 65536>566 %s = lshr <4 x i64> %b, <i64 17, i64 17, i64 17, i64 17>567 %m = trunc <4 x i64> %s to <4 x i32>568 ret <4 x i32> %m569}570 571define <4 x i32> @rshrn_v4i64_18(<4 x i64> %a) {572; CHECK-LABEL: rshrn_v4i64_18:573; CHECK: // %bb.0: // %entry574; CHECK-NEXT: rshrn v0.2s, v0.2d, #18575; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #18576; CHECK-NEXT: ret577entry:578 %b = add <4 x i64> %a, <i64 131072, i64 131072, i64 131072, i64 131072>579 %s = lshr <4 x i64> %b, <i64 18, i64 18, i64 18, i64 18>580 %m = trunc <4 x i64> %s to <4 x i32>581 ret <4 x i32> %m582}583 584define <4 x i32> @rshrn_v4i64_19(<4 x i64> %a) {585; CHECK-LABEL: rshrn_v4i64_19:586; CHECK: // %bb.0: // %entry587; CHECK-NEXT: rshrn v0.2s, v0.2d, #19588; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #19589; CHECK-NEXT: ret590entry:591 %b = add <4 x i64> %a, <i64 262144, i64 262144, i64 262144, i64 262144>592 %s = lshr <4 x i64> %b, <i64 19, i64 19, i64 19, i64 19>593 %m = trunc <4 x i64> %s to <4 x i32>594 ret <4 x i32> %m595}596 597define <4 x i32> @rshrn_v4i64_20(<4 x i64> %a) {598; CHECK-LABEL: rshrn_v4i64_20:599; CHECK: // %bb.0: // %entry600; CHECK-NEXT: rshrn v0.2s, v0.2d, #20601; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #20602; CHECK-NEXT: ret603entry:604 %b = add <4 x i64> %a, <i64 524288, i64 524288, i64 524288, i64 524288>605 %s = lshr <4 x i64> %b, <i64 20, i64 20, i64 20, i64 20>606 %m = trunc <4 x i64> %s to <4 x i32>607 ret <4 x i32> %m608}609 610define <4 x i32> @rshrn_v4i64_21(<4 x i64> %a) {611; CHECK-LABEL: rshrn_v4i64_21:612; CHECK: // %bb.0: // %entry613; CHECK-NEXT: rshrn v0.2s, v0.2d, #21614; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #21615; CHECK-NEXT: ret616entry:617 %b = add <4 x i64> %a, <i64 1048576, i64 1048576, i64 1048576, i64 1048576>618 %s = lshr <4 x i64> %b, <i64 21, i64 21, i64 21, i64 21>619 %m = trunc <4 x i64> %s to <4 x i32>620 ret <4 x i32> %m621}622 623define <4 x i32> @rshrn_v4i64_22(<4 x i64> %a) {624; CHECK-LABEL: rshrn_v4i64_22:625; CHECK: // %bb.0: // %entry626; CHECK-NEXT: rshrn v0.2s, v0.2d, #22627; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #22628; CHECK-NEXT: ret629entry:630 %b = add <4 x i64> %a, <i64 2097152, i64 2097152, i64 2097152, i64 2097152>631 %s = lshr <4 x i64> %b, <i64 22, i64 22, i64 22, i64 22>632 %m = trunc <4 x i64> %s to <4 x i32>633 ret <4 x i32> %m634}635 636define <4 x i32> @rshrn_v4i64_23(<4 x i64> %a) {637; CHECK-LABEL: rshrn_v4i64_23:638; CHECK: // %bb.0: // %entry639; CHECK-NEXT: rshrn v0.2s, v0.2d, #23640; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #23641; CHECK-NEXT: ret642entry:643 %b = add <4 x i64> %a, <i64 4194304, i64 4194304, i64 4194304, i64 4194304>644 %s = lshr <4 x i64> %b, <i64 23, i64 23, i64 23, i64 23>645 %m = trunc <4 x i64> %s to <4 x i32>646 ret <4 x i32> %m647}648 649define <4 x i32> @rshrn_v4i64_24(<4 x i64> %a) {650; CHECK-LABEL: rshrn_v4i64_24:651; CHECK: // %bb.0: // %entry652; CHECK-NEXT: rshrn v0.2s, v0.2d, #24653; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #24654; CHECK-NEXT: ret655entry:656 %b = add <4 x i64> %a, <i64 8388608, i64 8388608, i64 8388608, i64 8388608>657 %s = lshr <4 x i64> %b, <i64 24, i64 24, i64 24, i64 24>658 %m = trunc <4 x i64> %s to <4 x i32>659 ret <4 x i32> %m660}661 662define <4 x i32> @rshrn_v4i64_25(<4 x i64> %a) {663; CHECK-LABEL: rshrn_v4i64_25:664; CHECK: // %bb.0: // %entry665; CHECK-NEXT: rshrn v0.2s, v0.2d, #25666; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #25667; CHECK-NEXT: ret668entry:669 %b = add <4 x i64> %a, <i64 16777216, i64 16777216, i64 16777216, i64 16777216>670 %s = lshr <4 x i64> %b, <i64 25, i64 25, i64 25, i64 25>671 %m = trunc <4 x i64> %s to <4 x i32>672 ret <4 x i32> %m673}674 675define <4 x i32> @rshrn_v4i64_26(<4 x i64> %a) {676; CHECK-LABEL: rshrn_v4i64_26:677; CHECK: // %bb.0: // %entry678; CHECK-NEXT: rshrn v0.2s, v0.2d, #26679; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #26680; CHECK-NEXT: ret681entry:682 %b = add <4 x i64> %a, <i64 33554432, i64 33554432, i64 33554432, i64 33554432>683 %s = lshr <4 x i64> %b, <i64 26, i64 26, i64 26, i64 26>684 %m = trunc <4 x i64> %s to <4 x i32>685 ret <4 x i32> %m686}687 688define <4 x i32> @rshrn_v4i64_27(<4 x i64> %a) {689; CHECK-LABEL: rshrn_v4i64_27:690; CHECK: // %bb.0: // %entry691; CHECK-NEXT: rshrn v0.2s, v0.2d, #27692; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #27693; CHECK-NEXT: ret694entry:695 %b = add <4 x i64> %a, <i64 67108864, i64 67108864, i64 67108864, i64 67108864>696 %s = lshr <4 x i64> %b, <i64 27, i64 27, i64 27, i64 27>697 %m = trunc <4 x i64> %s to <4 x i32>698 ret <4 x i32> %m699}700 701define <4 x i32> @rshrn_v4i64_28(<4 x i64> %a) {702; CHECK-LABEL: rshrn_v4i64_28:703; CHECK: // %bb.0: // %entry704; CHECK-NEXT: rshrn v0.2s, v0.2d, #28705; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #28706; CHECK-NEXT: ret707entry:708 %b = add <4 x i64> %a, <i64 134217728, i64 134217728, i64 134217728, i64 134217728>709 %s = lshr <4 x i64> %b, <i64 28, i64 28, i64 28, i64 28>710 %m = trunc <4 x i64> %s to <4 x i32>711 ret <4 x i32> %m712}713 714define <4 x i32> @rshrn_v4i64_29(<4 x i64> %a) {715; CHECK-LABEL: rshrn_v4i64_29:716; CHECK: // %bb.0: // %entry717; CHECK-NEXT: rshrn v0.2s, v0.2d, #29718; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #29719; CHECK-NEXT: ret720entry:721 %b = add <4 x i64> %a, <i64 268435456, i64 268435456, i64 268435456, i64 268435456>722 %s = lshr <4 x i64> %b, <i64 29, i64 29, i64 29, i64 29>723 %m = trunc <4 x i64> %s to <4 x i32>724 ret <4 x i32> %m725}726 727define <4 x i32> @rshrn_v4i64_30(<4 x i64> %a) {728; CHECK-LABEL: rshrn_v4i64_30:729; CHECK: // %bb.0: // %entry730; CHECK-NEXT: rshrn v0.2s, v0.2d, #30731; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #30732; CHECK-NEXT: ret733entry:734 %b = add <4 x i64> %a, <i64 536870912, i64 536870912, i64 536870912, i64 536870912>735 %s = lshr <4 x i64> %b, <i64 30, i64 30, i64 30, i64 30>736 %m = trunc <4 x i64> %s to <4 x i32>737 ret <4 x i32> %m738}739 740define <4 x i32> @rshrn_v4i64_31(<4 x i64> %a) {741; CHECK-LABEL: rshrn_v4i64_31:742; CHECK: // %bb.0: // %entry743; CHECK-NEXT: rshrn v0.2s, v0.2d, #31744; CHECK-NEXT: rshrn2 v0.4s, v1.2d, #31745; CHECK-NEXT: ret746entry:747 %b = add <4 x i64> %a, <i64 1073741824, i64 1073741824, i64 1073741824, i64 1073741824>748 %s = lshr <4 x i64> %b, <i64 31, i64 31, i64 31, i64 31>749 %m = trunc <4 x i64> %s to <4 x i32>750 ret <4 x i32> %m751}752 753define <4 x i32> @rshrn_v4i64_32(<4 x i64> %a) {754; CHECK-LABEL: rshrn_v4i64_32:755; CHECK: // %bb.0: // %entry756; CHECK-NEXT: movi v2.2d, #0000000000000000757; CHECK-NEXT: raddhn v0.2s, v0.2d, v2.2d758; CHECK-NEXT: raddhn2 v0.4s, v1.2d, v2.2d759; CHECK-NEXT: ret760entry:761 %b = add <4 x i64> %a, <i64 2147483648, i64 2147483648, i64 2147483648, i64 2147483648>762 %s = lshr <4 x i64> %b, <i64 32, i64 32, i64 32, i64 32>763 %m = trunc <4 x i64> %s to <4 x i32>764 ret <4 x i32> %m765}766 767define <4 x i32> @rshrn_v4i64_33(<4 x i64> %a) {768; CHECK-LABEL: rshrn_v4i64_33:769; CHECK: // %bb.0: // %entry770; CHECK-NEXT: mov x8, #4294967296 // =0x100000000771; CHECK-NEXT: dup v2.2d, x8772; CHECK-NEXT: add v1.2d, v1.2d, v2.2d773; CHECK-NEXT: add v0.2d, v0.2d, v2.2d774; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s775; CHECK-NEXT: ushr v0.4s, v0.4s, #1776; CHECK-NEXT: ret777entry:778 %b = add <4 x i64> %a, <i64 4294967296, i64 4294967296, i64 4294967296, i64 4294967296>779 %s = lshr <4 x i64> %b, <i64 33, i64 33, i64 33, i64 33>780 %m = trunc <4 x i64> %s to <4 x i32>781 ret <4 x i32> %m782}783 784define <8 x i8> @rshrn_v8i16_5(<8 x i16> %a) {785; CHECK-LABEL: rshrn_v8i16_5:786; CHECK: // %bb.0: // %entry787; CHECK-NEXT: rshrn v0.8b, v0.8h, #5788; CHECK-NEXT: ret789entry:790 %b = add <8 x i16> %a, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>791 %s = lshr <8 x i16> %b, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>792 %m = trunc <8 x i16> %s to <8 x i8>793 ret <8 x i8> %m794}795 796define <4 x i16> @rshrn_v4i32_4(<4 x i32> %a) {797; CHECK-LABEL: rshrn_v4i32_4:798; CHECK: // %bb.0: // %entry799; CHECK-NEXT: rshrn v0.4h, v0.4s, #4800; CHECK-NEXT: ret801entry:802 %b = add <4 x i32> %a, <i32 8, i32 8, i32 8, i32 8>803 %s = lshr <4 x i32> %b, <i32 4, i32 4, i32 4, i32 4>804 %m = trunc <4 x i32> %s to <4 x i16>805 ret <4 x i16> %m806}807 808define <2 x i32> @rshrn_v2i64_5(<2 x i64> %a) {809; CHECK-LABEL: rshrn_v2i64_5:810; CHECK: // %bb.0: // %entry811; CHECK-NEXT: rshrn v0.2s, v0.2d, #5812; CHECK-NEXT: ret813entry:814 %b = add <2 x i64> %a, <i64 16, i64 16>815 %s = lshr <2 x i64> %b, <i64 5, i64 5>816 %m = trunc <2 x i64> %s to <2 x i32>817 ret <2 x i32> %m818}819 820define void @rshrn_v8i32i8_5(<8 x i32> %a, ptr %p) {821; CHECK-LABEL: rshrn_v8i32i8_5:822; CHECK: // %bb.0: // %entry823; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h824; CHECK-NEXT: rshrn v0.8b, v0.8h, #5825; CHECK-NEXT: str d0, [x0]826; CHECK-NEXT: ret827entry:828 %b = add <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>829 %s = lshr <8 x i32> %b, <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>830 %m = trunc <8 x i32> %s to <8 x i8>831 store <8 x i8> %m, ptr %p832 ret void833}834 835define void @rshrn_v4i64i16_4(<4 x i64> %a, ptr %p) {836; CHECK-LABEL: rshrn_v4i64i16_4:837; CHECK: // %bb.0: // %entry838; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s839; CHECK-NEXT: rshrn v0.4h, v0.4s, #4840; CHECK-NEXT: str d0, [x0]841; CHECK-NEXT: ret842entry:843 %b = add <4 x i64> %a, <i64 8, i64 8, i64 8, i64 8>844 %s = lshr <4 x i64> %b, <i64 4, i64 4, i64 4, i64 4>845 %m = trunc <4 x i64> %s to <4 x i16>846 store <4 x i16> %m, ptr %p847 ret void848}849 850define void @rshrn_v4i16_5(<4 x i16> %a, ptr %p) {851; CHECK-LABEL: rshrn_v4i16_5:852; CHECK: // %bb.0: // %entry853; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0854; CHECK-NEXT: rshrn v0.8b, v0.8h, #5855; CHECK-NEXT: str s0, [x0]856; CHECK-NEXT: ret857entry:858 %b = add <4 x i16> %a, <i16 16, i16 16, i16 16, i16 16>859 %s = lshr <4 x i16> %b, <i16 5, i16 5, i16 5, i16 5>860 %m = trunc <4 x i16> %s to <4 x i8>861 store <4 x i8> %m, ptr %p862 ret void863}864 865define void @rshrn_v2i32_4(<2 x i32> %a, ptr %p) {866; CHECK-LABEL: rshrn_v2i32_4:867; CHECK: // %bb.0: // %entry868; CHECK-NEXT: movi v1.2s, #8869; CHECK-NEXT: add v0.2s, v0.2s, v1.2s870; CHECK-NEXT: ushr v0.2s, v0.2s, #4871; CHECK-NEXT: mov s1, v0.s[1]872; CHECK-NEXT: str h0, [x0]873; CHECK-NEXT: str h1, [x0, #2]874; CHECK-NEXT: ret875entry:876 %b = add <2 x i32> %a, <i32 8, i32 8>877 %s = lshr <2 x i32> %b, <i32 4, i32 4>878 %m = trunc <2 x i32> %s to <2 x i16>879 store <2 x i16> %m, ptr %p880 ret void881}882 883define void @rshrn_v1i64_5(<1 x i64> %a, ptr %p) {884; CHECK-LABEL: rshrn_v1i64_5:885; CHECK: // %bb.0: // %entry886; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0887; CHECK-NEXT: rshrn v0.2s, v0.2d, #5888; CHECK-NEXT: str s0, [x0]889; CHECK-NEXT: ret890entry:891 %b = add <1 x i64> %a, <i64 16>892 %s = lshr <1 x i64> %b, <i64 5>893 %m = trunc <1 x i64> %s to <1 x i32>894 store <1 x i32> %m, ptr %p895 ret void896}897