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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon,+sve | FileCheck %s3 4define <2 x i64> @shr64x2(<2 x i64> %a, i64 %b) {5; CHECK-LABEL: shr64x2:6; CHECK:       // %bb.0: // %entry7; CHECK-NEXT:    dup v1.2d, x08; CHECK-NEXT:    sshl v0.2d, v0.2d, v1.2d9; CHECK-NEXT:    ret10entry:11  %sub = sub nsw i64 0, %b12  %splat.splatinsert = insertelement <2 x i64> poison, i64 %sub, i32 013  %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer14  %shr = ashr <2 x i64> %a, %splat.splat15  ret <2 x i64> %shr16}17 18define <4 x i32> @shr32x4(<4 x i32> %a, i32 %b) {19; CHECK-LABEL: shr32x4:20; CHECK:       // %bb.0: // %entry21; CHECK-NEXT:    dup v1.4s, w022; CHECK-NEXT:    sshl v0.4s, v0.4s, v1.4s23; CHECK-NEXT:    ret24entry:25  %sub = sub nsw i32 0, %b26  %splat.splatinsert = insertelement <4 x i32> poison, i32 %sub, i32 027  %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer28  %shr = ashr <4 x i32> %a, %splat.splat29  ret <4 x i32> %shr30}31 32define <4 x i32> @shr32x4undef(<4 x i32> %a, i32 %b) {33; CHECK-LABEL: shr32x4undef:34; CHECK:       // %bb.0: // %entry35; CHECK-NEXT:    dup v1.4s, w036; CHECK-NEXT:    sshl v0.4s, v0.4s, v1.4s37; CHECK-NEXT:    ret38entry:39  %sub = sub nsw i32 0, %b40  %splat.splatinsert = insertelement <4 x i32> poison, i32 %sub, i32 041  %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> poison, <4 x i32> <i32 undef, i32 0, i32 0, i32 0>42  %shr = ashr <4 x i32> %a, %splat.splat43  ret <4 x i32> %shr44}45 46define <8 x i16> @shr16x8(<8 x i16> %a, i16 %b) {47; CHECK-LABEL: shr16x8:48; CHECK:       // %bb.0: // %entry49; CHECK-NEXT:    dup v1.8h, w050; CHECK-NEXT:    sshl v0.8h, v0.8h, v1.8h51; CHECK-NEXT:    ret52entry:53  %sub = sub i16 0, %b54  %0 = insertelement <8 x i16> undef, i16 %sub, i32 055  %sh_prom = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> zeroinitializer56  %shr = ashr <8 x i16> %a, %sh_prom57  ret <8 x i16> %shr58}59 60define <16 x i8> @shr8x16(<16 x i8> %a, i8 %b) {61; CHECK-LABEL: shr8x16:62; CHECK:       // %bb.0: // %entry63; CHECK-NEXT:    dup v1.16b, w064; CHECK-NEXT:    sshl v0.16b, v0.16b, v1.16b65; CHECK-NEXT:    ret66entry:67  %sub = sub i8 0, %b68  %0 = insertelement <16 x i8> undef, i8 %sub, i32 069  %sh_prom = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> zeroinitializer70  %shr = ashr <16 x i8> %a, %sh_prom71  ret <16 x i8> %shr72}73 74define <1 x i64> @shr64x1(<1 x i64> %a, i64 %b) {75; CHECK-LABEL: shr64x1:76; CHECK:       // %bb.0: // %entry77; CHECK-NEXT:    fmov d1, x078; CHECK-NEXT:    sshl d0, d0, d179; CHECK-NEXT:    ret80entry:81  %sub = sub nsw i64 0, %b82  %splat.splatinsert = insertelement <1 x i64> poison, i64 %sub, i32 083  %shr = ashr <1 x i64> %a, %splat.splatinsert84  ret <1 x i64> %shr85}86 87define <2 x i32> @shr32x2(<2 x i32> %a, i32 %b) {88; CHECK-LABEL: shr32x2:89; CHECK:       // %bb.0: // %entry90; CHECK-NEXT:    dup v1.2s, w091; CHECK-NEXT:    sshl v0.2s, v0.2s, v1.2s92; CHECK-NEXT:    ret93entry:94  %sub = sub nsw i32 0, %b95  %splat.splatinsert = insertelement <2 x i32> poison, i32 %sub, i32 096  %splat.splat = shufflevector <2 x i32> %splat.splatinsert, <2 x i32> poison, <2 x i32> zeroinitializer97  %shr = ashr <2 x i32> %a, %splat.splat98  ret <2 x i32> %shr99}100 101define <4 x i16> @shr16x4(<4 x i16> %a, i16 %b) {102; CHECK-LABEL: shr16x4:103; CHECK:       // %bb.0: // %entry104; CHECK-NEXT:    dup v1.4h, w0105; CHECK-NEXT:    sshl v0.4h, v0.4h, v1.4h106; CHECK-NEXT:    ret107entry:108  %sub = sub i16 0, %b109  %0 = insertelement <4 x i16> undef, i16 %sub, i32 0110  %sh_prom = shufflevector <4 x i16> %0, <4 x i16> undef, <4 x i32> zeroinitializer111  %shr = ashr <4 x i16> %a, %sh_prom112  ret <4 x i16> %shr113}114 115define <8 x i8> @shr8x8(<8 x i8> %a, i8 %b) {116; CHECK-LABEL: shr8x8:117; CHECK:       // %bb.0: // %entry118; CHECK-NEXT:    dup v1.8b, w0119; CHECK-NEXT:    sshl v0.8b, v0.8b, v1.8b120; CHECK-NEXT:    ret121entry:122  %sub = sub i8 0, %b123  %0 = insertelement <8 x i8> undef, i8 %sub, i32 0124  %sh_prom = shufflevector <8 x i8> %0, <8 x i8> undef, <8 x i32> zeroinitializer125  %shr = ashr <8 x i8> %a, %sh_prom126  ret <8 x i8> %shr127}128 129define <2 x i64> @lshr64x2(<2 x i64> %a, i64 %b) {130; CHECK-LABEL: lshr64x2:131; CHECK:       // %bb.0: // %entry132; CHECK-NEXT:    dup v1.2d, x0133; CHECK-NEXT:    ushl v0.2d, v0.2d, v1.2d134; CHECK-NEXT:    ret135entry:136  %sub = sub nsw i64 0, %b137  %splat.splatinsert = insertelement <2 x i64> poison, i64 %sub, i32 0138  %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer139  %shr = lshr <2 x i64> %a, %splat.splat140  ret <2 x i64> %shr141}142 143define <4 x i32> @lshr32x4(<4 x i32> %a, i32 %b) {144; CHECK-LABEL: lshr32x4:145; CHECK:       // %bb.0: // %entry146; CHECK-NEXT:    dup v1.4s, w0147; CHECK-NEXT:    ushl v0.4s, v0.4s, v1.4s148; CHECK-NEXT:    ret149entry:150  %sub = sub nsw i32 0, %b151  %splat.splatinsert = insertelement <4 x i32> poison, i32 %sub, i32 0152  %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer153  %shr = lshr <4 x i32> %a, %splat.splat154  ret <4 x i32> %shr155}156 157define <4 x i32> @lshr32x4undef(<4 x i32> %a, i32 %b) {158; CHECK-LABEL: lshr32x4undef:159; CHECK:       // %bb.0: // %entry160; CHECK-NEXT:    dup v1.4s, w0161; CHECK-NEXT:    ushl v0.4s, v0.4s, v1.4s162; CHECK-NEXT:    ret163entry:164  %sub = sub nsw i32 0, %b165  %splat.splatinsert = insertelement <4 x i32> poison, i32 %sub, i32 0166  %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> poison, <4 x i32> <i32 undef, i32 0, i32 0, i32 0>167  %shr = lshr <4 x i32> %a, %splat.splat168  ret <4 x i32> %shr169}170 171define <8 x i16> @lshr16x8(<8 x i16> %a, i16 %b) {172; CHECK-LABEL: lshr16x8:173; CHECK:       // %bb.0: // %entry174; CHECK-NEXT:    dup v1.8h, w0175; CHECK-NEXT:    ushl v0.8h, v0.8h, v1.8h176; CHECK-NEXT:    ret177entry:178  %sub = sub i16 0, %b179  %0 = insertelement <8 x i16> undef, i16 %sub, i32 0180  %sh_prom = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> zeroinitializer181  %shr = lshr <8 x i16> %a, %sh_prom182  ret <8 x i16> %shr183}184 185define <16 x i8> @lshr8x16(<16 x i8> %a, i8 %b) {186; CHECK-LABEL: lshr8x16:187; CHECK:       // %bb.0: // %entry188; CHECK-NEXT:    dup v1.16b, w0189; CHECK-NEXT:    ushl v0.16b, v0.16b, v1.16b190; CHECK-NEXT:    ret191entry:192  %sub = sub i8 0, %b193  %0 = insertelement <16 x i8> undef, i8 %sub, i32 0194  %sh_prom = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> zeroinitializer195  %shr = lshr <16 x i8> %a, %sh_prom196  ret <16 x i8> %shr197}198 199define <1 x i64> @lshr64x1(<1 x i64> %a, i64 %b) {200; CHECK-LABEL: lshr64x1:201; CHECK:       // %bb.0: // %entry202; CHECK-NEXT:    fmov d1, x0203; CHECK-NEXT:    ushl d0, d0, d1204; CHECK-NEXT:    ret205entry:206  %sub = sub nsw i64 0, %b207  %splat.splatinsert = insertelement <1 x i64> poison, i64 %sub, i32 0208  %shr = lshr <1 x i64> %a, %splat.splatinsert209  ret <1 x i64> %shr210}211 212define <2 x i32> @lshr32x2(<2 x i32> %a, i32 %b) {213; CHECK-LABEL: lshr32x2:214; CHECK:       // %bb.0: // %entry215; CHECK-NEXT:    dup v1.2s, w0216; CHECK-NEXT:    ushl v0.2s, v0.2s, v1.2s217; CHECK-NEXT:    ret218entry:219  %sub = sub nsw i32 0, %b220  %splat.splatinsert = insertelement <2 x i32> poison, i32 %sub, i32 0221  %splat.splat = shufflevector <2 x i32> %splat.splatinsert, <2 x i32> poison, <2 x i32> zeroinitializer222  %shr = lshr <2 x i32> %a, %splat.splat223  ret <2 x i32> %shr224}225 226define <4 x i16> @lshr16x4(<4 x i16> %a, i16 %b) {227; CHECK-LABEL: lshr16x4:228; CHECK:       // %bb.0: // %entry229; CHECK-NEXT:    dup v1.4h, w0230; CHECK-NEXT:    ushl v0.4h, v0.4h, v1.4h231; CHECK-NEXT:    ret232entry:233  %sub = sub i16 0, %b234  %0 = insertelement <4 x i16> undef, i16 %sub, i32 0235  %sh_prom = shufflevector <4 x i16> %0, <4 x i16> undef, <4 x i32> zeroinitializer236  %shr = lshr <4 x i16> %a, %sh_prom237  ret <4 x i16> %shr238}239 240define <8 x i8> @lshr8x8(<8 x i8> %a, i8 %b) {241; CHECK-LABEL: lshr8x8:242; CHECK:       // %bb.0: // %entry243; CHECK-NEXT:    dup v1.8b, w0244; CHECK-NEXT:    ushl v0.8b, v0.8b, v1.8b245; CHECK-NEXT:    ret246entry:247  %sub = sub i8 0, %b248  %0 = insertelement <8 x i8> undef, i8 %sub, i32 0249  %sh_prom = shufflevector <8 x i8> %0, <8 x i8> undef, <8 x i32> zeroinitializer250  %shr = lshr <8 x i8> %a, %sh_prom251  ret <8 x i8> %shr252}253 254define <2 x i64> @shl64x2(<2 x i64> %a, i64 %b) {255; CHECK-LABEL: shl64x2:256; CHECK:       // %bb.0: // %entry257; CHECK-NEXT:    neg x8, x0258; CHECK-NEXT:    dup v1.2d, x8259; CHECK-NEXT:    ushl v0.2d, v0.2d, v1.2d260; CHECK-NEXT:    ret261entry:262  %sub = sub nsw i64 0, %b263  %splat.splatinsert = insertelement <2 x i64> poison, i64 %sub, i32 0264  %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer265  %shl = shl <2 x i64> %a, %splat.splat266  ret <2 x i64> %shl267}268 269define <4 x i32> @shl32x4(<4 x i32> %a, i32 %b) {270; CHECK-LABEL: shl32x4:271; CHECK:       // %bb.0: // %entry272; CHECK-NEXT:    neg w8, w0273; CHECK-NEXT:    dup v1.4s, w8274; CHECK-NEXT:    ushl v0.4s, v0.4s, v1.4s275; CHECK-NEXT:    ret276entry:277  %sub = sub nsw i32 0, %b278  %splat.splatinsert = insertelement <4 x i32> poison, i32 %sub, i32 0279  %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer280  %shl = shl <4 x i32> %a, %splat.splat281  ret <4 x i32> %shl282}283 284define <8 x i16> @shl16x8(<8 x i16> %a, i16 %b) {285; CHECK-LABEL: shl16x8:286; CHECK:       // %bb.0: // %entry287; CHECK-NEXT:    neg w8, w0288; CHECK-NEXT:    dup v1.8h, w8289; CHECK-NEXT:    ushl v0.8h, v0.8h, v1.8h290; CHECK-NEXT:    ret291entry:292  %sub = sub i16 0, %b293  %0 = insertelement <8 x i16> undef, i16 %sub, i32 0294  %sh_prom = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> zeroinitializer295  %shl = shl <8 x i16> %a, %sh_prom296  ret <8 x i16> %shl297}298 299define <16 x i8> @shl8x16(<16 x i8> %a, i8 %b) {300; CHECK-LABEL: shl8x16:301; CHECK:       // %bb.0: // %entry302; CHECK-NEXT:    neg w8, w0303; CHECK-NEXT:    dup v1.16b, w8304; CHECK-NEXT:    ushl v0.16b, v0.16b, v1.16b305; CHECK-NEXT:    ret306entry:307  %sub = sub i8 0, %b308  %0 = insertelement <16 x i8> undef, i8 %sub, i32 0309  %sh_prom = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> zeroinitializer310  %shl = shl <16 x i8> %a, %sh_prom311  ret <16 x i8> %shl312}313 314define <1 x i64> @shl64x1(<1 x i64> %a, i64 %b) {315; CHECK-LABEL: shl64x1:316; CHECK:       // %bb.0: // %entry317; CHECK-NEXT:    neg x8, x0318; CHECK-NEXT:    fmov d1, x8319; CHECK-NEXT:    ushl d0, d0, d1320; CHECK-NEXT:    ret321entry:322  %sub = sub nsw i64 0, %b323  %splat.splatinsert = insertelement <1 x i64> poison, i64 %sub, i32 0324  %shl = shl <1 x i64> %a, %splat.splatinsert325  ret <1 x i64> %shl326}327 328define <2 x i32> @shl32x2(<2 x i32> %a, i32 %b) {329; CHECK-LABEL: shl32x2:330; CHECK:       // %bb.0: // %entry331; CHECK-NEXT:    neg w8, w0332; CHECK-NEXT:    dup v1.2s, w8333; CHECK-NEXT:    ushl v0.2s, v0.2s, v1.2s334; CHECK-NEXT:    ret335entry:336  %sub = sub nsw i32 0, %b337  %splat.splatinsert = insertelement <2 x i32> poison, i32 %sub, i32 0338  %splat.splat = shufflevector <2 x i32> %splat.splatinsert, <2 x i32> poison, <2 x i32> zeroinitializer339  %shl = shl <2 x i32> %a, %splat.splat340  ret <2 x i32> %shl341}342 343define <4 x i16> @shl16x4(<4 x i16> %a, i16 %b) {344; CHECK-LABEL: shl16x4:345; CHECK:       // %bb.0: // %entry346; CHECK-NEXT:    neg w8, w0347; CHECK-NEXT:    dup v1.4h, w8348; CHECK-NEXT:    ushl v0.4h, v0.4h, v1.4h349; CHECK-NEXT:    ret350entry:351  %sub = sub i16 0, %b352  %0 = insertelement <4 x i16> undef, i16 %sub, i32 0353  %sh_prom = shufflevector <4 x i16> %0, <4 x i16> undef, <4 x i32> zeroinitializer354  %shl = shl <4 x i16> %a, %sh_prom355  ret <4 x i16> %shl356}357 358define <8 x i8> @shl8x8(<8 x i8> %a, i8 %b) {359; CHECK-LABEL: shl8x8:360; CHECK:       // %bb.0: // %entry361; CHECK-NEXT:    neg w8, w0362; CHECK-NEXT:    dup v1.8b, w8363; CHECK-NEXT:    ushl v0.8b, v0.8b, v1.8b364; CHECK-NEXT:    ret365entry:366  %sub = sub i8 0, %b367  %0 = insertelement <8 x i8> undef, i8 %sub, i32 0368  %sh_prom = shufflevector <8 x i8> %0, <8 x i8> undef, <8 x i32> zeroinitializer369  %shl = shl <8 x i8> %a, %sh_prom370  ret <8 x i8> %shl371}372 373 374 375define <vscale x 2 x i64> @shrn64x2(<vscale x 2 x i64> %a, i64 %b) {376; CHECK-LABEL: shrn64x2:377; CHECK:       // %bb.0: // %entry378; CHECK-NEXT:    neg x8, x0379; CHECK-NEXT:    ptrue p0.d380; CHECK-NEXT:    mov z1.d, x8381; CHECK-NEXT:    asr z0.d, p0/m, z0.d, z1.d382; CHECK-NEXT:    ret383entry:384  %sub = sub nsw i64 0, %b385  %splat.splatinsert = insertelement <vscale x 2 x i64> poison, i64 %sub, i32 0386  %splat.splat = shufflevector <vscale x 2 x i64> %splat.splatinsert, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer387  %shr = ashr <vscale x 2 x i64> %a, %splat.splat388  ret <vscale x 2 x i64> %shr389}390 391define <vscale x 4 x i32> @shrn32x4(<vscale x 4 x i32> %a, i32 %b) {392; CHECK-LABEL: shrn32x4:393; CHECK:       // %bb.0: // %entry394; CHECK-NEXT:    neg w8, w0395; CHECK-NEXT:    ptrue p0.s396; CHECK-NEXT:    mov z1.s, w8397; CHECK-NEXT:    asr z0.s, p0/m, z0.s, z1.s398; CHECK-NEXT:    ret399entry:400  %sub = sub nsw i32 0, %b401  %splat.splatinsert = insertelement <vscale x 4 x i32> poison, i32 %sub, i32 0402  %splat.splat = shufflevector <vscale x 4 x i32> %splat.splatinsert, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer403  %shr = ashr <vscale x 4 x i32> %a, %splat.splat404  ret <vscale x 4 x i32> %shr405}406 407define <vscale x 8 x i16> @shrn16x8(<vscale x 8 x i16> %a, i16 %b) {408; CHECK-LABEL: shrn16x8:409; CHECK:       // %bb.0: // %entry410; CHECK-NEXT:    neg w8, w0411; CHECK-NEXT:    ptrue p0.h412; CHECK-NEXT:    mov z1.h, w8413; CHECK-NEXT:    asr z0.h, p0/m, z0.h, z1.h414; CHECK-NEXT:    ret415entry:416  %sub = sub i16 0, %b417  %0 = insertelement <vscale x 8 x i16> undef, i16 %sub, i32 0418  %sh_prom = shufflevector <vscale x 8 x i16> %0, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer419  %shr = ashr <vscale x 8 x i16> %a, %sh_prom420  ret <vscale x 8 x i16> %shr421}422 423define <vscale x 16 x i8> @shrn8x16(<vscale x 16 x i8> %a, i8 %b) {424; CHECK-LABEL: shrn8x16:425; CHECK:       // %bb.0: // %entry426; CHECK-NEXT:    neg w8, w0427; CHECK-NEXT:    ptrue p0.b428; CHECK-NEXT:    mov z1.b, w8429; CHECK-NEXT:    asr z0.b, p0/m, z0.b, z1.b430; CHECK-NEXT:    ret431entry:432  %sub = sub i8 0, %b433  %0 = insertelement <vscale x 16 x i8> undef, i8 %sub, i32 0434  %sh_prom = shufflevector <vscale x 16 x i8> %0, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer435  %shr = ashr <vscale x 16 x i8> %a, %sh_prom436  ret <vscale x 16 x i8> %shr437}438 439define <vscale x 2 x i64> @lshrn64x2(<vscale x 2 x i64> %a, i64 %b) {440; CHECK-LABEL: lshrn64x2:441; CHECK:       // %bb.0: // %entry442; CHECK-NEXT:    neg x8, x0443; CHECK-NEXT:    ptrue p0.d444; CHECK-NEXT:    mov z1.d, x8445; CHECK-NEXT:    lsr z0.d, p0/m, z0.d, z1.d446; CHECK-NEXT:    ret447entry:448  %sub = sub nsw i64 0, %b449  %splat.splatinsert = insertelement <vscale x 2 x i64> poison, i64 %sub, i32 0450  %splat.splat = shufflevector <vscale x 2 x i64> %splat.splatinsert, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer451  %shr = lshr <vscale x 2 x i64> %a, %splat.splat452  ret <vscale x 2 x i64> %shr453}454 455define <vscale x 4 x i32> @lshrn32x4(<vscale x 4 x i32> %a, i32 %b) {456; CHECK-LABEL: lshrn32x4:457; CHECK:       // %bb.0: // %entry458; CHECK-NEXT:    neg w8, w0459; CHECK-NEXT:    ptrue p0.s460; CHECK-NEXT:    mov z1.s, w8461; CHECK-NEXT:    lsr z0.s, p0/m, z0.s, z1.s462; CHECK-NEXT:    ret463entry:464  %sub = sub nsw i32 0, %b465  %splat.splatinsert = insertelement <vscale x 4 x i32> poison, i32 %sub, i32 0466  %splat.splat = shufflevector <vscale x 4 x i32> %splat.splatinsert, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer467  %shr = lshr <vscale x 4 x i32> %a, %splat.splat468  ret <vscale x 4 x i32> %shr469}470 471define <vscale x 8 x i16> @lshrn16x8(<vscale x 8 x i16> %a, i16 %b) {472; CHECK-LABEL: lshrn16x8:473; CHECK:       // %bb.0: // %entry474; CHECK-NEXT:    neg w8, w0475; CHECK-NEXT:    ptrue p0.h476; CHECK-NEXT:    mov z1.h, w8477; CHECK-NEXT:    lsr z0.h, p0/m, z0.h, z1.h478; CHECK-NEXT:    ret479entry:480  %sub = sub i16 0, %b481  %0 = insertelement <vscale x 8 x i16> undef, i16 %sub, i32 0482  %sh_prom = shufflevector <vscale x 8 x i16> %0, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer483  %shr = lshr <vscale x 8 x i16> %a, %sh_prom484  ret <vscale x 8 x i16> %shr485}486 487define <vscale x 16 x i8> @lshrn8x16(<vscale x 16 x i8> %a, i8 %b) {488; CHECK-LABEL: lshrn8x16:489; CHECK:       // %bb.0: // %entry490; CHECK-NEXT:    neg w8, w0491; CHECK-NEXT:    ptrue p0.b492; CHECK-NEXT:    mov z1.b, w8493; CHECK-NEXT:    lsr z0.b, p0/m, z0.b, z1.b494; CHECK-NEXT:    ret495entry:496  %sub = sub i8 0, %b497  %0 = insertelement <vscale x 16 x i8> undef, i8 %sub, i32 0498  %sh_prom = shufflevector <vscale x 16 x i8> %0, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer499  %shr = lshr <vscale x 16 x i8> %a, %sh_prom500  ret <vscale x 16 x i8> %shr501}502 503define <vscale x 2 x i64> @shln64x2(<vscale x 2 x i64> %a, i64 %b) {504; CHECK-LABEL: shln64x2:505; CHECK:       // %bb.0: // %entry506; CHECK-NEXT:    neg x8, x0507; CHECK-NEXT:    ptrue p0.d508; CHECK-NEXT:    mov z1.d, x8509; CHECK-NEXT:    lsl z0.d, p0/m, z0.d, z1.d510; CHECK-NEXT:    ret511entry:512  %sub = sub nsw i64 0, %b513  %splat.splatinsert = insertelement <vscale x 2 x i64> poison, i64 %sub, i32 0514  %splat.splat = shufflevector <vscale x 2 x i64> %splat.splatinsert, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer515  %shl = shl <vscale x 2 x i64> %a, %splat.splat516  ret <vscale x 2 x i64> %shl517}518 519define <vscale x 4 x i32> @shln32x4(<vscale x 4 x i32> %a, i32 %b) {520; CHECK-LABEL: shln32x4:521; CHECK:       // %bb.0: // %entry522; CHECK-NEXT:    neg w8, w0523; CHECK-NEXT:    ptrue p0.s524; CHECK-NEXT:    mov z1.s, w8525; CHECK-NEXT:    lsl z0.s, p0/m, z0.s, z1.s526; CHECK-NEXT:    ret527entry:528  %sub = sub nsw i32 0, %b529  %splat.splatinsert = insertelement <vscale x 4 x i32> poison, i32 %sub, i32 0530  %splat.splat = shufflevector <vscale x 4 x i32> %splat.splatinsert, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer531  %shl = shl <vscale x 4 x i32> %a, %splat.splat532  ret <vscale x 4 x i32> %shl533}534 535define <vscale x 8 x i16> @shln16x8(<vscale x 8 x i16> %a, i16 %b) {536; CHECK-LABEL: shln16x8:537; CHECK:       // %bb.0: // %entry538; CHECK-NEXT:    neg w8, w0539; CHECK-NEXT:    ptrue p0.h540; CHECK-NEXT:    mov z1.h, w8541; CHECK-NEXT:    lsl z0.h, p0/m, z0.h, z1.h542; CHECK-NEXT:    ret543entry:544  %sub = sub i16 0, %b545  %0 = insertelement <vscale x 8 x i16> undef, i16 %sub, i32 0546  %sh_prom = shufflevector <vscale x 8 x i16> %0, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer547  %shl = shl <vscale x 8 x i16> %a, %sh_prom548  ret <vscale x 8 x i16> %shl549}550 551define <vscale x 16 x i8> @shln8x16(<vscale x 16 x i8> %a, i8 %b) {552; CHECK-LABEL: shln8x16:553; CHECK:       // %bb.0: // %entry554; CHECK-NEXT:    neg w8, w0555; CHECK-NEXT:    ptrue p0.b556; CHECK-NEXT:    mov z1.b, w8557; CHECK-NEXT:    lsl z0.b, p0/m, z0.b, z1.b558; CHECK-NEXT:    ret559entry:560  %sub = sub i8 0, %b561  %0 = insertelement <vscale x 16 x i8> undef, i8 %sub, i32 0562  %sh_prom = shufflevector <vscale x 16 x i8> %0, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer563  %shl = shl <vscale x 16 x i8> %a, %sh_prom564  ret <vscale x 16 x i8> %shl565}566 567define <vscale x 16 x i8> @subsub(<vscale x 16 x i8> %a, i8 %b) {568; CHECK-LABEL: subsub:569; CHECK:       // %bb.0: // %entry570; CHECK-NEXT:    mov z0.b, w0571; CHECK-NEXT:    ret572entry:573  %sub = sub i8 0, %b574  %0 = insertelement <vscale x 16 x i8> undef, i8 %sub, i32 0575  %sh_prom = shufflevector <vscale x 16 x i8> %0, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer576  %sub2 = sub <vscale x 16 x i8> zeroinitializer, %sh_prom577  ret <vscale x 16 x i8> %sub2578}579